0.3.5/src/cpu_m68k_instr.c

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_m68k_instr.c,v 1.3 2005/08/14 23:44:22 debug Exp $
 *
 *  Motorola 68K instructions.
 *
 *  Individual functions should keep track of cpu->n_translated_instrs. Since
 *  M68K uses variable length instructions, cpu->cd.m68k.next_ic must also be
 *  increased by the number of "instruction slots" that were executed. (I.e.
 *  if an instruction occupying 6 bytes was executed, then next_ic should be
 *  increased by 3.)
 *
 *  (n_translated_instrs is automatically increased by 1 for each function
 *  call. If no instruction was executed, then it should be decreased. If, say,
 *  4 instructions were combined into one function and executed, then it should
 *  be increased by 3.)
 */


/*
 *  nop:  Do nothing.
 */
X(nop)
{
        cpu->cd.x86.next_ic ++;
}


/*****************************************************************************/


X(end_of_page)
{
        /*  Update the PC:  (offset 0, but on the next page)  */
        cpu->pc &= ~((M68K_IC_ENTRIES_PER_PAGE-1) << 1);
        cpu->pc += (M68K_IC_ENTRIES_PER_PAGE << 1);

        /*  Find the new physical page and update the translation pointers:  */
        m68k_pc_to_pointers(cpu);

        /*  end_of_page doesn't count as an executed instruction:  */
        cpu->n_translated_instrs --;
}


/*****************************************************************************/


/*
 *  m68k_combine_instructions():
 *
 *  Combine two or more instructions, if possible, into a single function call.
 */
void m68k_combine_instructions(struct cpu *cpu, struct m68k_instr_call *ic,
        uint32_t addr)
{
        int n_back;
        n_back = (addr >> 1) & (M68K_IC_ENTRIES_PER_PAGE-1);

        if (n_back >= 1) {
                /*  TODO  */
        }

        /*  TODO: Combine forward as well  */
}


/*****************************************************************************/


/*
 *  m68k_instr_to_be_translated():
 *
 *  Translate an instruction word into an m68k_instr_call. ic is filled in with
 *  valid data for the translated instruction, or a "nothing" instruction if
 *  there was a translation failure. The newly translated instruction is then
 *  executed.
 */
X(to_be_translated)
{
        uint32_t addr, low_pc;
        uint16_t iword;
        unsigned char *page;
        unsigned char ib[2];
        int main_opcode;
        void (*samepage_function)(struct cpu *, struct m68k_instr_call *);

        /*  Figure out the (virtual) address of the instruction:  */
        low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page)
            / sizeof(struct m68k_instr_call);
        addr = cpu->pc & ~((M68K_IC_ENTRIES_PER_PAGE-1) <<
            M68K_INSTR_ALIGNMENT_SHIFT);
        addr += (low_pc << M68K_INSTR_ALIGNMENT_SHIFT);
        cpu->pc = addr;
        addr &= ~1;

        /*  Read the instruction word from memory:  */
        page = cpu->cd.m68k.host_load[addr >> 12];

        if (page != NULL) {
                /*  fatal("TRANSLATION HIT!\n");  */
                memcpy(ib, page + (addr & 0xfff), sizeof(ib));
        } else {
                /*  fatal("TRANSLATION MISS!\n");  */
                if (!cpu->memory_rw(cpu, cpu->mem, addr, ib,
                    sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) {
                        fatal("to_be_translated(): "
                            "read failed: TODO\n");
                        goto bad;
                }
        }

        iword = *((uint16_t *)&ib[0]);

#ifdef HOST_LITTLE_ENDIAN
        iword = ((iword & 0xff) << 8) |
                ((iword & 0xff00) >> 8);
#endif


        fatal("M68K: iword = 0x%04x\n", iword);


#define DYNTRANS_TO_BE_TRANSLATED_HEAD
#include "cpu_dyntrans.c"
#undef  DYNTRANS_TO_BE_TRANSLATED_HEAD


        /*
         *  Translate the instruction:
         */


/*  TODO  */


        main_opcode = iword;

        switch (main_opcode) {

        default:goto bad;
        }


#define DYNTRANS_TO_BE_TRANSLATED_TAIL
#include "cpu_dyntrans.c" 
#undef  DYNTRANS_TO_BE_TRANSLATED_TAIL
}

1	/*
2	* Copyright (C) 2005 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: cpu_m68k_instr.c,v 1.3 2005/08/14 23:44:22 debug Exp $
29	*
30	* Motorola 68K instructions.
31	*
32	* Individual functions should keep track of cpu->n_translated_instrs. Since
33	* M68K uses variable length instructions, cpu->cd.m68k.next_ic must also be
34	* increased by the number of "instruction slots" that were executed. (I.e.
35	* if an instruction occupying 6 bytes was executed, then next_ic should be
36	* increased by 3.)
37	*
38	* (n_translated_instrs is automatically increased by 1 for each function
39	* call. If no instruction was executed, then it should be decreased. If, say,
40	* 4 instructions were combined into one function and executed, then it should
41	* be increased by 3.)
42	*/
43
44
45	/*
46	* nop: Do nothing.
47	*/
48	X(nop)
49	{
50	cpu->cd.x86.next_ic ++;
51	}
52
53
54	/*****************************************************************************/
55
56
57	X(end_of_page)
58	{
59	/* Update the PC: (offset 0, but on the next page) */
60	cpu->pc &= ~((M68K_IC_ENTRIES_PER_PAGE-1) << 1);
61	cpu->pc += (M68K_IC_ENTRIES_PER_PAGE << 1);
62
63	/* Find the new physical page and update the translation pointers: */
64	m68k_pc_to_pointers(cpu);
65
66	/* end_of_page doesn't count as an executed instruction: */
67	cpu->n_translated_instrs --;
68	}
69
70
71	/*****************************************************************************/
72
73
74	/*
75	* m68k_combine_instructions():
76	*
77	* Combine two or more instructions, if possible, into a single function call.
78	*/
79	void m68k_combine_instructions(struct cpu cpu, struct m68k_instr_call ic,
80	uint32_t addr)
81	{
82	int n_back;
83	n_back = (addr >> 1) & (M68K_IC_ENTRIES_PER_PAGE-1);
84
85	if (n_back >= 1) {
86	/* TODO */
87	}
88
89	/* TODO: Combine forward as well */
90	}
91
92
93	/*****************************************************************************/
94
95
96	/*
97	* m68k_instr_to_be_translated():
98	*
99	* Translate an instruction word into an m68k_instr_call. ic is filled in with
100	* valid data for the translated instruction, or a "nothing" instruction if
101	* there was a translation failure. The newly translated instruction is then
102	* executed.
103	*/
104	X(to_be_translated)
105	{
106	uint32_t addr, low_pc;
107	uint16_t iword;
108	unsigned char *page;
109	unsigned char ib[2];
110	int main_opcode;
111	void (samepage_function)(struct cpu , struct m68k_instr_call *);
112
113	/* Figure out the (virtual) address of the instruction: */
114	low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page)
115	/ sizeof(struct m68k_instr_call);
116	addr = cpu->pc & ~((M68K_IC_ENTRIES_PER_PAGE-1) <<
117	M68K_INSTR_ALIGNMENT_SHIFT);
118	addr += (low_pc << M68K_INSTR_ALIGNMENT_SHIFT);
119	cpu->pc = addr;
120	addr &= ~1;
121
122	/* Read the instruction word from memory: */
123	page = cpu->cd.m68k.host_load[addr >> 12];
124
125	if (page != NULL) {
126	/* fatal("TRANSLATION HIT!\n"); */
127	memcpy(ib, page + (addr & 0xfff), sizeof(ib));
128	} else {
129	/* fatal("TRANSLATION MISS!\n"); */
130	if (!cpu->memory_rw(cpu, cpu->mem, addr, ib,
131	sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) {
132	fatal("to_be_translated(): "
133	"read failed: TODO\n");
134	goto bad;
135	}
136	}
137
138	iword = ((uint16_t )&ib[0]);
139
140	#ifdef HOST_LITTLE_ENDIAN
141	iword = ((iword & 0xff) << 8) \|
142	((iword & 0xff00) >> 8);
143	#endif
144
145
146	fatal("M68K: iword = 0x%04x\n", iword);
147
148
149	#define DYNTRANS_TO_BE_TRANSLATED_HEAD
150	#include "cpu_dyntrans.c"
151	#undef DYNTRANS_TO_BE_TRANSLATED_HEAD
152
153
154	/*
155	* Translate the instruction:
156	*/
157
158
159	/* TODO */
160
161
162	main_opcode = iword;
163
164	switch (main_opcode) {
165
166	default:goto bad;
167	}
168
169
170	#define DYNTRANS_TO_BE_TRANSLATED_TAIL
171	#include "cpu_dyntrans.c"
172	#undef DYNTRANS_TO_BE_TRANSLATED_TAIL
173	}
174