upstream/0.3.5/TODO

$Id: TODO,v 1.166 2005/08/16 05:44:33 debug Exp $

===============================================================================

High priority stuff:


MIPS bintrans:
        x)  call/return address cache?

dyntrans:
        x)  memory write protection for ARM, but NOT for Alpha (because
                it has the IMB instruction... hm)

        x)  call/return address cache

        x)  instr_call sequence analysis support? (Useful for
                handtuning combinations.)

        x)  opcode statistics support?
                TODO: is instr_call statistics enough?

        x)  support for archs that allow transparent unaligned load/stores

        x)  SMP: detect when an instruction such as ll/sc or cas is used,
            and "synchronize" approximately the number of executed instructions
            (or cycles) across all CPUs.

        x)  support for variable-length instructions (x86, m68k, ...)
                Perhaps:  don't increase the next_ic between every
                instruction, but let each instruction's handler do
                that for itself.
                Problem: what about instructions crossing a (virtual)
                        page boundary? They cannot be translated once
                        and for all :( and must be interpreted slowly!

        x)  support for THUMB or MIPS16  (arm, mips)

        x)  support for Delay slots!  (mips, sparc, hppa)

        x)  Alpha: hahaha, zapnot and inserts/extracts don't
            compile into very nice code :-|  fix this

        x)  64-bit virtual memory translation tables (PPC, etc)

        x)  x86: convert to dyntrans. LOTS of stuff to consider.


===============================================================================

Lower priority, but still important:

        Redesign the entire "mainbus" concept:
                o)  Easily configurable interrupt routing in SMP systems.
                o)  Specific clock/bus speeds, cpu speeds etc.
                o)  Synchronization over network?

        Caches / memory hierarchies: (this is mostly MIPS-specific)
                o)  MIPS coproc.c: bits in config registers should reflect
                    correct cache sizes for _all_ CPU types. (currently only
                    implemented for R4000, R1x000, and a few others)
                o)  src/memory*.c: Implement correct cache emulation for
                    all CPU types. (currently only R2000/R3000 is implemented)
                    (per CPU, multiple levels should be possible,
                    associativity etc!)
                o)  R2000/R3000 isn't _100%_ correct, just almost correct :)
                o)  Move the -S (fill mem with random) functionality into the
                    memory.c subsystem, not machine.c or wherever it is now
                o)  ECC stuff, simulation of memory errors?  (Machine dependant)
                o)  More than 4GB of emulated RAM, when run on a 32-bit host?
                    (using manual swap-out of blocks to disk, ugly)
                o)  A global command line option should be used to turn
                    cache emulation on or off. When off, caches should be
                    faked like they are right now. When on, caches and
                    memory latencies should be emulated as correctly as
                    possible.

        Network layer:
                o)  Multiple networks per emulation, and let different
                    NICs in machines connect to different networks.
                o)  many other issues: see src/net.c

        MIPS CPU emulation:
                o)  i386 bintrans backend: movn etc, slt[u] for
                        64-bit mode, 64-bit shifts etc
                o)  Instructions:
                        o)  All ISAs:
                                o)  Floating point exception handling, and
                                        add more instructions.
                                o)  Finish the MIPS16 translator, and test it!
                                o)  MIPS ISA I, II, III, IV
                                o)  MIPS V (SIMD vector stuff?)
                                o)  MDMX  (MIPS Digital Media Extension)
                                o)  MIPS 3D
                                o)  MIPS MT (Multi-thread stuff) (What's this?)
                        o)  Warn about mis-used bit fields (ie bits that
                            should be all zeroes, warn about if they are not)!
                            Both for coprocessor registers and for instruction
                            opcodes.
                        o)  the special2 stuff is a mess right now
                        o)  warn and/or cause exceptions for unimplemented
                            instructions (depending on CPU type)
                o)  R2000/R3000:
                        x)  R3000 "tri-byte stores". (What's this?)
                o)  R4000 and others:
                        x)  watchhi/watchlo exceptions, and other exception
                            handling details
                o)  R10000 and others:  (R12000, R14000 ?)
                        x)  memory space, exceptions, ...
                        x)  use cop0 framemask for tlb lookups
                            (http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
                o)  Implement load delays?  Warnings on interlocks.
                o)  Implement all coprocessor 0 bits / functions.
                        x)  coproc 0 selectors! (R4000 ?)
                o)  R4300 (nintendo64, no mmu?), R5900 (playstation2, weird
                        TLB/cache? 128-bit GPRs, new instructions),
                        4K (note: NOT R4000), 5K (note: NOT R5000),
                        R6000 (ISA II), R8000
                o)  Multi-cpu stuff:
                        +)  Interrupt routing (ie devices vs mainbus, or
                            connect each device to a fixed cpu)
                        +)  SGI's NUMA architecture. Study
                                x)  Linux sources
                                x)  SGI's specs on NUMA address space
                        +)  Ultrix?  NetBSD doesn't do SMP on MIPS yet :-(
                        +)  Own experiments with ycx2.

        File/disk handling:
                o)  Better handling of tape files

        Debugger:
                o)  Read function argument count and types from binaries? (ELF?)
                o)  Demangle C++ names.

        Userland ABI emulation:
                o)  see src/useremul.c

        Terminal based interactive debugger:
                o)  see src/debugger.c

        Terminal/console stuff:
                o)  allow emulated serial ports to be connected to the outside
                    world in a more generic way, or even to other emulated
                    machines(!)

        Regression tests.  (Needs to be totally rewritten, the old framework
                was removed because it was useless.)

        Save state of the whole emulated machine, to be able to load it back
                in later?  (Memory, all device's states, all registers and
                so on.  Like taking a snapshot. (SimOS seems to do this,
                according to its website.))

        Better X-windows functionality:
                o)  CLEAN UP the ugly event code
                o)  Mouse clicks can be "missed" in the current system; this is
                    not good. They should be put on a stack of some kind.
                o)  More 2D and 3D framebuffer acceleration.
                o)  Non-resizable windows?  Or choose scaledown depending
                        on size (and center the image, with a black border).
                o)  Different scaledown on different windows?
                o)  Switch scaledown during runtime? (Ala CTRL-ALT-plus/minus)
                o)  Keyboard and mouse events:
                        x)  Do this for more machines than just DECstation
                        x)  more X11 cursor keycodes
                        x)  Keys like CTRL, ALT, SHIFT do not get through
                            by themselves (these are necessary for example
                            to change the font of an xterm in X in the
                            emulator)
                o)  Generalize the framebuffer stuff by moving _ALL_ X11
                        specific code to src/x11.c!

        Statistics:  (this could be interesting)
                o)  Save to file and show graphics. It should be possible to
                    run gxemul after a simulation to just show the graphics,
                    or convert to a .ppm or .tga or similar.
                o)  memory accesses (to measure cache efficiency and
                        page coloring efficiency)
                o)  nr of simultaneous ASIDs in use in the TLB, for MIPS
                o)  percentage of time spent in different "states", such as
                    running userland code, kernel code, or idling (for CPUs
                    that have such an instruction, or whenever the PC is
                    inside a specific idle-function (address range)).
                    Possible additional state (for example on R3000): caches
                    disabled.
                o)  position of read/write on (SCSI) disks

1	dpavlin	12	$Id: TODO,v 1.166 2005/08/16 05:44:33 debug Exp $
2	dpavlin	2
3	dpavlin	12	===============================================================================
4	dpavlin	2
5	dpavlin	12	High priority stuff:
6
7
8			MIPS bintrans:
9			x) call/return address cache?
10
11			dyntrans:
12			x) memory write protection for ARM, but NOT for Alpha (because
13			it has the IMB instruction... hm)
14
15			x) call/return address cache
16
17			x) instr_call sequence analysis support? (Useful for
18			handtuning combinations.)
19
20			x) opcode statistics support?
21			TODO: is instr_call statistics enough?
22
23			x) support for archs that allow transparent unaligned load/stores
24
25			x) SMP: detect when an instruction such as ll/sc or cas is used,
26			and "synchronize" approximately the number of executed instructions
27			(or cycles) across all CPUs.
28
29			x) support for variable-length instructions (x86, m68k, ...)
30			Perhaps: don't increase the next_ic between every
31			instruction, but let each instruction's handler do
32			that for itself.
33			Problem: what about instructions crossing a (virtual)
34			page boundary? They cannot be translated once
35			and for all :( and must be interpreted slowly!
36
37			x) support for THUMB or MIPS16 (arm, mips)
38
39			x) support for Delay slots! (mips, sparc, hppa)
40
41			x) Alpha: hahaha, zapnot and inserts/extracts don't
42			compile into very nice code :-\| fix this
43
44			x) 64-bit virtual memory translation tables (PPC, etc)
45
46			x) x86: convert to dyntrans. LOTS of stuff to consider.
47
48
49			===============================================================================
50
51			Lower priority, but still important:
52
53			Redesign the entire "mainbus" concept:
54			o) Easily configurable interrupt routing in SMP systems.
55			o) Specific clock/bus speeds, cpu speeds etc.
56			o) Synchronization over network?
57
58	dpavlin	2	Caches / memory hierarchies: (this is mostly MIPS-specific)
59			o) MIPS coproc.c: bits in config registers should reflect
60			correct cache sizes for _all_ CPU types. (currently only
61			implemented for R4000, R1x000, and a few others)
62			o) src/memory*.c: Implement correct cache emulation for
63			all CPU types. (currently only R2000/R3000 is implemented)
64			(per CPU, multiple levels should be possible,
65			associativity etc!)
66			o) R2000/R3000 isn't _100%_ correct, just almost correct :)
67			o) Move the -S (fill mem with random) functionality into the
68			memory.c subsystem, not machine.c or wherever it is now
69			o) ECC stuff, simulation of memory errors? (Machine dependant)
70			o) More than 4GB of emulated RAM, when run on a 32-bit host?
71			(using manual swap-out of blocks to disk, ugly)
72			o) A global command line option should be used to turn
73			cache emulation on or off. When off, caches should be
74			faked like they are right now. When on, caches and
75			memory latencies should be emulated as correctly as
76			possible.
77
78			Network layer:
79			o) Multiple networks per emulation, and let different
80			NICs in machines connect to different networks.
81			o) many other issues: see src/net.c
82
83			MIPS CPU emulation:
84	dpavlin	12	o) i386 bintrans backend: movn etc, slt[u] for
85			64-bit mode, 64-bit shifts etc
86	dpavlin	2	o) Instructions:
87	dpavlin	12	o) All ISAs:
88	dpavlin	2	o) Floating point exception handling, and
89			add more instructions.
90			o) Finish the MIPS16 translator, and test it!
91			o) MIPS ISA I, II, III, IV
92			o) MIPS V (SIMD vector stuff?)
93			o) MDMX (MIPS Digital Media Extension)
94			o) MIPS 3D
95			o) MIPS MT (Multi-thread stuff) (What's this?)
96			o) Warn about mis-used bit fields (ie bits that
97			should be all zeroes, warn about if they are not)!
98			Both for coprocessor registers and for instruction
99			opcodes.
100			o) the special2 stuff is a mess right now
101			o) warn and/or cause exceptions for unimplemented
102			instructions (depending on CPU type)
103			o) R2000/R3000:
104			x) R3000 "tri-byte stores". (What's this?)
105			o) R4000 and others:
106			x) watchhi/watchlo exceptions, and other exception
107			handling details
108			o) R10000 and others: (R12000, R14000 ?)
109			x) memory space, exceptions, ...
110			x) use cop0 framemask for tlb lookups
111			(http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_284.html)
112			o) Implement load delays? Warnings on interlocks.
113			o) Implement all coprocessor 0 bits / functions.
114			x) coproc 0 selectors! (R4000 ?)
115			o) R4300 (nintendo64, no mmu?), R5900 (playstation2, weird
116			TLB/cache? 128-bit GPRs, new instructions),
117			4K (note: NOT R4000), 5K (note: NOT R5000),
118			R6000 (ISA II), R8000
119			o) Multi-cpu stuff:
120	dpavlin	12	+) Interrupt routing (ie devices vs mainbus, or
121			connect each device to a fixed cpu)
122	dpavlin	2	+) SGI's NUMA architecture. Study
123			x) Linux sources
124			x) SGI's specs on NUMA address space
125			+) Ultrix? NetBSD doesn't do SMP on MIPS yet :-(
126			+) Own experiments with ycx2.
127
128			File/disk handling:
129			o) Better handling of tape files
130
131	dpavlin	12	Debugger:
132			o) Read function argument count and types from binaries? (ELF?)
133			o) Demangle C++ names.
134
135	dpavlin	2	Userland ABI emulation:
136			o) see src/useremul.c
137
138			Terminal based interactive debugger:
139			o) see src/debugger.c
140
141	dpavlin	6	Terminal/console stuff:
142			o) allow emulated serial ports to be connected to the outside
143			world in a more generic way, or even to other emulated
144			machines(!)
145
146	dpavlin	12	Regression tests. (Needs to be totally rewritten, the old framework
147			was removed because it was useless.)
148	dpavlin	2
149			Save state of the whole emulated machine, to be able to load it back
150			in later? (Memory, all device's states, all registers and
151			so on. Like taking a snapshot. (SimOS seems to do this,
152			according to its website.))
153
154			Better X-windows functionality:
155			o) CLEAN UP the ugly event code
156			o) Mouse clicks can be "missed" in the current system; this is
157			not good. They should be put on a stack of some kind.
158			o) More 2D and 3D framebuffer acceleration.
159			o) Non-resizable windows? Or choose scaledown depending
160			on size (and center the image, with a black border).
161			o) Different scaledown on different windows?
162			o) Switch scaledown during runtime? (Ala CTRL-ALT-plus/minus)
163			o) Keyboard and mouse events:
164			x) Do this for more machines than just DECstation
165			x) more X11 cursor keycodes
166			x) Keys like CTRL, ALT, SHIFT do not get through
167			by themselves (these are necessary for example
168			to change the font of an xterm in X in the
169			emulator)
170			o) Generalize the framebuffer stuff by moving _ALL_ X11
171			specific code to src/x11.c!
172
173			Statistics: (this could be interesting)
174			o) Save to file and show graphics. It should be possible to
175			run gxemul after a simulation to just show the graphics,
176			or convert to a .ppm or .tga or similar.
177			o) memory accesses (to measure cache efficiency and
178			page coloring efficiency)
179			o) nr of simultaneous ASIDs in use in the TLB, for MIPS
180			o) percentage of time spent in different "states", such as
181			running userland code, kernel code, or idling (for CPUs
182			that have such an instruction, or whenever the PC is
183			inside a specific idle-function (address range)).
184			Possible additional state (for example on R3000): caches
185			disabled.
186			o) position of read/write on (SCSI) disks
187