/[gxemul]/upstream/0.3.3.1/src/memory_x86.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Contents of /upstream/0.3.3.1/src/memory_x86.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 7 - (show annotations)
Mon Oct 8 16:18:14 2007 UTC (16 years, 7 months ago) by dpavlin
File MIME type: text/plain
File size: 6817 byte(s)
0.3.3.1
1 /*
2 * Copyright (C) 2005 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: memory_x86.c,v 1.18 2005/05/29 10:35:11 debug Exp $
29 *
30 * Included from cpu_x86.c.
31 *
32 *
33 * TODO: This is basically just a skeleton so far.
34 */
35
36
37 /*
38 * translate_address():
39 *
40 * Return values:
41 * 0 Failure
42 * 1 Success, the page is readable only
43 * 2 Success, the page is read/write
44 */
45 int TRANSLATE_ADDRESS(struct cpu *cpu, uint64_t vaddr,
46 uint64_t *return_addr, int flags)
47 {
48 unsigned char pded[4];
49 unsigned char pted[4];
50 uint64_t table_addr;
51 uint32_t pte=0, pde=0;
52 int a, b, res, writable, usermode = 0;
53 int writeflag = flags & FLAG_WRITEFLAG? MEM_WRITE : MEM_READ;
54 int no_exceptions = flags & FLAG_NOEXCEPTIONS;
55 int no_segmentation = flags & NO_SEGMENTATION;
56 struct descriptor_cache *dc;
57
58 if (cpu->cd.x86.cursegment < 0 || cpu->cd.x86.cursegment >= 8) {
59 fatal("TODO: Weird x86 segment nr %i\n",
60 cpu->cd.x86.cursegment);
61 cpu->running = 0;
62 return 0;
63 }
64
65 if ((vaddr >> 32) == 0xffffffff)
66 vaddr &= 0xffffffff;
67
68 dc = &cpu->cd.x86.descr_cache[cpu->cd.x86.cursegment & 7];
69
70 if (no_segmentation) {
71 /* linear address */
72 writable = 1;
73 } else {
74 if (PROTECTED_MODE && vaddr > dc->limit) {
75 fatal("TODO: vaddr=0x%llx > limit (0x%llx)\n",
76 (long long)vaddr, (long long)dc->limit);
77 /* goto fail; */
78 }
79
80 /* TODO: Check the Privilege Level */
81 vaddr = (vaddr + dc->base) & 0xffffffff;
82 writable = dc->writable;
83 }
84
85 usermode = (cpu->cd.x86.s[X86_S_CS] & X86_PL_MASK) ==
86 X86_RING3;
87
88 /* Paging: */
89 if (cpu->cd.x86.cr[0] & X86_CR0_PG) {
90 /* TODO: This should be cached somewhere, in some
91 kind of simulated TLB. */
92 if (cpu->cd.x86.cr[3] & 0xfff) {
93 fatal("TODO: cr3=%016llx (lowest bits non-zero)\n",
94 (long long)cpu->cd.x86.cr[3]);
95 goto fail;
96 }
97
98 a = (vaddr >> 22) & 1023;
99 b = (vaddr >> 12) & 1023;
100 /* fatal("vaddr = 0x%08x ==> %i, %i\n", (int)vaddr, a, b); */
101
102 /* Read the Page Directory Entry: */
103 table_addr = cpu->cd.x86.cr[3] & ~0xfff;
104 if (table_addr == 0)
105 fatal("WARNING: The page directory (cr3) is at"
106 " physical address 0 (?)\n");
107 res = cpu->memory_rw(cpu, cpu->mem, table_addr + 4*a, pded,
108 sizeof(pded), MEM_READ, PHYSICAL);
109 if (!res) {
110 fatal("TODO: could not read pde (table = 0x%llx)\n",
111 (long long)table_addr);
112 goto fail;
113 }
114 if ((pded[0] & 0x01) && !(pded[0] & 0x20)) {
115 pded[0] |= 0x20;
116 cpu->memory_rw(cpu, cpu->mem, table_addr + 4*a, pded,
117 sizeof(pded), MEM_WRITE, PHYSICAL);
118 }
119 if ((pded[0] & 0x01) && writeflag == MEM_WRITE &&
120 !(pded[0] & 0x40)) {
121 pded[0] |= 0x40;
122 cpu->memory_rw(cpu, cpu->mem, table_addr + 4*a, pded,
123 sizeof(pded), MEM_WRITE, PHYSICAL);
124 }
125 pde = pded[0] + (pded[1] << 8) + (pded[2] << 16) +
126 (pded[3] << 24);
127 /* fatal(" pde: 0x%08x\n", (int)pde); */
128 /* TODO: lowest bits of the pde */
129 if (!(pde & 0x01)) {
130 fatal("PAGE FAULT: pde not present: vaddr=0x%08x, "
131 "usermode=%i\n", (int)vaddr, usermode);
132 fatal(" CS:EIP = 0x%04x:0x%016llx\n",
133 (int)cpu->cd.x86.s[X86_S_CS],
134 (long long)cpu->pc);
135 if (!no_exceptions) {
136 cpu->cd.x86.cr[2] = vaddr;
137 x86_interrupt(cpu, 14, (writeflag? 2 : 0) +
138 (usermode? 4 : 0));
139 }
140 return 0;
141 }
142
143 /* Read the Page Table Entry: */
144 table_addr = pde & ~0xfff;
145 res = cpu->memory_rw(cpu, cpu->mem, table_addr + 4*b, pted,
146 sizeof(pted), MEM_READ, PHYSICAL);
147 if (!res) {
148 fatal("TODO: could not read pte (pt = 0x%llx)\n",
149 (long long)table_addr);
150 goto fail;
151 }
152 pte = pted[0] + (pted[1] << 8) + (pted[2] << 16) +
153 (pted[3] << 24);
154 if ((pted[0] & 0x01) && !(pted[0] & 0x20)) {
155 pted[0] |= 0x20;
156 cpu->memory_rw(cpu, cpu->mem, table_addr + 4*b, pted,
157 sizeof(pted), MEM_WRITE, PHYSICAL);
158 }
159 if ((pted[0] & 0x01) && writeflag == MEM_WRITE &&
160 !(pted[0] & 0x40)) {
161 pted[0] |= 0x40;
162 cpu->memory_rw(cpu, cpu->mem, table_addr + 4*b, pted,
163 sizeof(pted), MEM_WRITE, PHYSICAL);
164 }
165 /* fatal(" pte: 0x%08x\n", (int)pte); */
166 if (!(pte & 0x02))
167 writable = 0;
168 if (!(pte & 0x01)) {
169 fatal("TODO: pte not present: table_addr=0x%08x "
170 "vaddr=0x%08x, usermode=%i wf=%i pte=0x%08x\n",
171 (int)table_addr, (int)vaddr, usermode, writeflag,
172 (int)pte);
173 if (!no_exceptions) {
174 cpu->cd.x86.cr[2] = vaddr;
175 x86_interrupt(cpu, 14, (writeflag? 2 : 0)
176 + (usermode? 4 : 0));
177 }
178 return 0;
179 }
180
181 (*return_addr) = (pte & ~0xfff) | (vaddr & 0xfff);
182 } else
183 *return_addr = vaddr;
184
185 /* Code: */
186 if (flags & FLAG_INSTR) {
187 if (dc->descr_type == DESCR_TYPE_CODE)
188 return 1;
189 fatal("TODO instr load but not code descriptor?\n");
190 goto fail;
191 }
192
193 /* We are here on non-instruction fetch. */
194
195 if (writeflag == MEM_WRITE && !writable) {
196 if (!usermode && !(cpu->cd.x86.cr[0] & X86_CR0_WP)) {
197 /* 80386 compatiblity: allow writes to userspace,
198 if we are running in kernel mode. */
199 writable = 1;
200 } else {
201 fatal("TODO: write to nonwritable segment or page: "
202 "vaddr=0x%08x pde=0x%08x pte=0x%08x\n",
203 (int)vaddr, (int)pde, (int)pte);
204 cpu->cd.x86.cr[2] = vaddr;
205 x86_interrupt(cpu, 14, (writeflag? 2 : 0)
206 + (usermode? 4 : 0) + 1);
207 return 0;
208 }
209 }
210
211 return 1 + writable;
212
213 fail:
214 fatal("memory_x86 FAIL: TODO\n");
215 cpu->running = 0;
216 return 0;
217 }
218

  ViewVC Help
Powered by ViewVC 1.1.26