0.3.1/include/dec_kn02.h

/*  gxemul: $Id: dec_kn02.h,v 1.3 2005/03/05 12:34:02 debug Exp $  */
/*      $NetBSD: kn02.h,v 1.8 2000/02/29 04:41:56 nisimura Exp $        */

/*-
 * Copyright (c) 1992, 1993
 *      The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * The Mach Operating System project at Carnegie-Mellon University,
 * Ralph Campbell and Rick Macklem.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by the University of
 *      California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *      @(#)kn02.h      8.1 (Berkeley) 6/10/93
 */

/*
 * Mach Operating System
 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
 * All Rights Reserved.
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */
/*
 * HISTORY
 * Log: kn02.h,v
 * Revision 2.5  91/05/14  17:23:30  mrt
 *      Correcting copyright
 *
 * Revision 2.4  91/02/05  17:42:03  mrt
 *      Added author notices
 *      [91/02/04  11:14:23  mrt]
 *
 *      Changed to use new Mach copyright
 *      [91/02/02  12:12:58  mrt]
 *
 * Revision 2.3  90/12/05  23:32:04  af
 *
 *
 * Revision 2.1.1.2  90/11/01  02:48:10  af
 *      Reworked a bit, made reentrant.
 *
 * Revision 2.1.1.1  90/10/03  11:48:22  af
 *      Created, from the DEC specs:
 *      "DECstation 5000/200 KN02 System Module Functional Specification"
 *      Workstation Systems Engineering, Palo Alto, CA. Aug 27, 1990.
 *      [90/09/03            af]
 */
/*
 *      File: kn02.h
 *      Author: Alessandro Forin, Carnegie Mellon University
 *      Date:   9/90
 *
 *      Definitions specific to the KN02 processor (3max)
 */

#ifndef MIPS_KN02_H
#define MIPS_KN02_H 1

/*
 * KN02's Physical address space
 */
#define KN02_PHYS_MIN           0x00000000      /* 512 Meg */
#define KN02_PHYS_MAX           0x1fffffff

/*
 * Memory map
 */
#define KN02_PHYS_MEMORY_START  0x00000000
#define KN02_PHYS_MEMORY_END    0x1dffffff      /* 480 Meg in 15 slots */

/*
 * I/O map
 */
#define KN02_PHYS_TC_0_START    0x1e000000      /* TURBOchannel, slot 0 */
#define KN02_PHYS_TC_0_END      0x1e3fffff      /*   4 Meg, option0 */

#define KN02_PHYS_TC_1_START    0x1e400000      /* TURBOchannel, slot 1 */
#define KN02_PHYS_TC_1_END      0x1e7fffff      /*   4 Meg, option1 */

#define KN02_PHYS_TC_2_START    0x1e800000      /* TURBOchannel, slot 2 */
#define KN02_PHYS_TC_2_END      0x1ebfffff      /*   4 Meg, option2 */

#define KN02_PHYS_TC_3_START    0x1ec00000      /* TURBOchannel, slot 3 */
#define KN02_PHYS_TC_3_END      0x1effffff      /*   4 Meg, reserved*/

#define KN02_PHYS_TC_4_START    0x1f000000      /* TURBOchannel, slot 4 */
#define KN02_PHYS_TC_4_END      0x1f3fffff      /*   4 Meg, reserved*/

#define KN02_PHYS_TC_5_START    0x1f400000      /* TURBOchannel, slot 5 */
#define KN02_PHYS_TC_5_END      0x1f7fffff      /*   4 Meg, SCSI */

#define KN02_PHYS_TC_6_START    0x1f800000      /* TURBOchannel, slot 6 */
#define KN02_PHYS_TC_6_END      0x1fbfffff      /*   4 Meg, ether */

#define KN02_PHYS_TC_7_START    0x1fc00000      /* TURBOchannel, slot 7 */
#define KN02_PHYS_TC_7_END      0x1fffffff      /*   4 Meg, system devices */

#define KN02_PHYS_TC_START      KN02_PHYS_TC_0_START
#define KN02_PHYS_TC_END        KN02_PHYS_TC_7_END      /* 32 Meg */

#define KN02_TC_NSLOTS          8
#define KN02_TC_MIN             0
#define KN02_TC_MAX             6               /* don't look at system slot */

/*
 * System devices
 */
#define KN02_SYS_ROM_START      KN02_PHYS_TC_7_START+0x000000
#define KN02_SYS_ROM_END        KN02_PHYS_TC_7_START+0x07ffff
#define KN02_SYS_RESERVED       KN02_PHYS_TC_7_START+0x080000
#define KN02_SYS_CHKSYN         KN02_PHYS_TC_7_START+0x100000
#define KN02_SYS_ERRADR         KN02_PHYS_TC_7_START+0x180000
#define KN02_SYS_DZ             KN02_PHYS_TC_7_START+0x200000
#define KN02_SYS_CLOCK          KN02_PHYS_TC_7_START+0x280000
#define KN02_SYS_CSR            KN02_PHYS_TC_7_START+0x300000
#define KN02_SYS_ROM1_START     KN02_PHYS_TC_7_START+0x380000
#define KN02_SYS_ROM1_END       KN02_PHYS_TC_7_START+0x3fffff

/*
 * Interrupts
 */
#define KN02_INT_FPA            IP_LEV7         /* Floating Point coproc */
#define KN02_INT_RES1           IP_LEV6         /* reserved, unused */
#define KN02_INT_MEM            IP_LEV5         /* memory controller */
#define KN02_INT_RES2           IP_LEV4         /* reserved, unused */
#define KN02_INT_CLOCK          IP_LEV3         /* RTC chip */
#define KN02_INT_IO             IP_LEV2         /* I/O slots */

/*
 * System board registers
 */
/* system Status and Control register */
#define KN02_CSR_IOINT          0x000000ff      /* ro Interrupt pending */
#       define KN02_IP_DZ       0x00000080      /* serial lines */
#       define KN02_IP_LANCE    0x00000040      /* thin ethernet */
#       define KN02_IP_SCSI     0x00000020      /* ASC scsi controller */
#       define KN02_IP_XXXX     0x00000018      /* unused */
#       define KN02_IP_SLOT2    0x00000004      /* option slot 2 */
#       define KN02_IP_SLOT1    0x00000002      /* option slot 1 */
#       define KN02_IP_SLOT0    0x00000001      /* option slot 0 */

#define KN02_CSR_BAUD38         0x00000100      /* rw Max DZ baud rate */
#define KN02_CSR_DIAGDN         0x00000200      /* rw Diag jumper */
#define KN02_CSR_BNK32M         0x00000400      /* rw Memory bank stride */
#define KN02_CSR_TXDIS          0x00000800      /* rw Disable DZ xmit */
#define KN02_CSR_LEDIAG         0x00001000      /* rw Latch ECC */
#define KN02_CSR_CORRECT        0x00002000      /* rw ECC corrects single bit */
#define KN02_CSR_ECCMD          0x0000c000      /* rw ECC logic mode */
#define KN02_CSR_IOINTEN        0x00ff0000      /* rw Interrupt enable */
#define KN02_CSR_IOINTEN_SHIFT  16
#define KN02_CSR_NRMMOD         0x01000000      /* ro Diag jumper state */
#define KN02_CSR_REFEVEN        0x02000000      /* ro Refreshing even mem bank */
#define KN02_CSR_PRSVNVR        0x04000000      /* ro Preserve NVR jumper */
#define KN02_CSR_PSWARN         0x08000000      /* ro PS overheating */
#define KN02_CSR_RRESERVED      0xf0000000      /* rz */

#define KN02_CSR_LEDS           0x000000ff      /* wo  Diag LEDs */
#define KN02_CSR_WRESERVED      0xff000000      /* wz */

/* Error address status register */
#define KN02_ERR_ADDRESS        0x07ffffff      /* phys address */
#define KN02_ERR_RESERVED       0x08000000      /* unused */
#define KN02_ERR_ECCERR         0x10000000      /* ECC error */
#define KN02_ERR_WRITE          0x20000000      /* read/write transaction */
#define KN02_ERR_CPU            0x40000000      /* CPU or device initiator */
#define KN02_ERR_VALID          0x80000000      /* Info is valid */

/* ECC check/syndrome status register */
#define KN02_ECC_SYNLO          0x0000007f      /* syndrome, even bank  */
#define KN02_ECC_SNGLO          0x00000080      /* single bit err, "    */
#define KN02_ECC_CHKLO          0x00007f00      /* check bits,  "  "    */
#define KN02_ECC_VLDLO          0x00008000      /* info valid for  "    */
#define KN02_ECC_SYNHI          0x007f0000      /* syndrome, odd bank   */
#define KN02_ECC_SNGHI          0x00800000      /* single bit err, "    */
#define KN02_ECC_CHKHI          0x7f000000      /* check bits,  "  "    */
#define KN02_ECC_VLDHI          0x80000000      /* info valid for  "    */

#endif  /* MIPS_KN02_H */
1	dpavlin	2	/* gxemul: $Id: dec_kn02.h,v 1.3 2005/03/05 12:34:02 debug Exp $ */
2			/* $NetBSD: kn02.h,v 1.8 2000/02/29 04:41:56 nisimura Exp $ */
3
4			/*-
5			* Copyright (c) 1992, 1993
6			* The Regents of the University of California. All rights reserved.
7			*
8			* This code is derived from software contributed to Berkeley by
9			* The Mach Operating System project at Carnegie-Mellon University,
10			* Ralph Campbell and Rick Macklem.
11			*
12			* Redistribution and use in source and binary forms, with or without
13			* modification, are permitted provided that the following conditions
14			* are met:
15			* 1. Redistributions of source code must retain the above copyright
16			* notice, this list of conditions and the following disclaimer.
17			* 2. Redistributions in binary form must reproduce the above copyright
18			* notice, this list of conditions and the following disclaimer in the
19			* documentation and/or other materials provided with the distribution.
20			* 3. All advertising materials mentioning features or use of this software
21			* must display the following acknowledgement:
22			* This product includes software developed by the University of
23			* California, Berkeley and its contributors.
24			* 4. Neither the name of the University nor the names of its contributors
25			* may be used to endorse or promote products derived from this software
26			* without specific prior written permission.
27			*
28			* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31			* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38			* SUCH DAMAGE.
39			*
40			* @(#)kn02.h 8.1 (Berkeley) 6/10/93
41			*/
42
43			/*
44			* Mach Operating System
45			* Copyright (c) 1991,1990,1989 Carnegie Mellon University
46			* All Rights Reserved.
47			*
48			* Permission to use, copy, modify and distribute this software and
49			* its documentation is hereby granted, provided that both the copyright
50			* notice and this permission notice appear in all copies of the
51			* software, derivative works or modified versions, and any portions
52			* thereof, and that both notices appear in supporting documentation.
53			*
54			* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
55			* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
56			* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
57			*
58			* Carnegie Mellon requests users of this software to return to
59			*
60			* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
61			* School of Computer Science
62			* Carnegie Mellon University
63			* Pittsburgh PA 15213-3890
64			*
65			* any improvements or extensions that they make and grant Carnegie the
66			* rights to redistribute these changes.
67			*/
68			/*
69			* HISTORY
70			* Log: kn02.h,v
71			* Revision 2.5 91/05/14 17:23:30 mrt
72			* Correcting copyright
73			*
74			* Revision 2.4 91/02/05 17:42:03 mrt
75			* Added author notices
76			* [91/02/04 11:14:23 mrt]
77			*
78			* Changed to use new Mach copyright
79			* [91/02/02 12:12:58 mrt]
80			*
81			* Revision 2.3 90/12/05 23:32:04 af
82			*
83			*
84			* Revision 2.1.1.2 90/11/01 02:48:10 af
85			* Reworked a bit, made reentrant.
86			*
87			* Revision 2.1.1.1 90/10/03 11:48:22 af
88			* Created, from the DEC specs:
89			* "DECstation 5000/200 KN02 System Module Functional Specification"
90			* Workstation Systems Engineering, Palo Alto, CA. Aug 27, 1990.
91			* [90/09/03 af]
92			*/
93			/*
94			* File: kn02.h
95			* Author: Alessandro Forin, Carnegie Mellon University
96			* Date: 9/90
97			*
98			* Definitions specific to the KN02 processor (3max)
99			*/
100
101			#ifndef MIPS_KN02_H
102			#define MIPS_KN02_H 1
103
104			/*
105			* KN02's Physical address space
106			*/
107			#define KN02_PHYS_MIN 0x00000000 /* 512 Meg */
108			#define KN02_PHYS_MAX 0x1fffffff
109
110			/*
111			* Memory map
112			*/
113			#define KN02_PHYS_MEMORY_START 0x00000000
114			#define KN02_PHYS_MEMORY_END 0x1dffffff /* 480 Meg in 15 slots */
115
116			/*
117			* I/O map
118			*/
119			#define KN02_PHYS_TC_0_START 0x1e000000 /* TURBOchannel, slot 0 */
120			#define KN02_PHYS_TC_0_END 0x1e3fffff /* 4 Meg, option0 */
121
122			#define KN02_PHYS_TC_1_START 0x1e400000 /* TURBOchannel, slot 1 */
123			#define KN02_PHYS_TC_1_END 0x1e7fffff /* 4 Meg, option1 */
124
125			#define KN02_PHYS_TC_2_START 0x1e800000 /* TURBOchannel, slot 2 */
126			#define KN02_PHYS_TC_2_END 0x1ebfffff /* 4 Meg, option2 */
127
128			#define KN02_PHYS_TC_3_START 0x1ec00000 /* TURBOchannel, slot 3 */
129			#define KN02_PHYS_TC_3_END 0x1effffff /* 4 Meg, reserved*/
130
131			#define KN02_PHYS_TC_4_START 0x1f000000 /* TURBOchannel, slot 4 */
132			#define KN02_PHYS_TC_4_END 0x1f3fffff /* 4 Meg, reserved*/
133
134			#define KN02_PHYS_TC_5_START 0x1f400000 /* TURBOchannel, slot 5 */
135			#define KN02_PHYS_TC_5_END 0x1f7fffff /* 4 Meg, SCSI */
136
137			#define KN02_PHYS_TC_6_START 0x1f800000 /* TURBOchannel, slot 6 */
138			#define KN02_PHYS_TC_6_END 0x1fbfffff /* 4 Meg, ether */
139
140			#define KN02_PHYS_TC_7_START 0x1fc00000 /* TURBOchannel, slot 7 */
141			#define KN02_PHYS_TC_7_END 0x1fffffff /* 4 Meg, system devices */
142
143			#define KN02_PHYS_TC_START KN02_PHYS_TC_0_START
144			#define KN02_PHYS_TC_END KN02_PHYS_TC_7_END /* 32 Meg */
145
146			#define KN02_TC_NSLOTS 8
147			#define KN02_TC_MIN 0
148			#define KN02_TC_MAX 6 /* don't look at system slot */
149
150			/*
151			* System devices
152			*/
153			#define KN02_SYS_ROM_START KN02_PHYS_TC_7_START+0x000000
154			#define KN02_SYS_ROM_END KN02_PHYS_TC_7_START+0x07ffff
155			#define KN02_SYS_RESERVED KN02_PHYS_TC_7_START+0x080000
156			#define KN02_SYS_CHKSYN KN02_PHYS_TC_7_START+0x100000
157			#define KN02_SYS_ERRADR KN02_PHYS_TC_7_START+0x180000
158			#define KN02_SYS_DZ KN02_PHYS_TC_7_START+0x200000
159			#define KN02_SYS_CLOCK KN02_PHYS_TC_7_START+0x280000
160			#define KN02_SYS_CSR KN02_PHYS_TC_7_START+0x300000
161			#define KN02_SYS_ROM1_START KN02_PHYS_TC_7_START+0x380000
162			#define KN02_SYS_ROM1_END KN02_PHYS_TC_7_START+0x3fffff
163
164			/*
165			* Interrupts
166			*/
167			#define KN02_INT_FPA IP_LEV7 /* Floating Point coproc */
168			#define KN02_INT_RES1 IP_LEV6 /* reserved, unused */
169			#define KN02_INT_MEM IP_LEV5 /* memory controller */
170			#define KN02_INT_RES2 IP_LEV4 /* reserved, unused */
171			#define KN02_INT_CLOCK IP_LEV3 /* RTC chip */
172			#define KN02_INT_IO IP_LEV2 /* I/O slots */
173
174			/*
175			* System board registers
176			*/
177			/* system Status and Control register */
178			#define KN02_CSR_IOINT 0x000000ff /* ro Interrupt pending */
179			# define KN02_IP_DZ 0x00000080 /* serial lines */
180			# define KN02_IP_LANCE 0x00000040 /* thin ethernet */
181			# define KN02_IP_SCSI 0x00000020 /* ASC scsi controller */
182			# define KN02_IP_XXXX 0x00000018 /* unused */
183			# define KN02_IP_SLOT2 0x00000004 /* option slot 2 */
184			# define KN02_IP_SLOT1 0x00000002 /* option slot 1 */
185			# define KN02_IP_SLOT0 0x00000001 /* option slot 0 */
186
187			#define KN02_CSR_BAUD38 0x00000100 /* rw Max DZ baud rate */
188			#define KN02_CSR_DIAGDN 0x00000200 /* rw Diag jumper */
189			#define KN02_CSR_BNK32M 0x00000400 /* rw Memory bank stride */
190			#define KN02_CSR_TXDIS 0x00000800 /* rw Disable DZ xmit */
191			#define KN02_CSR_LEDIAG 0x00001000 /* rw Latch ECC */
192			#define KN02_CSR_CORRECT 0x00002000 /* rw ECC corrects single bit */
193			#define KN02_CSR_ECCMD 0x0000c000 /* rw ECC logic mode */
194			#define KN02_CSR_IOINTEN 0x00ff0000 /* rw Interrupt enable */
195			#define KN02_CSR_IOINTEN_SHIFT 16
196			#define KN02_CSR_NRMMOD 0x01000000 /* ro Diag jumper state */
197			#define KN02_CSR_REFEVEN 0x02000000 /* ro Refreshing even mem bank */
198			#define KN02_CSR_PRSVNVR 0x04000000 /* ro Preserve NVR jumper */
199			#define KN02_CSR_PSWARN 0x08000000 /* ro PS overheating */
200			#define KN02_CSR_RRESERVED 0xf0000000 /* rz */
201
202			#define KN02_CSR_LEDS 0x000000ff /* wo Diag LEDs */
203			#define KN02_CSR_WRESERVED 0xff000000 /* wz */
204
205			/* Error address status register */
206			#define KN02_ERR_ADDRESS 0x07ffffff /* phys address */
207			#define KN02_ERR_RESERVED 0x08000000 /* unused */
208			#define KN02_ERR_ECCERR 0x10000000 /* ECC error */
209			#define KN02_ERR_WRITE 0x20000000 /* read/write transaction */
210			#define KN02_ERR_CPU 0x40000000 /* CPU or device initiator */
211			#define KN02_ERR_VALID 0x80000000 /* Info is valid */
212
213			/* ECC check/syndrome status register */
214			#define KN02_ECC_SYNLO 0x0000007f /* syndrome, even bank */
215			#define KN02_ECC_SNGLO 0x00000080 /* single bit err, " */
216			#define KN02_ECC_CHKLO 0x00007f00 /* check bits, " " */
217			#define KN02_ECC_VLDLO 0x00008000 /* info valid for " */
218			#define KN02_ECC_SYNHI 0x007f0000 /* syndrome, odd bank */
219			#define KN02_ECC_SNGHI 0x00800000 /* single bit err, " */
220			#define KN02_ECC_CHKHI 0x7f000000 /* check bits, " " */
221			#define KN02_ECC_VLDHI 0x80000000 /* info valid for " */
222
223			#endif /* MIPS_KN02_H */