25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: yamon.c,v 1.9 2006/12/30 13:31:03 debug Exp $ |
* $Id: yamon.c,v 1.13 2007/06/14 16:13:30 debug Exp $ |
29 |
* |
* |
30 |
* YAMON emulation. (Very basic, only what is needed to get NetBSD booting.) |
* YAMON emulation. (Very basic, only what is needed to get NetBSD booting.) |
31 |
*/ |
*/ |
43 |
#include "misc.h" |
#include "misc.h" |
44 |
#include "net.h" |
#include "net.h" |
45 |
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#ifdef ENABLE_MIPS |
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46 |
#include "yamon.h" |
#include "yamon.h" |
47 |
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48 |
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141 |
uint32_t ofs = (cpu->pc & 0xff) + YAMON_FUNCTION_BASE; |
uint32_t ofs = (cpu->pc & 0xff) + YAMON_FUNCTION_BASE; |
142 |
uint8_t ch; |
uint8_t ch; |
143 |
int n; |
int n; |
144 |
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uint32_t oid; |
145 |
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uint64_t paddr, psize; |
146 |
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147 |
switch (ofs) { |
switch (ofs) { |
148 |
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190 |
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191 |
case YAMON_SYSCON_READ_OFS: |
case YAMON_SYSCON_READ_OFS: |
192 |
/* |
/* |
193 |
* syscon |
* syscon_read(oid [a0], addr [a1], size [a2]) |
194 |
*/ |
*/ |
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fatal("[ yamon_emul(): syscon: TODO ]\n"); |
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195 |
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196 |
/* TODO. For now, return some kind of "failure": */ |
oid = cpu->cd.mips.gpr[MIPS_GPR_A0]; |
197 |
cpu->cd.mips.gpr[MIPS_GPR_V0] = 1; |
paddr = cpu->cd.mips.gpr[MIPS_GPR_A1]; |
198 |
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psize = cpu->cd.mips.gpr[MIPS_GPR_A2]; |
199 |
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200 |
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switch (oid) { |
201 |
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case SYSCON_BOARD_CPU_CLOCK_FREQ_ID: |
202 |
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if (psize == sizeof(uint32_t)) { |
203 |
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uint32_t freq = cpu->machine->emulated_hz; |
204 |
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205 |
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debug("[ yamon_emul(): reporting CPU " |
206 |
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"frequency of %u ]\n", (unsigned int) |
207 |
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freq); |
208 |
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209 |
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if (cpu->byte_order == EMUL_LITTLE_ENDIAN) |
210 |
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freq = LE32_TO_HOST(freq); |
211 |
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else |
212 |
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freq = BE32_TO_HOST(freq); |
213 |
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214 |
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cpu->memory_rw(cpu, cpu->mem, (int32_t)paddr, |
215 |
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(void *) &freq, sizeof(freq), MEM_WRITE, |
216 |
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CACHE_DATA | NO_EXCEPTIONS); |
217 |
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218 |
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cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; |
219 |
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} else { |
220 |
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cpu->cd.mips.gpr[MIPS_GPR_V0] = 1; |
221 |
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} |
222 |
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break; |
223 |
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224 |
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default: |
225 |
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fatal("[ yamon_emul(): unimplemented object id 0x%" |
226 |
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PRIx32" ]\n", oid); |
227 |
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cpu->cd.mips.gpr[MIPS_GPR_V0] = 1; |
228 |
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} |
229 |
break; |
break; |
230 |
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231 |
default:cpu_register_dump(cpu->machine, cpu, 1, 0); |
default: |
232 |
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cpu_register_dump(cpu->machine, cpu, 1, 0); |
233 |
printf("\n"); |
printf("\n"); |
234 |
fatal("[ yamon_emul(): unimplemented yamon function 0x%" |
fatal("[ yamon_emul(): unimplemented yamon function 0x%" |
235 |
PRIx32" ]\n", ofs); |
PRIx32" ]\n", ofs); |
239 |
return 1; |
return 1; |
240 |
} |
} |
241 |
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#endif /* ENABLE_MIPS */ |
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