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/* |
/* |
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* Copyright (C) 2003-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: ps2_bios.c,v 1.1 2005/08/29 14:46:34 debug Exp $ |
* $Id: ps2_bios.c,v 1.6 2007/06/14 16:13:30 debug Exp $ |
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* |
* |
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* Playstation 2 SIFBIOS emulation. |
* Playstation 2 SIFBIOS emulation. |
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*/ |
*/ |
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#include "cpu.h" |
#include "cpu.h" |
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#include "cpu_mips.h" |
#include "cpu_mips.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "misc.h" |
#include "memory.h" |
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extern int quiet_mode; |
extern int quiet_mode; |
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cpu->cd.mips.gpr[MIPS_GPR_V0] = 0x200; /* TODO */ |
cpu->cd.mips.gpr[MIPS_GPR_V0] = 0x200; /* TODO */ |
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break; |
break; |
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case 1: /* halt(int mode) */ |
case 1: /* halt(int mode) */ |
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debug("[ SIFBIOS halt(0x%llx) ]\n", |
debug("[ SIFBIOS halt(0x%"PRIx64") ]\n", |
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(long long)cpu->cd.mips.gpr[MIPS_GPR_A1]); |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1]); |
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cpu->running = 0; |
cpu->running = 0; |
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cpu->dead = 1; |
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break; |
break; |
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case 2: /* setdve(int mode) */ |
case 2: /* setdve(int mode) */ |
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debug("[ SIFBIOS setdve(0x%llx) ]\n", |
debug("[ SIFBIOS setdve(0x%"PRIx64") ]\n", |
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(long long)cpu->cd.mips.gpr[MIPS_GPR_A1]); |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1]); |
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break; |
break; |
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case 3: /* putchar(int ch) */ |
case 3: /* putchar(int ch) */ |
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/* debug("[ SIFBIOS putchar(0x%x) ]\n", |
/* debug("[ SIFBIOS putchar(0x%x) ]\n", |
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cpu->cd.mips.gpr[MIPS_GPR_V0] = 1; /* TODO */ |
cpu->cd.mips.gpr[MIPS_GPR_V0] = 1; /* TODO */ |
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break; |
break; |
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case 64: |
case 64: |
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fatal("[ SIFBIOS SBR_IOPH_INIT(0x%x,0x%x,0x%x): TODO ]\n", |
fatal("[ SIFBIOS SBR_IOPH_INIT(0x%"PRIx32",0x%"PRIx32",0x%" |
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(int)cpu->cd.mips.gpr[MIPS_GPR_A1], |
PRIx32"): TODO ]\n", |
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(int)cpu->cd.mips.gpr[MIPS_GPR_A2], |
(uint32_t) cpu->cd.mips.gpr[MIPS_GPR_A1], |
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(int)cpu->cd.mips.gpr[MIPS_GPR_A3]); |
(uint32_t) cpu->cd.mips.gpr[MIPS_GPR_A2], |
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(uint32_t) cpu->cd.mips.gpr[MIPS_GPR_A3]); |
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/* |
/* |
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* This is really really ugly: TODO |
* This is really really ugly: TODO |
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cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; |
cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; |
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break; |
break; |
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case 65: |
case 65: |
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fatal("[ SIFBIOS alloc iop heap(0x%x) ]\n", |
fatal("[ SIFBIOS alloc iop heap(0x"PRIx32") ]\n", |
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(int)cpu->cd.mips.gpr[MIPS_GPR_A1]); |
(uint32_t)cpu->cd.mips.gpr[MIPS_GPR_A1]); |
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|
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/* |
/* |
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* Linux uses this to allocate "heap" for the OHCI USB |
* Linux uses this to allocate "heap" for the OHCI USB |
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fatal("Playstation 2 SIFBIOS emulation: " |
fatal("Playstation 2 SIFBIOS emulation: " |
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"unimplemented call nr 0x%x\n", callnr); |
"unimplemented call nr 0x%x\n", callnr); |
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cpu->running = 0; |
cpu->running = 0; |
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cpu->dead = 1; |
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} |
} |
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return 1; |
return 1; |