/[gxemul]/trunk/src/promemul/dec_prom.c
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Annotation of /trunk/src/promemul/dec_prom.c

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Revision 44 - (hide annotations)
Mon Oct 8 16:22:56 2007 UTC (16 years, 8 months ago) by dpavlin
File MIME type: text/plain
File size: 19401 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1632 2007/09/11 21:46:35 debug Exp $
20070616	Implementing the MIPS32/64 revision 2 "ror" instruction.
20070617	Adding a struct for each physpage which keeps track of which
		ranges within that page (base offset, length) that are
		continuously translatable. When running with native code
		generation enabled (-b), a range is added after each read-
		ahead loop.
		Experimenting with using the physical program counter sample
		data (implemented 20070608) together with the "translatable
		range" information, to figure out which physical address ranges
		would be worth translating to native code (if the number of
		samples falling within a range is above a certain threshold).
20070618	Adding automagic building of .index comment files for
		src/file/, src/promemul/, src src/useremul/ as well.
		Adding a "has been translated" bit to the ranges, so that only
		not-yet-translated ranges will be sampled.
20070619	Moving src/cpu.c and src/memory_rw.c into src/cpus/,
		src/device.c into src/devices/, and src/machine.c into
		src/machines/.
		Creating a skeleton cc/ld native backend module; beginning on
		the function which will detect cc command line, etc.
20070620	Continuing on the native code generation infrastructure.
20070621	Moving src/x11.c and src/console.c into a new src/console/
		subdir (for everything that is console or framebuffer related).
		Moving src/symbol*.c into a new src/symbol/, which should
		contain anything that is symbol handling related.
20070624	Making the program counter sampling threshold a "settings
		variable" (sampling_threshold), i.e. it can now be changed
		during runtime.
		Switching the RELEASE notes format from plain text to HTML.
		If the TMPDIR environment variable is set, it is used instead
		of "/tmp" for temporary files.
		Continuing on the cc/ld backend: simple .c code is generated,
		the compiler and linker are called, etc.
		Adding detection of host architecture to the configure script
		(again), and adding icache invalidation support (only
		implemented for Alpha hosts so far).
20070625	Simplifying the program counter sampling mechanism.
20070626	Removing the cc/ld native code generation stuff, program
		counter sampling, etc; it would not have worked well in the
		general case.
20070627	Removing everything related to native code generation.
20070629	Removing the (practically unusable) support for multiple
		emulations. (The single emulation allowed now still supports
		multiple simultaneous machines, as before.)
		Beginning on PCCTWO and M88K interrupts.
20070723	Adding a dummy skeleton for emulation of M32R processors.
20070901	Fixing a warning found by "gcc version 4.3.0 20070817
		(experimental)" on amd64.
20070905	Removing some more traces of the old "multiple emulations"
		code.
		Also looking in /usr/local/include and /usr/local/lib for
		X11 libs, when running configure.
20070909	Minor updates to the guest OS install instructions, in
		preparation for the NetBSD 4.0 release.
20070918	More testing of NetBSD 4.0 RC1.

1 dpavlin 14 /*
2 dpavlin 34 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 dpavlin 14 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 44 * $Id: dec_prom.c,v 1.14 2007/06/17 23:32:20 debug Exp $
29 dpavlin 14 *
30 dpavlin 44 * COMMENT: DECstation PROM emulation
31 dpavlin 24 *
32     * Implementation note: Remember that only the lowest 32 bits of GPRs are
33     * actually valid when using dyntrans with e.g. R3000 CPUs.
34 dpavlin 14 */
35    
36     #include <stdio.h>
37     #include <stdlib.h>
38     #include <string.h>
39     #include <sys/types.h>
40     #include <sys/time.h>
41     #include <sys/resource.h>
42    
43     #include "console.h"
44     #include "cpu.h"
45     #include "cpu_mips.h"
46     #include "diskimage.h"
47     #include "machine.h"
48 dpavlin 42 #include "machine_pmax.h"
49 dpavlin 14 #include "memory.h"
50     #include "misc.h"
51    
52     #include "dec_prom.h"
53     #include "dec_5100.h"
54     #include "dec_kn01.h"
55     #include "dec_kn02.h"
56     #include "dec_kn03.h"
57    
58    
59     extern int quiet_mode;
60    
61    
62     /*
63     * mem_readchar():
64     *
65     * Reads a byte from emulated RAM, using a MIPS register as a base address.
66     * (Helper function.)
67     */
68     static unsigned char mem_readchar(struct cpu *cpu, int regbase, int offset)
69 dpavlin 24 {
70 dpavlin 14 unsigned char ch;
71 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)cpu->cd.mips.gpr[regbase] +
72     offset, &ch, sizeof(ch), MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
73 dpavlin 14 return ch;
74     }
75    
76    
77     /*
78     * dec_jumptable_func():
79     *
80     * The jumptable is located at the beginning of the PROM, at 0xbfc00000 + i*8,
81     * where i is the decimal function number. Many of these can be converted to
82     * an identical callback function.
83     *
84     * Return value is non-zero if the vector number was converted into a callback
85     * function number, otherwise 0.
86     *
87     * Vector (dec) Function
88     * 0x0 0 reset()
89     * 0x10 2 restart()
90     * 0x18 3 reinit()
91     * 0x30 6 open()
92     * 0x38 7 read()
93     * 0x58 11 lseek()
94     * 0x68 13 putchar()
95     * 0x88 17 printf()
96     * 0x108 33 getenv2()
97     */
98     int dec_jumptable_func(struct cpu *cpu, int vector)
99     {
100     int i;
101     static int file_opened = 0;
102     static int current_file_offset = 0;
103    
104     switch (vector) {
105     case 0x0: /* reset() */
106     /* TODO */
107     cpu->machine->exit_without_entering_debugger = 1;
108     cpu->running = 0;
109     break;
110     case 0x10: /* restart() */
111     /* TODO */
112     cpu->machine->exit_without_entering_debugger = 1;
113     cpu->running = 0;
114     break;
115     case 0x18: /* reinit() */
116     /* TODO */
117     cpu->machine->exit_without_entering_debugger = 1;
118     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
119     break;
120     case 0x30: /* open() */
121     /*
122     * TODO: This is just a hack to allow Sprite/pmax' bootblock
123     * code to load /vmsprite. The filename argument (in A0)
124     * is ignored, and a file handle value of 1 is returned.
125     */
126     if (file_opened) {
127     fatal("\ndec_jumptable_func(): opening more than one "
128     "file isn't supported yet.\n");
129     cpu->running = 0;
130     }
131     file_opened = 1;
132     cpu->cd.mips.gpr[MIPS_GPR_V0] = 1;
133     break;
134     case 0x38: /* read(handle, ptr, length) */
135     cpu->cd.mips.gpr[MIPS_GPR_V0] = -1;
136     if ((int32_t)cpu->cd.mips.gpr[MIPS_GPR_A2] > 0) {
137     int disk_id = diskimage_bootdev(cpu->machine, NULL);
138     int res;
139     unsigned char *tmp_buf;
140    
141 dpavlin 42 CHECK_ALLOCATION(tmp_buf =
142     malloc(cpu->cd.mips.gpr[MIPS_GPR_A2]));
143 dpavlin 14
144     res = diskimage_access(cpu->machine, disk_id,
145     DISKIMAGE_SCSI, 0, current_file_offset, tmp_buf,
146     cpu->cd.mips.gpr[MIPS_GPR_A2]);
147    
148     /* If the transfer was successful, transfer the data
149     to emulated memory: */
150     if (res) {
151     uint64_t dst = cpu->cd.mips.gpr[MIPS_GPR_A1];
152     store_buf(cpu, dst, (char *)tmp_buf,
153     cpu->cd.mips.gpr[MIPS_GPR_A2]);
154     cpu->cd.mips.gpr[MIPS_GPR_V0] =
155     cpu->cd.mips.gpr[MIPS_GPR_A2];
156     current_file_offset +=
157     cpu->cd.mips.gpr[MIPS_GPR_A2];
158     }
159    
160     free(tmp_buf);
161     }
162     break;
163     case 0x58: /* lseek(handle, offset[, whence]) */
164     /* TODO */
165     if (cpu->cd.mips.gpr[MIPS_GPR_A2] == 0)
166     current_file_offset = cpu->cd.mips.gpr[MIPS_GPR_A1];
167     else
168     fatal("WARNING! Unimplemented whence in "
169     "dec_jumptable_func()\n");
170     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
171     break;
172     case 0x68: /* putchar() */
173     console_putchar(cpu->machine->main_console_handle,
174     cpu->cd.mips.gpr[MIPS_GPR_A0]);
175     break;
176     case 0x88: /* printf() */
177     return 0x30;
178     case 0x108: /* getenv2() */
179     return 0x64;
180     default:
181     cpu_register_dump(cpu->machine, cpu, 1, 0x1);
182     printf("a0 points to: ");
183     for (i=0; i<40; i++) {
184     unsigned char ch = '\0';
185     cpu->memory_rw(cpu, cpu->mem,
186 dpavlin 24 (int32_t)cpu->cd.mips.gpr[MIPS_GPR_A0] + i, &ch,
187 dpavlin 14 sizeof(ch), MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
188     if (ch >= ' ' && ch < 126)
189     printf("%c", ch);
190     else
191     printf("[%02x]", ch);
192     }
193     printf("\n");
194     fatal("PROM emulation: unimplemented JUMP TABLE vector "
195     "0x%x (decimal function %i)\n", vector, vector/8);
196     cpu->running = 0;
197     }
198    
199     return 0;
200     }
201    
202    
203     /*
204     * decstation_prom_emul():
205     *
206     * DECstation PROM emulation.
207     *
208     * Callback functions:
209     * 0x0c strcmp()
210     * 0x14 strlen()
211     * 0x24 getchar()
212     * 0x28 gets()
213     * 0x2c puts()
214     * 0x30 printf()
215     * 0x38 iopoll()
216     * 0x54 bootinit()
217     * 0x58 bootread()
218     * 0x64 getenv()
219     * 0x6c slot_address()
220     * 0x70 wbflush()
221     * 0x7c clear_cache()
222     * 0x80 getsysid()
223     * 0x84 getbitmap()
224     * 0x88 disableintr()
225     * 0x8c enableintr()
226     * 0x9c halt()
227     * 0xa4 gettcinfo()
228     * 0xa8 execute_cmd()
229     * 0xac rex()
230     */
231     int decstation_prom_emul(struct cpu *cpu)
232     {
233     int i, j, ch, argreg, argdata;
234     int vector = cpu->pc & 0xfff;
235     int callback = (cpu->pc & 0xf000)? 1 : 0;
236     unsigned char buf[100];
237     unsigned char ch1, ch2, ch3;
238     uint64_t tmpaddr, slot_base = 0x10000000, slot_size = 0;
239    
240     if (!callback) {
241     vector = dec_jumptable_func(cpu, vector);
242     if (vector == 0)
243     return 1;
244     } else {
245     /* Vector number is n*4, PC points to n*8. */
246     vector /= 2;
247     }
248    
249     switch (vector) {
250     case 0x0c: /* strcmp(): */
251     i = j = 0;
252     do {
253     ch1 = mem_readchar(cpu, MIPS_GPR_A0, i++);
254     ch2 = mem_readchar(cpu, MIPS_GPR_A1, j++);
255     } while (ch1 == ch2 && ch1 != '\0');
256    
257     /* If ch1=='\0', then strings are equal. */
258     if (ch1 == '\0')
259     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
260     if ((signed char)ch1 > (signed char)ch2)
261     cpu->cd.mips.gpr[MIPS_GPR_V0] = 1;
262     if ((signed char)ch1 < (signed char)ch2)
263     cpu->cd.mips.gpr[MIPS_GPR_V0] = -1;
264     break;
265     case 0x14: /* strlen(): */
266     i = 0;
267     do {
268     ch2 = mem_readchar(cpu, MIPS_GPR_A0, i++);
269     } while (ch2 != 0);
270     cpu->cd.mips.gpr[MIPS_GPR_V0] = i - 1;
271     break;
272     case 0x24: /* getchar() */
273     /* debug("[ DEC PROM getchar() ]\n"); */
274     cpu->cd.mips.gpr[MIPS_GPR_V0] = console_readchar(
275     cpu->machine->main_console_handle);
276     break;
277     case 0x28: /* gets() */
278     /* debug("[ DEC PROM gets() ]\n"); */
279     tmpaddr = cpu->cd.mips.gpr[MIPS_GPR_A0];
280     i = 0;
281    
282     /* TODO: Make this not hang (block) the entire emulator */
283    
284     do {
285     while ((ch = console_readchar(
286     cpu->machine->main_console_handle)) < 1)
287     ;
288     if (ch == '\r')
289     ch = '\n';
290     ch2 = ch;
291    
292     if (ch == '\b') {
293     if (i > 0) {
294     console_putchar(cpu->machine->
295     main_console_handle, ch2);
296     console_putchar(cpu->machine->
297     main_console_handle, ' ');
298     console_putchar(cpu->machine->
299     main_console_handle, ch2);
300     }
301     } else
302     console_putchar(cpu->machine->
303     main_console_handle, ch2);
304    
305     fflush(stdout);
306    
307     if (ch == '\n') {
308     /* It seems that trailing newlines
309     are not included in the buffer. */
310     } else if (ch != '\b') {
311 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)
312 dpavlin 14 cpu->cd.mips.gpr[MIPS_GPR_A0] + i,
313     &ch2, sizeof(ch2), MEM_WRITE,
314     CACHE_DATA | NO_EXCEPTIONS);
315     i++;
316     } else {
317     if (i > 0)
318     i--;
319     }
320     } while (ch2 != '\n');
321    
322     /* Trailing nul-byte: */
323     ch2 = '\0';
324 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)
325     cpu->cd.mips.gpr[MIPS_GPR_A0] + i, &ch2, sizeof(ch2),
326     MEM_WRITE, CACHE_DATA | NO_EXCEPTIONS);
327 dpavlin 14
328     /* Return the input argument: */
329     cpu->cd.mips.gpr[MIPS_GPR_V0] = cpu->cd.mips.gpr[MIPS_GPR_A0];
330     break;
331     case 0x2c: /* puts() */
332     i = 0;
333     while ((ch = mem_readchar(cpu, MIPS_GPR_A0, i++)) != '\0')
334     console_putchar(cpu->machine->main_console_handle, ch);
335     console_putchar(cpu->machine->main_console_handle, '\n');
336     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
337     break;
338     case 0x30: /* printf() */
339     if (cpu->machine->register_dump ||
340     cpu->machine->instruction_trace)
341     debug("PROM printf(0x%08lx): \n",
342     (long)cpu->cd.mips.gpr[MIPS_GPR_A0]);
343    
344     i = 0; ch = -1; argreg = MIPS_GPR_A1;
345     while (ch != '\0') {
346     char printfbuf[8000];
347 dpavlin 22 size_t x;
348 dpavlin 14
349     printfbuf[0] = printfbuf[sizeof(printfbuf)-1] = '\0';
350    
351     ch = mem_readchar(cpu, MIPS_GPR_A0, i++);
352     switch (ch) {
353     case '%':
354     ch = '0';
355     while (ch >= '0' && ch <= '9')
356     ch = mem_readchar(cpu,
357     MIPS_GPR_A0, i++);
358    
359     switch (ch) {
360     case '%':
361     strlcpy(printfbuf, "%%",
362     sizeof(printfbuf));
363     break;
364     case 'c':
365     case 'd':
366     case 's':
367     case 'x':
368     /* Get argument: */
369     if (argreg > MIPS_GPR_A3) {
370     #if 1
371     /* Linux booters seem to go
372     over the edge sometimes: */
373     ch = '\0';
374     strlcpy(printfbuf, "[...]\n",
375     sizeof(printfbuf));
376     #else
377     printf("[ decstation_prom_emul"
378     "(): too many arguments ]");
379     /* This reuses the last arg,
380     which is utterly incorrect.
381     (TODO) */
382     argreg = MIPS_GPR_A3;
383     #endif
384     }
385    
386     ch2 = argdata =
387     cpu->cd.mips.gpr[argreg];
388    
389     switch (ch) {
390     case 'c':
391     snprintf(printfbuf, sizeof(
392     printfbuf), "%c", ch2);
393     break;
394     case 'd':
395     snprintf(printfbuf, sizeof(
396     printfbuf), "%d", argdata);
397     break;
398     case 'x':
399     snprintf(printfbuf, sizeof(
400     printfbuf), "%x", argdata);
401     break;
402     case 's':
403     /* Print a "%s" string. */
404     j = 0; ch3 = '\n';
405     while (ch2) {
406     ch2 = mem_readchar(cpu,
407     argreg, j++);
408     if (ch2) {
409     snprintf(
410     printfbuf +
411     strlen(
412     printfbuf),
413     sizeof(
414     printfbuf)-
415     1-strlen(
416     printfbuf),
417     "%c", ch2);
418     ch3 = ch2;
419     }
420     }
421     break;
422     }
423     argreg ++;
424     break;
425     default:
426     printf("[ unknown printf format char"
427     " '%c' ]", ch);
428     }
429     break;
430     case '\0':
431     break;
432     default:
433     snprintf(printfbuf, sizeof(printfbuf),
434     "%c", ch);
435     }
436    
437     printfbuf[sizeof(printfbuf)-1] = '\0';
438    
439     for (x=0; x<strlen(printfbuf); x++)
440     console_putchar(cpu->machine->
441     main_console_handle, printfbuf[x]);
442     }
443     if (cpu->machine->register_dump ||
444     cpu->machine->instruction_trace)
445     debug("\n");
446     fflush(stdout);
447     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
448     break;
449     case 0x54: /* bootinit() */
450     /* debug("[ DEC PROM bootinit(0x%08x): TODO ]\n",
451     (int)cpu->cd.mips.gpr[MIPS_GPR_A0]); */
452     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
453     break;
454     case 0x58: /* bootread(int b, void *buffer, int n) */
455     /*
456     * Read data from the boot device.
457     * b is a sector number (512 bytes per sector),
458     * buffer is the destination address, and n
459     * is the number of _bytes_ to read.
460     *
461     * TODO: Return value? NetBSD thinks that 0 is ok.
462     */
463     debug("[ DEC PROM bootread(0x%x, 0x%08x, 0x%x) ]\n",
464     (int)cpu->cd.mips.gpr[MIPS_GPR_A0],
465     (int)cpu->cd.mips.gpr[MIPS_GPR_A1],
466     (int)cpu->cd.mips.gpr[MIPS_GPR_A2]);
467    
468     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
469    
470     if ((int32_t)cpu->cd.mips.gpr[MIPS_GPR_A2] > 0) {
471     int disk_id = diskimage_bootdev(cpu->machine, NULL);
472     int res;
473     unsigned char *tmp_buf;
474    
475 dpavlin 42 CHECK_ALLOCATION(tmp_buf =
476     malloc(cpu->cd.mips.gpr[MIPS_GPR_A2]));
477 dpavlin 14
478     res = diskimage_access(cpu->machine, disk_id,
479     DISKIMAGE_SCSI, 0,
480     cpu->cd.mips.gpr[MIPS_GPR_A0] * 512, tmp_buf,
481     cpu->cd.mips.gpr[MIPS_GPR_A2]);
482    
483     /* If the transfer was successful, transfer the data
484     to emulated memory: */
485     if (res) {
486     uint64_t dst = cpu->cd.mips.gpr[MIPS_GPR_A1];
487     if (dst < 0x80000000ULL)
488     dst |= 0x80000000;
489    
490     store_buf(cpu, dst, (char *)tmp_buf,
491     cpu->cd.mips.gpr[MIPS_GPR_A2]);
492     cpu->cd.mips.gpr[MIPS_GPR_V0] =
493     cpu->cd.mips.gpr[MIPS_GPR_A2];
494     }
495    
496     free(tmp_buf);
497     }
498     break;
499     case 0x64: /* getenv() */
500     /* Find the environment variable given by a0: */
501 dpavlin 22 for (i=0; i<(int)sizeof(buf); i++)
502 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)
503 dpavlin 14 cpu->cd.mips.gpr[MIPS_GPR_A0] + i, &buf[i],
504     sizeof(char), MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
505     buf[sizeof(buf)-1] = '\0';
506     debug("[ DEC PROM getenv(\"%s\") ]\n", buf);
507     for (i=0; i<0x1000; i++) {
508     /* Matching string at offset i? */
509     int nmatches = 0;
510 dpavlin 22 for (j=0; j<(int32_t)strlen((char *)buf); j++) {
511 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)
512 dpavlin 14 (DEC_PROM_STRINGS + i + j), &ch2,
513     sizeof(char), MEM_READ, CACHE_DATA |
514     NO_EXCEPTIONS);
515     if (ch2 == buf[j])
516     nmatches++;
517     }
518 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)(DEC_PROM_STRINGS
519 dpavlin 14 + i + strlen((char *)buf)), &ch2, sizeof(char),
520     MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
521 dpavlin 22 if (nmatches == (int)strlen((char *)buf) && ch2=='=') {
522 dpavlin 14 cpu->cd.mips.gpr[MIPS_GPR_V0] =
523     DEC_PROM_STRINGS + i +
524     strlen((char *)buf) + 1;
525     return 1;
526     }
527     }
528     /* Return NULL if string wasn't found. */
529     fatal("[ DEC PROM getenv(\"%s\"): WARNING: Not in "
530     "environment! ]\n", buf);
531     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
532     break;
533     case 0x6c: /* ulong slot_address(int sn) */
534     debug("[ DEC PROM slot_address(%i) ]\n",
535     (int)cpu->cd.mips.gpr[MIPS_GPR_A0]);
536     /* TODO: This is too hardcoded. */
537     /* TODO 2: Should these be physical or virtual addresses? */
538     switch (cpu->machine->machine_subtype) {
539     case MACHINE_DEC_3MAX_5000:
540     slot_base = KN02_PHYS_TC_0_START;/* 0x1e000000 */
541     slot_size = 4*1048576; /* 4 MB */
542     break;
543     case MACHINE_DEC_3MIN_5000:
544     slot_base = 0x10000000;
545     slot_size = 0x4000000; /* 64 MB */
546     break;
547     case MACHINE_DEC_3MAXPLUS_5000:
548     slot_base = 0x1e000000;
549     slot_size = 0x800000; /* 8 MB */
550     break;
551     case MACHINE_DEC_MAXINE_5000:
552     slot_base = 0x10000000;
553     slot_size = 0x4000000; /* 64 MB */
554     break;
555     default:
556     fatal("warning: DEC PROM slot_address() "
557     "unimplemented for this machine type\n");
558     }
559     cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t)(int32_t)
560     (0x80000000 + slot_base + slot_size *
561     cpu->cd.mips.gpr[MIPS_GPR_A0]);
562     break;
563     case 0x70: /* wbflush() */
564     debug("[ DEC PROM wbflush(): TODO ]\n");
565     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
566     break;
567     case 0x7c: /* clear_cache(addr, len) */
568     debug("[ DEC PROM clear_cache(0x%x,%i) ]\n",
569     (uint32_t)cpu->cd.mips.gpr[MIPS_GPR_A0],
570     (int)cpu->cd.mips.gpr[MIPS_GPR_A1]);
571     /* TODO */
572     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* ? */
573     break;
574     case 0x80: /* getsysid() */
575     /* debug("[ DEC PROM getsysid() ]\n"); */
576     /* TODO: why did I add the 0x82 stuff??? */
577     cpu->cd.mips.gpr[MIPS_GPR_V0] = ((uint32_t)0x82 << 24)
578     + (cpu->machine->machine_subtype << 16) + (0x3 << 8);
579     cpu->cd.mips.gpr[MIPS_GPR_V0] =
580     (int64_t)(int32_t)cpu->cd.mips.gpr[MIPS_GPR_V0];
581     break;
582     case 0x84: /* getbitmap() */
583     debug("[ DEC PROM getbitmap(0x%08x) ]\n",
584     (int)cpu->cd.mips.gpr[MIPS_GPR_A0]);
585     store_buf(cpu, cpu->cd.mips.gpr[MIPS_GPR_A0],
586 dpavlin 42 (char *)cpu->machine->md.pmax->memmap,
587 dpavlin 24 sizeof(struct dec_memmap));
588     cpu->cd.mips.gpr[MIPS_GPR_V0] =
589 dpavlin 42 sizeof(cpu->machine->md.pmax->memmap->bitmap);
590 dpavlin 14 break;
591     case 0x88: /* disableintr() */
592     debug("[ DEC PROM disableintr(): TODO ]\n");
593     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
594     break;
595     case 0x8c: /* enableintr() */
596     debug("[ DEC PROM enableintr(): TODO ]\n");
597     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
598     break;
599     case 0x9c: /* halt() */
600     debug("[ DEC PROM halt() ]\n");
601     cpu->machine->exit_without_entering_debugger = 1;
602     cpu->running = 0;
603     break;
604     case 0xa4: /* gettcinfo() */
605     /*
606     * These are just bogus values... TODO
607     *
608     * 0: revision
609     * 4: clock period in nano seconds
610     * 8: slot size in megabytes TODO: not same for all models!
611     * 12: I/O timeout in cycles
612     * 16: DMA address range in megabytes
613     * 20: maximum DMA burst length
614     * 24: turbochannel parity (yes = 1)
615     * 28: reserved
616     */
617     store_32bit_word(cpu, DEC_PROM_TCINFO + 0, 0);
618     store_32bit_word(cpu, DEC_PROM_TCINFO + 4, 50);
619     store_32bit_word(cpu, DEC_PROM_TCINFO + 8, 4);
620     store_32bit_word(cpu, DEC_PROM_TCINFO + 12, 10);
621     store_32bit_word(cpu, DEC_PROM_TCINFO + 16, 1);
622     store_32bit_word(cpu, DEC_PROM_TCINFO + 20, 100);
623     store_32bit_word(cpu, DEC_PROM_TCINFO + 24, 0);
624     store_32bit_word(cpu, DEC_PROM_TCINFO + 28, 0);
625     cpu->cd.mips.gpr[MIPS_GPR_V0] = DEC_PROM_TCINFO;
626     break;
627     case 0xa8: /* int execute_cmd(char *) */
628     i = 0;
629     while ((ch = mem_readchar(cpu, MIPS_GPR_A0, i++)) != '\0')
630     console_putchar(cpu->machine->main_console_handle, ch);
631     console_putchar(cpu->machine->main_console_handle, '\n');
632     cpu->cd.mips.gpr[MIPS_GPR_V0] = 0;
633     break;
634     case 0xac: /* rex() */
635     debug("[ DEC PROM rex('%c') ]\n",
636     (int)cpu->cd.mips.gpr[MIPS_GPR_A0]);
637 dpavlin 24 switch ((int32_t)cpu->cd.mips.gpr[MIPS_GPR_A0]) {
638 dpavlin 14 case 'h':
639     debug("DEC PROM: rex('h') ==> halt\n");
640     cpu->machine->exit_without_entering_debugger = 1;
641     cpu->running = 0;
642     break;
643     case 'b':
644     debug("DEC PROM: rex('b') ==> reboot: TODO "
645     "(halting CPU instead)\n");
646     cpu->machine->exit_without_entering_debugger = 1;
647     cpu->running = 0;
648     break;
649     default:
650 dpavlin 24 fatal("DEC prom emulation: unknown rex() a0=0x%"PRIx64
651     " ('%c')\n",
652     (int64_t) cpu->cd.mips.gpr[MIPS_GPR_A0],
653     (char) cpu->cd.mips.gpr[MIPS_GPR_A0]);
654 dpavlin 14 cpu->running = 0;
655     }
656     break;
657     default:
658     cpu_register_dump(cpu->machine, cpu, 1, 0x1);
659     printf("a0 points to: ");
660     for (i=0; i<40; i++) {
661     unsigned char ch = '\0';
662 dpavlin 24 cpu->memory_rw(cpu, cpu->mem, (int32_t)
663 dpavlin 14 cpu->cd.mips.gpr[MIPS_GPR_A0] + i, &ch,
664     sizeof(ch), MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
665     if (ch >= ' ' && ch < 126)
666     printf("%c", ch);
667     else
668     printf("[%02x]", ch);
669     }
670     printf("\n");
671     fatal("PROM emulation: unimplemented callback vector 0x%x\n",
672     vector);
673     cpu->running = 0;
674     }
675    
676     return 1;
677     }
678    

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