25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: arcbios.c,v 1.5 2006/02/09 22:40:27 debug Exp $ |
* $Id: arcbios.c,v 1.8 2006/04/15 08:21:07 debug Exp $ |
29 |
* |
* |
30 |
* ARCBIOS emulation. |
* ARCBIOS emulation. |
31 |
*/ |
*/ |
699 |
uint64_t eparent, echild, epeer, tmp; |
uint64_t eparent, echild, epeer, tmp; |
700 |
unsigned char buf[8]; |
unsigned char buf[8]; |
701 |
|
|
702 |
/* debug("[ addchild: peeraddr = 0x%016llx ]\n", |
/* debug("[ addchild: peeraddr = 0x%016"PRIx64" ]\n", |
703 |
(long long)peeraddr); */ |
(uint64_t) peeraddr); */ |
704 |
|
|
705 |
cpu->memory_rw(cpu, cpu->mem, |
cpu->memory_rw(cpu, cpu->mem, |
706 |
peeraddr + 0 * machine->md.arc.wordlen, &buf[0], |
peeraddr + 0 * machine->md.arc.wordlen, &buf[0], |
744 |
+ ((uint64_t)buf[4] << 32) + ((uint64_t)buf[5] << 40) |
+ ((uint64_t)buf[4] << 32) + ((uint64_t)buf[5] << 40) |
745 |
+ ((uint64_t)buf[6] << 48) + ((uint64_t)buf[7] << 56); |
+ ((uint64_t)buf[6] << 48) + ((uint64_t)buf[7] << 56); |
746 |
|
|
747 |
/* debug(" epeer=%llx echild=%llx eparent=%llx\n", |
/* debug(" epeer=%"PRIx64" echild=%"PRIx64" eparent=%"PRIx64 |
748 |
(long long)epeer, (long long)echild, |
"\n", (uint64_t) epeer, (uint64_t) echild, |
749 |
(long long)eparent); */ |
(uint64_t) eparent); */ |
750 |
|
|
751 |
if (eparent == parent && epeer == 0) { |
if (eparent == parent && epeer == 0) { |
752 |
epeer = a; |
epeer = a; |
753 |
store_64bit_word(cpu, peeraddr + 0 * |
store_64bit_word(cpu, peeraddr + 0 * |
754 |
machine->md.arc.wordlen, epeer); |
machine->md.arc.wordlen, epeer); |
755 |
/* debug("[ addchild: adding 0x%016llx as peer " |
/* debug("[ addchild: adding 0x%016"PRIx64" as peer " |
756 |
"to 0x%016llx ]\n", (long long)a, |
"to 0x%016"PRIx64" ]\n", (uint64_t) a, |
757 |
(long long)peeraddr); */ |
(uint64_t) peeraddr); */ |
758 |
} |
} |
759 |
if (peeraddr == parent && echild == 0) { |
if (peeraddr == parent && echild == 0) { |
760 |
echild = a; |
echild = a; |
761 |
store_64bit_word(cpu, peeraddr + 1 * |
store_64bit_word(cpu, peeraddr + 1 * |
762 |
machine->md.arc.wordlen, echild); |
machine->md.arc.wordlen, echild); |
763 |
/* debug("[ addchild: adding 0x%016llx as child " |
/* debug("[ addchild: adding 0x%016"PRIx64" as child " |
764 |
"to 0x%016llx ]\n", (long long)a, |
"to 0x%016"PRIx64" ]\n", (uint64_t) a, |
765 |
(long long)peeraddr); */ |
(uint64_t) peeraddr); */ |
766 |
} |
} |
767 |
|
|
768 |
/* Go to the next component: */ |
/* Go to the next component: */ |
869 |
machine->md.arc.next_component_address + |
machine->md.arc.next_component_address + |
870 |
(cpu->machine->md.arc.arc_64bit? 0x18 : 0x0c); |
(cpu->machine->md.arc.arc_64bit? 0x18 : 0x0c); |
871 |
|
|
872 |
/* printf("& ADDING %i: configdata=0x%016llx " |
/* printf("& ADDING %i: configdata=0x%016"PRIx64" " |
873 |
"component=0x%016llx\n", |
"component=0x%016"PRIx64"\n", |
874 |
machine->md.arc.n_configuration_data, |
machine->md.arc.n_configuration_data, |
875 |
(long long)machine->md.arc.configuration_data_configdata[ |
(uint64_t) machine->md.arc.configuration_data_configdata[ |
876 |
machine->md.arc.n_configuration_data], |
machine->md.arc.n_configuration_data], |
877 |
(long long)machine->md.arc.configuration_data_component[ |
(uint64_t) machine->md.arc.configuration_data_component[ |
878 |
machine->md.arc.n_configuration_data]); */ |
machine->md.arc.n_configuration_data]); */ |
879 |
|
|
880 |
machine->md.arc.n_configuration_data ++; |
machine->md.arc.n_configuration_data ++; |
947 |
ugly_goto: |
ugly_goto: |
948 |
*start = 0; *size = 0; |
*start = 0; *size = 0; |
949 |
|
|
950 |
/* printf("reading MSDOS partition from offset 0x%llx\n", |
/* printf("reading MSDOS partition from offset 0x%"PRIx64"\n", |
951 |
(long long)offset); */ |
(uint64_t) offset); */ |
952 |
|
|
953 |
res = diskimage_access(machine, disk_id, disk_type, 0, offset, |
res = diskimage_access(machine, disk_id, disk_type, 0, offset, |
954 |
sector, sizeof(sector)); |
sector, sizeof(sector)); |
955 |
if (!res) { |
if (!res) { |
956 |
fatal("[ arcbios_get_msdos_partition_size(): couldn't " |
fatal("[ arcbios_get_msdos_partition_size(): couldn't " |
957 |
"read the disk image, id %i, offset 0x%llx ]\n", |
"read the disk image, id %i, offset 0x%"PRIx64" ]\n", |
958 |
disk_id, (long long)offset); |
disk_id, (uint64_t) offset); |
959 |
return; |
return; |
960 |
} |
} |
961 |
|
|
1239 |
cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t) |
cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t) |
1240 |
(int32_t) cpu->cd.mips.gpr[MIPS_GPR_V0]; |
(int32_t) cpu->cd.mips.gpr[MIPS_GPR_V0]; |
1241 |
} |
} |
1242 |
debug("[ ARCBIOS GetPeer(node 0x%016llx): 0x%016llx ]\n", |
debug("[ ARCBIOS GetPeer(node 0x%016"PRIx64"): 0x%016"PRIx64 |
1243 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A0], |
" ]\n", (uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1244 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_V0]); |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_V0]); |
1245 |
break; |
break; |
1246 |
case 0x28: /* GetChild(node) */ |
case 0x28: /* GetChild(node) */ |
1247 |
/* 0 for the root, non-0 for children: */ |
/* 0 for the root, non-0 for children: */ |
1290 |
cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t) |
cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t) |
1291 |
(int32_t)cpu->cd.mips.gpr[MIPS_GPR_V0]; |
(int32_t)cpu->cd.mips.gpr[MIPS_GPR_V0]; |
1292 |
} |
} |
1293 |
debug("[ ARCBIOS GetChild(node 0x%016llx): 0x%016llx ]\n", |
debug("[ ARCBIOS GetChild(node 0x%016"PRIx64"): 0x%016" |
1294 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A0], |
PRIx64" ]\n", (uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1295 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_V0]); |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_V0]); |
1296 |
break; |
break; |
1297 |
case 0x2c: /* GetParent(node) */ |
case 0x2c: /* GetParent(node) */ |
1298 |
{ |
{ |
1339 |
cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t) |
cpu->cd.mips.gpr[MIPS_GPR_V0] = (int64_t) |
1340 |
(int32_t) cpu->cd.mips.gpr[MIPS_GPR_V0]; |
(int32_t) cpu->cd.mips.gpr[MIPS_GPR_V0]; |
1341 |
} |
} |
1342 |
debug("[ ARCBIOS GetParent(node 0x%016llx): 0x%016llx ]\n", |
debug("[ ARCBIOS GetParent(node 0x%016"PRIx64"): 0x%016" |
1343 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A0], |
PRIx64" ]\n", (uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1344 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_V0]); |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_V0]); |
1345 |
break; |
break; |
1346 |
case 0x30: /* GetConfigurationData(void *configdata, void *node) */ |
case 0x30: /* GetConfigurationData(void *configdata, void *node) */ |
1347 |
/* fatal("[ ARCBIOS GetConfigurationData(0x%016llx," |
/* fatal("[ ARCBIOS GetConfigurationData(0x%016"PRIx64"," |
1348 |
"0x%016llx) ]\n", (long long)cpu->cd.mips.gpr[MIPS_GPR_A0], |
"0x%016"PRIx64") ]\n", |
1349 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A1]); */ |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1350 |
|
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1]); */ |
1351 |
cpu->cd.mips.gpr[MIPS_GPR_V0] = ARCBIOS_EINVAL; |
cpu->cd.mips.gpr[MIPS_GPR_V0] = ARCBIOS_EINVAL; |
1352 |
for (i=0; i<machine->md.arc.n_configuration_data; i++) { |
for (i=0; i<machine->md.arc.n_configuration_data; i++) { |
1353 |
/* fatal("configuration_data_component[%i] = " |
/* fatal("configuration_data_component[%i] = " |
1354 |
"0x%016llx\n", i, (long long)machine-> |
"0x%016"PRIx64"\n", i, (uint64_t) machine-> |
1355 |
md.arc.configuration_data_component[i]); */ |
md.arc.configuration_data_component[i]); */ |
1356 |
if (cpu->cd.mips.gpr[MIPS_GPR_A1] == |
if (cpu->cd.mips.gpr[MIPS_GPR_A1] == |
1357 |
machine->md.arc.configuration_data_component[i]) { |
machine->md.arc.configuration_data_component[i]) { |
1677 |
arcbios_handle_to_start_and_size(machine, |
arcbios_handle_to_start_and_size(machine, |
1678 |
handle, &partition_offset, &size); |
handle, &partition_offset, &size); |
1679 |
|
|
1680 |
debug("[ ARCBIOS Write(%i,0x%08llx,%i,0x%08llx) ]\n", |
debug("[ ARCBIOS Write(%i,0x%08"PRIx64",%i,0x%08" |
1681 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A0], |
PRIx64") ]\n", (int) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1682 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A1], |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1], |
1683 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A2], |
(int) cpu->cd.mips.gpr[MIPS_GPR_A2], |
1684 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A3]); |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A3]); |
1685 |
|
|
1686 |
tmp_buf = malloc(cpu->cd.mips.gpr[MIPS_GPR_A2]); |
tmp_buf = malloc(cpu->cd.mips.gpr[MIPS_GPR_A2]); |
1687 |
if (tmp_buf == NULL) { |
if (tmp_buf == NULL) { |
1729 |
break; |
break; |
1730 |
case 0x70: /* Seek(uint32_t handle, int64_t *ofs, |
case 0x70: /* Seek(uint32_t handle, int64_t *ofs, |
1731 |
uint32_t whence): uint32_t */ |
uint32_t whence): uint32_t */ |
1732 |
debug("[ ARCBIOS Seek(%i,0x%08llx,%i): ", |
debug("[ ARCBIOS Seek(%i,0x%08"PRIx64",%i): ", |
1733 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A0], |
(int) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1734 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A1], |
(uint64_t)cpu->cd.mips.gpr[MIPS_GPR_A1], |
1735 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A2]); |
(int) cpu->cd.mips.gpr[MIPS_GPR_A2]); |
1736 |
|
|
1737 |
if (cpu->cd.mips.gpr[MIPS_GPR_A2] != 0) { |
if (cpu->cd.mips.gpr[MIPS_GPR_A2] != 0) { |
1738 |
fatal("[ ARCBIOS Seek(%i,0x%08llx,%i): " |
fatal("[ ARCBIOS Seek(%i,0x%08"PRIx64",%i): " |
1739 |
"UNIMPLEMENTED whence=%i ]\n", |
"UNIMPLEMENTED whence=%i ]\n", |
1740 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A0], |
(int) cpu->cd.mips.gpr[MIPS_GPR_A0], |
1741 |
(long long)cpu->cd.mips.gpr[MIPS_GPR_A1], |
(uint64_t) cpu->cd.mips.gpr[MIPS_GPR_A1], |
1742 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A2], |
(int) cpu->cd.mips.gpr[MIPS_GPR_A2], |
1743 |
(int)cpu->cd.mips.gpr[MIPS_GPR_A2]); |
(int) cpu->cd.mips.gpr[MIPS_GPR_A2]); |
1744 |
} |
} |
1745 |
|
|
1746 |
{ |
{ |
1762 |
+ ((uint64_t)buf[7] << 56); |
+ ((uint64_t)buf[7] << 56); |
1763 |
machine->md.arc.current_seek_offset[ |
machine->md.arc.current_seek_offset[ |
1764 |
cpu->cd.mips.gpr[MIPS_GPR_A0]] = ofs; |
cpu->cd.mips.gpr[MIPS_GPR_A0]] = ofs; |
1765 |
debug("%016llx ]\n", (long long)ofs); |
debug("%016"PRIx64" ]\n", (uint64_t) ofs); |
1766 |
} |
} |
1767 |
|
|
1768 |
cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* Success. */ |
cpu->cd.mips.gpr[MIPS_GPR_V0] = 0; /* Success. */ |
2723 |
|
|
2724 |
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, |
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, |
2725 |
COMPONENT_TYPE_ARC, 0,1,2,0, 0xffffffff, name, 0/*ROOT*/, NULL, 0); |
COMPONENT_TYPE_ARC, 0,1,2,0, 0xffffffff, name, 0/*ROOT*/, NULL, 0); |
2726 |
debug("ARC system @ 0x%llx (\"%s\")\n", (long long)system, name); |
debug("ARC system @ 0x%"PRIx64" (\"%s\")\n", (uint64_t) system, name); |
2727 |
|
|
2728 |
|
|
2729 |
/* |
/* |
2839 |
0xffffffff, NULL, cpuaddr, NULL, 0); |
0xffffffff, NULL, cpuaddr, NULL, 0); |
2840 |
} |
} |
2841 |
|
|
2842 |
debug("ARC cpu%i @ 0x%llx", i, (long long)cpuaddr); |
debug("ARC cpu%i @ 0x%"PRIx64, i, (uint64_t) cpuaddr); |
2843 |
|
|
2844 |
if (fpu != 0) |
if (fpu != 0) |
2845 |
debug(" (fpu @ 0x%llx)\n", (long long)fpu); |
debug(" (fpu @ 0x%"PRIx64")\n", (uint64_t) fpu); |
2846 |
else |
else |
2847 |
debug("\n"); |
debug("\n"); |
2848 |
|
|
2849 |
debug(" picache @ 0x%llx, pdcache @ 0x%llx\n", |
debug(" picache @ 0x%"PRIx64", pdcache @ 0x%"PRIx64"\n", |
2850 |
(long long)picache, (long long)pdcache); |
(uint64_t) picache, (uint64_t) pdcache); |
2851 |
|
|
2852 |
if (machine->cache_secondary >= 12) |
if (machine->cache_secondary >= 12) |
2853 |
debug(" sdcache @ 0x%llx\n", |
debug(" sdcache @ 0x%"PRIx64"\n", |
2854 |
(long long)sdcache); |
(uint64_t) sdcache); |
2855 |
|
|
2856 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
2857 |
/* TODO: Memory amount (and base address?)! */ |
/* TODO: Memory amount (and base address?)! */ |
2859 |
COMPONENT_CLASS_MemoryClass, |
COMPONENT_CLASS_MemoryClass, |
2860 |
COMPONENT_TYPE_MemoryUnit, 0, 1, 2, 0, |
COMPONENT_TYPE_MemoryUnit, 0, 1, 2, 0, |
2861 |
0xffffffff, "memory", cpuaddr, NULL, 0); |
0xffffffff, "memory", cpuaddr, NULL, 0); |
2862 |
debug("ARC memory @ 0x%llx\n", (long long)memory); |
debug("ARC memory @ 0x%"PRIx64"\n", (uint64_t) memory); |
2863 |
} |
} |
2864 |
} |
} |
2865 |
|
|
2897 |
ARC_FIRMWARE_ENTRIES + i*8); |
ARC_FIRMWARE_ENTRIES + i*8); |
2898 |
store_64bit_word(cpu, ARC_PRIVATE_VECTORS + i*8, |
store_64bit_word(cpu, ARC_PRIVATE_VECTORS + i*8, |
2899 |
ARC_PRIVATE_ENTRIES + i*8); |
ARC_PRIVATE_ENTRIES + i*8); |
2900 |
|
|
2901 |
|
/* "Magic trap" instruction: */ |
2902 |
|
store_32bit_word(cpu, ARC_FIRMWARE_ENTRIES + i*8, |
2903 |
|
0x00c0de0c); |
2904 |
|
store_32bit_word(cpu, ARC_PRIVATE_ENTRIES + i*8, |
2905 |
|
0x00c0de0c); |
2906 |
} else { |
} else { |
2907 |
store_32bit_word(cpu, ARC_FIRMWARE_VECTORS + i*4, |
store_32bit_word(cpu, ARC_FIRMWARE_VECTORS + i*4, |
2908 |
ARC_FIRMWARE_ENTRIES + i*4); |
ARC_FIRMWARE_ENTRIES + i*4); |
2909 |
store_32bit_word(cpu, ARC_PRIVATE_VECTORS + i*4, |
store_32bit_word(cpu, ARC_PRIVATE_VECTORS + i*4, |
2910 |
ARC_PRIVATE_ENTRIES + i*4); |
ARC_PRIVATE_ENTRIES + i*4); |
2911 |
|
|
2912 |
|
/* "Magic trap" instruction: */ |
2913 |
|
store_32bit_word(cpu, ARC_FIRMWARE_ENTRIES + i*4, |
2914 |
|
0x00c0de0c); |
2915 |
|
store_32bit_word(cpu, ARC_PRIVATE_ENTRIES + i*4, |
2916 |
|
0x00c0de0c); |
2917 |
} |
} |
2918 |
} |
} |
2919 |
|
|