--- trunk/src/memory_rw.c	2007/10/08 16:22:20	41
+++ trunk/src/memory_rw.c	2007/10/08 16:22:32	42
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: memory_rw.c,v 1.102 2007/04/16 15:13:44 debug Exp $
+ *  $Id: memory_rw.c,v 1.107 2007/06/12 03:49:11 debug Exp $
  *
  *  Generic memory_rw(), with special hacks for specific CPU families.
  *
@@ -33,6 +33,9 @@
  *
  *	MEMORY_RW should be mips_memory_rw
  *	MEM_MIPS should be defined
+ *
+ *
+ *  TODO: Cleanup the "ok" variable usage!
  */
 
 
@@ -71,7 +74,7 @@
 #endif
 
 #ifndef MEM_USERLAND
-	int ok = 1;
+	int ok = 2;
 #endif
 	uint64_t paddr;
 	int cache, no_exceptions, offset;
@@ -95,9 +98,7 @@
 		ok = cpu->translate_v2p(cpu, vaddr, &paddr,
 		    (writeflag? FLAG_WRITEFLAG : 0) +
 		    (no_exceptions? FLAG_NOEXCEPTIONS : 0)
-#ifdef MEM_ARM
 		    + (misc_flags & MEMORY_USER_ACCESS)
-#endif
 		    + (cache==CACHE_INSTRUCTION? FLAG_INSTR : 0));
 
 		/*
@@ -238,7 +239,9 @@
 					    "writing to" : "reading from",
 					    mem->devices[i].name, (long)paddr);
 #ifdef MEM_MIPS
-					mips_cpu_exception(cpu, EXCEPTION_DBE,
+					mips_cpu_exception(cpu,
+					    cache == CACHE_INSTRUCTION?
+					    EXCEPTION_IBE : EXCEPTION_DBE,
 					    0, vaddr, 0, 0, 0, 0);
 #endif
 					return MEMORY_ACCESS_FAILED;
@@ -301,21 +304,28 @@
 				/*  Return all zeroes? (Or 0xff? TODO)  */
 				memset(data, 0, len);
 
+#if 0
+/*
+ *  NOTE: This code prevents a PROM image from a real 5000/200 from booting.
+ *  I think I introduced it because it was how some guest OS (NetBSD?) detected
+ *  the amount of RAM on some machine.
+ *
+ *  TODO: Figure out if it is not needed anymore, and remove it completely.
+ */
 #ifdef MEM_MIPS
 				/*
 				 *  For real data/instruction accesses, cause
 				 *  an exceptions on an illegal read:
 				 */
-				if (cache != CACHE_NONE && cpu->machine->
-				    dbe_on_nonexistant_memaccess &&
-				    !no_exceptions) {
-					if (paddr >= mem->physical_max &&
-					    paddr < mem->physical_max+1048576)
-						mips_cpu_exception(cpu,
-						    EXCEPTION_DBE, 0, vaddr, 0,
-						    0, 0, 0);
+				if (cache != CACHE_NONE && !no_exceptions &&
+				    paddr >= mem->physical_max &&
+				    paddr < mem->physical_max+1048576) {
+					mips_cpu_exception(cpu,
+					    EXCEPTION_DBE, 0, vaddr, 0,
+					    0, 0, 0);
 				}
 #endif  /*  MEM_MIPS  */
+#endif
 			}
 
 			/*  Hm? Shouldn't there be a DBE exception for
@@ -355,16 +365,13 @@
 	    && (cpu->cd.mips.cpu_type.mmu_model != MMU3K ||
             !(cpu->cd.mips.coproc[0]->reg[COP0_STATUS] & MIPS1_ISOL_CACHES))
 #endif
-#ifndef MEM_MIPS
-/*	    && !(misc_flags & MEMORY_USER_ACCESS)  */
 #ifndef MEM_USERLAND
 	    && !(ok & MEMORY_NOT_FULL_PAGE)
 #endif
-#endif
 	    && !no_exceptions)
 		cpu->update_translation_table(cpu, vaddr & ~offset_mask,
 		    memblock, (misc_flags & MEMORY_USER_ACCESS) |
-#if !defined(MEM_MIPS) && !defined(MEM_USERLAND)
+#if !defined(MEM_USERLAND)
 		    (cache == CACHE_INSTRUCTION?
 			(writeflag == MEM_WRITE? 1 : 0) : ok - 1),
 #else
@@ -376,9 +383,10 @@
 	 *  If writing, or if mapping a page where writing is ok later on,
 	 *  then invalidate code translations for the (physical) page address:
 	 */
+
 	if ((writeflag == MEM_WRITE
 #if !defined(MEM_USERLAND)
-	    || ok == 2
+	    || (ok == 2 && cache == CACHE_DATA)
 #endif
 	    ) && cpu->invalidate_code_translation != NULL)
 		cpu->invalidate_code_translation(cpu, paddr, INVALIDATE_PADDR);