/[gxemul]/trunk/src/memory_fast_v2h.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/memory_fast_v2h.c

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Revision 12 - (hide annotations)
Mon Oct 8 16:18:38 2007 UTC (12 years, 2 months ago) by dpavlin
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File size: 6910 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.905 2005/08/16 09:16:24 debug Exp $
20050628	Continuing the work on the ARM translation engine. end_of_page
		works. Experimenting with load/store translation caches
		(virtual -> physical -> host).
20050629	More ARM stuff (memory access translation cache, mostly). This
		might break a lot of stuff elsewhere, probably some MIPS-
		related translation things.
20050630	Many load/stores are now automatically generated and included
		into cpu_arm_instr.c; 1024 functions in total (!).
		Fixes based on feedback from Alec Voropay: only print 8 hex
		digits instead of 16 in some cases when emulating 32-bit
		machines; similar 8 vs 16 digit fix for breakpoint addresses;
		4Kc has 16 TLB entries, not 48; the MIPS config select1
		register is now printed with "reg ,0".
		Also changing many other occurances of 16 vs 8 digit output.
		Adding cache associativity fields to mips_cpu_types.h; updating
		some other cache fields; making the output of
		mips_cpu_dumpinfo() look nicer.
		Generalizing the bintrans stuff for device accesses to also
		work with the new translation system. (This might also break
		some MIPS things.)
		Adding multi-load/store instructions to the ARM disassembler
		and the translator, and some optimizations of various kinds.
20050701	Adding a simple dev_disk (it can read/write sectors from
		disk images).
20050712	Adding dev_ether (a simple ethernet send/receive device).
		Debugger command "ninstrs" for toggling show_nr_of_instructions
		during runtime.
		Removing the framebuffer logo.
20050713	Continuing on dev_ether.
		Adding a dummy cpu_alpha (again).
20050714	More work on cpu_alpha.
20050715	More work on cpu_alpha. Many instructions work, enough to run
		a simple framebuffer fill test (similar to the ARM test).
20050716	More Alpha stuff.
20050717	Minor updates (Alpha stuff).
20050718	Minor updates (Alpha stuff).
20050719	Generalizing some Alpha instructions.
20050720	More Alpha-related updates.
20050721	Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
20050722	Alpha-related updates: userland stuff (Hello World using
		write() compiled statically for FreeBSD/Alpha runs fine), and
		more instructions are now implemented.
20050723	Fixing ldq_u and stq_u.
		Adding more instructions (conditional moves, masks, extracts,
		shifts).
20050724	More FreeBSD/Alpha userland stuff, and adding some more
		instructions (inserts).
20050725	Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
		Adding a -A command line option to turn off alignment checks
		in some cases (for translated code).
		Trying to remove the old bintrans code which updated the pc
		and nr_of_executed_instructions for every instruction.
20050726	Making another attempt att removing the pc/nr of instructions
		code. This time it worked, huge performance increase for
		artificial test code, but performance loss for real-world
		code :-( so I'm scrapping that code for now.
		Tiny performance increase on Alpha (by using ret instead of
		jmp, to play nice with the Alpha's branch prediction) for the
		old MIPS bintrans backend.
20050727	Various minor fixes and cleanups.
20050728	Switching from a 2-level virtual to host/physical translation
		system for ARM emulation, to a 1-level translation.
		Trying to switch from 2-level to 1-level for the MIPS bintrans
		system as well (Alpha only, so far), but there is at least one
		problem: caches and/or how they work with device mappings.
20050730	Doing the 2-level to 1-level conversion for the i386 backend.
		The cache/device bug is still there for R2K/3K :(
		Various other minor updates (Malta etc).
		The mc146818 clock now updates the UIP bit in a way which works
		better with Linux for at least sgimips and Malta emulation.
		Beginning the work on refactoring the dyntrans system.
20050731	Continuing the dyntrans refactoring.
		Fixing a small but serious host alignment bug in memory_rw.
		Adding support for big-endian load/stores to the i386 bintrans
		backend.
		Another minor i386 bintrans backend update: stores from the
		zero register are now one (or two) loads shorter.
		The slt and sltu instructions were incorrectly implemented for
		the i386 backend; only using them for 32-bit mode for now.
20050801	Continuing the dyntrans refactoring.
		Cleanup of the ns16550 serial controller (removing unnecessary
		code).
		Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
		Alec Voropay for Linux/Malta.
20050802	More cleanup/refactoring of the dyntrans subsystem: adding
		phys_page pointers to the lookup tables, for quick jumps
		between translated pages.
		Better fix for the ns16550 device (but still no real FIFO
		functionality).
		Converting cpu_ppc to the new dyntrans system. This means that
		I will have to start from scratch with implementing each
		instruction, and figure out how to implement dual 64/32-bit
		modes etc.
		Removing the URISC CPU family, because it was useless.
20050803	When selecting a machine type, the main type can now be omitted
		if the subtype name is unique. (I.e. -E can be omitted.)
		Fixing a dyntrans/device update bug. (Writes to offset 0 of
		a device could sometimes go unnoticed.)
		Adding an experimental "instruction combination" hack for
		ARM for memset-like byte fill loops.
20050804	Minor progress on cpu_alpha and related things.
		Finally fixing the MIPS dmult/dmultu bugs.
		Fixing some minor TODOs.
20050805	Generalizing the 8259 PIC. It now also works with Cobalt
		and evbmips emulation, in addition to the x86 hack.
		Finally converting the ns16550 device to use devinit.
		Continuing the work on the dyntrans system. Thinking about
		how to add breakpoints.
20050806	More dyntrans updates. Breakpoints seem to work now.
20050807	Minor updates: cpu_alpha and related things; removing
		dev_malta (as it isn't used any more).
		Dyntrans: working on general "show trace tree" support.
		The trace tree stuff now works with both the old MIPS code and
		with newer dyntrans modes. :)
		Continuing on Alpha-related stuff (trying to get *BSD to boot
		a bit further, adding more instructions, etc).
20050808	Adding a dummy IA64 cpu family, and continuing the refactoring
		of the dyntrans system.
		Removing the regression test stuff, because it was more or
		less useless.
		Adding loadlinked/storeconditional type instructions to the
		Alpha emulation. (Needed for Linux/alpha. Not very well tested
		yet.)
20050809	The function call trace tree now prints a per-function nr of
		arguments. (Semi-meaningless, since that data isn't read yet
		from the ELFs; some hardcoded symbols such as memcpy() and
		strlen() work fine, though.)
		More dyntrans refactoring; taking out more of the things that
		are common to all cpu families.
20050810	Working on adding support for "dual mode" for PPC dyntrans
		(i.e. both 64-bit and 32-bit modes).
		(Re)adding some simple PPC instructions.
20050811	Adding a dummy M68K cpu family. The dyntrans system isn't ready
		for variable-length ISAs yet, so it's completely bogus so far.
		Re-adding more PPC instructions.
		Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
		kernels to be loaded.
		Beginning to add PPC loads/stores. So far they only work in
		32-bit mode.
20050812	The configure file option "add_remote" now accepts symbolic
		host names, in addition to numeric IPv4 addresses.
		Re-adding more PPC instructions.
20050814	Continuing to port back more PPC instructions.
		Found and fixed the cache/device write-update bug for 32-bit
		MIPS bintrans. :-)
		Triggered a really weird and annoying bug in Compaq's C
		compiler; ccc sometimes outputs code which loads from an
		address _before_ checking whether the pointer was NULL or not.
		(I'm not sure how to handle this problem.)
20050815	Removing all of the old x86 instruction execution code; adding
		a new (dummy) dyntrans module for x86.
		Taking the first steps to extend the dyntrans system to support
		variable-length instructions.
		Slowly preparing for the next release.
20050816	Adding a dummy SPARC cpu module.
		Minor updates (documentation etc) for the release.

==============  RELEASE 0.3.5  ==============


1 dpavlin 2 /*
2     * Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 12 * $Id: memory_fast_v2h.c,v 1.15 2005/07/19 10:48:05 debug Exp $
29 dpavlin 2 *
30     * Fast virtual memory to host address, used by binary translated code.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35    
36     #include "bintrans.h"
37     #include "cpu.h"
38     #include "memory.h"
39     #include "cpu_mips.h"
40     #include "misc.h"
41    
42    
43     #ifdef BINTRANS
44    
45     /*
46     * fast_vaddr_to_hostaddr():
47     *
48     * Used by dynamically translated code. The caller should have made sure
49     * that the access is aligned correctly.
50     *
51     * Return value is a pointer to a host page + offset, if the page was
52     * writable (or writeflag was zero), if the virtual address was translatable
53     * to a paddr, and if the paddr was translatable to a host address.
54     *
55     * On error, NULL is returned. The caller (usually the dynamically
56     * generated machine code) must check for this.
57     */
58     unsigned char *fast_vaddr_to_hostaddr(struct cpu *cpu,
59     uint64_t vaddr, int writeflag)
60     {
61     int ok, i, n, start_and_stop;
62     uint64_t paddr, vaddr_page;
63     unsigned char *memblock;
64     size_t offset;
65     const int MAX = N_BINTRANS_VADDR_TO_HOST;
66    
67     /* printf("fast_vaddr_to_hostaddr(): cpu=%p, vaddr=%016llx, wf=%i\n",
68     cpu, (long long)vaddr, writeflag); */
69    
70     #if 0
71     /* Hm. This seems to work now, so this #if X can be removed. (?) */
72    
73     /*
74     * TODO:
75     *
76     * Why doesn't this work yet?
77     */
78     if ((vaddr & 0xc0000000ULL) >= 0xc0000000ULL && writeflag) {
79     return NULL;
80     }
81     #endif
82    
83    
84     vaddr_page = vaddr & ~0xfff;
85     i = start_and_stop = cpu->cd.mips.bintrans_next_index;
86     n = 0;
87     for (;;) {
88     if (cpu->cd.mips.bintrans_data_vaddr[i] == vaddr_page &&
89     cpu->cd.mips.bintrans_data_hostpage[i] != NULL &&
90     cpu->cd.mips.bintrans_data_writable[i] >= writeflag) {
91     uint64_t tmpaddr;
92     unsigned char *tmpptr;
93     int tmpwf;
94    
95     if (n < 3)
96     return cpu->cd.mips.bintrans_data_hostpage[i]
97     + (vaddr & 0xfff);
98    
99     cpu->cd.mips.bintrans_next_index = start_and_stop - 1;
100     if (cpu->cd.mips.bintrans_next_index < 0)
101     cpu->cd.mips.bintrans_next_index = MAX - 1;
102    
103     tmpptr = cpu->cd.mips.bintrans_data_hostpage[
104     cpu->cd.mips.bintrans_next_index];
105     tmpaddr = cpu->cd.mips.bintrans_data_vaddr[
106     cpu->cd.mips.bintrans_next_index];
107     tmpwf = cpu->cd.mips.bintrans_data_writable[
108     cpu->cd.mips.bintrans_next_index];
109    
110     cpu->cd.mips.bintrans_data_hostpage[
111     cpu->cd.mips.bintrans_next_index] =
112     cpu->cd.mips.bintrans_data_hostpage[i];
113     cpu->cd.mips.bintrans_data_vaddr[
114     cpu->cd.mips.bintrans_next_index] =
115     cpu->cd.mips.bintrans_data_vaddr[i];
116     cpu->cd.mips.bintrans_data_writable[
117     cpu->cd.mips.bintrans_next_index] =
118     cpu->cd.mips.bintrans_data_writable[i];
119    
120     cpu->cd.mips.bintrans_data_hostpage[i] = tmpptr;
121     cpu->cd.mips.bintrans_data_vaddr[i] = tmpaddr;
122     cpu->cd.mips.bintrans_data_writable[i] = tmpwf;
123    
124     return cpu->cd.mips.bintrans_data_hostpage[
125     cpu->cd.mips.bintrans_next_index] + (vaddr & 0xfff);
126     }
127    
128     n ++;
129     i ++;
130     if (i == MAX)
131     i = 0;
132     if (i == start_and_stop)
133     break;
134     }
135    
136     ok = cpu->translate_address(cpu, vaddr, &paddr,
137     (writeflag? FLAG_WRITEFLAG : 0) + FLAG_NOEXCEPTIONS);
138     /* printf("ok=%i\n", ok); */
139     if (!ok)
140     return NULL;
141    
142     for (i=0; i<cpu->mem->n_mmapped_devices; i++)
143 dpavlin 4 if (paddr >= (cpu->mem->dev_baseaddr[i] & ~0xfff) &&
144     paddr <= ((cpu->mem->dev_baseaddr[i] +
145     cpu->mem->dev_length[i] - 1) | 0xfff)) {
146 dpavlin 12 if (cpu->mem->dev_flags[i] & MEM_DYNTRANS_OK) {
147 dpavlin 2 paddr -= cpu->mem->dev_baseaddr[i];
148    
149 dpavlin 4 /* Within a device _page_ but not within the
150     actual device? Then abort: */
151     if ((int64_t)paddr < 0 ||
152     paddr >= cpu->mem->dev_length[i])
153     return NULL;
154    
155 dpavlin 2 if (writeflag) {
156     uint64_t low_paddr = paddr & ~0xfff;
157     uint64_t high_paddr = paddr | 0xfff;
158     if (!(cpu->mem->dev_flags[i] &
159 dpavlin 12 MEM_DYNTRANS_WRITE_OK))
160 dpavlin 2 return NULL;
161    
162     if (low_paddr < cpu->mem->
163 dpavlin 12 dev_dyntrans_write_low[i])
164 dpavlin 2 cpu->mem->
165 dpavlin 12 dev_dyntrans_write_low[i] =
166 dpavlin 2 low_paddr;
167     if (high_paddr > cpu->mem->
168 dpavlin 12 dev_dyntrans_write_high[i])
169 dpavlin 2 cpu->mem->
170 dpavlin 12 dev_dyntrans_write_high[i]
171 dpavlin 2 = high_paddr;
172     }
173    
174     cpu->cd.mips.bintrans_next_index --;
175     if (cpu->cd.mips.bintrans_next_index < 0)
176     cpu->cd.mips.bintrans_next_index =
177     MAX - 1;
178     cpu->cd.mips.bintrans_data_hostpage[cpu->
179     cd.mips.bintrans_next_index] = cpu->mem->
180 dpavlin 12 dev_dyntrans_data[i] + (paddr & ~0xfff);
181 dpavlin 2 cpu->cd.mips.bintrans_data_vaddr[cpu->
182     cd.mips.bintrans_next_index] = vaddr_page;
183     cpu->cd.mips.bintrans_data_writable[cpu->
184     cd.mips.bintrans_next_index] = writeflag;
185 dpavlin 12 return cpu->mem->dev_dyntrans_data[i] + paddr;
186 dpavlin 2 } else
187     return NULL;
188     }
189    
190     memblock = memory_paddr_to_hostaddr(cpu->mem, paddr,
191     writeflag? MEM_WRITE : MEM_READ);
192     if (memblock == NULL)
193     return NULL;
194    
195     offset = paddr & ((1 << BITS_PER_MEMBLOCK) - 1);
196    
197     if (writeflag)
198     bintrans_invalidate(cpu, paddr);
199    
200     cpu->cd.mips.bintrans_next_index --;
201     if (cpu->cd.mips.bintrans_next_index < 0)
202     cpu->cd.mips.bintrans_next_index = MAX - 1;
203     cpu->cd.mips.bintrans_data_hostpage[cpu->cd.mips.bintrans_next_index] =
204     memblock + (offset & ~0xfff);
205     cpu->cd.mips.bintrans_data_vaddr[cpu->cd.mips.bintrans_next_index] =
206     vaddr_page;
207     cpu->cd.mips.bintrans_data_writable[cpu->cd.mips.bintrans_next_index] =
208     writeflag; /* ok - 1; */
209    
210     return memblock + offset;
211     }
212    
213     #endif /* BINTRANS */

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