/[gxemul]/trunk/src/memory.c
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revision 18 by dpavlin, Mon Oct 8 16:19:11 2007 UTC revision 20 by dpavlin, Mon Oct 8 16:19:23 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: memory.c,v 1.180 2005/10/25 15:51:02 debug Exp $   *  $Id: memory.c,v 1.182 2005/11/22 16:26:36 debug Exp $
29   *   *
30   *  Functions for handling the memory of an emulated machine.   *  Functions for handling the memory of an emulated machine.
31   */   */
# Line 59  extern volatile int single_step; Line 59  extern volatile int single_step;
59   */   */
60  uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)  uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
61  {  {
62          int i;          int i, byte_order = cpu->byte_order;
63          uint64_t x = 0;          uint64_t x = 0;
64    
65            if (len & MEM_PCI_LITTLE_ENDIAN) {
66                    len &= ~MEM_PCI_LITTLE_ENDIAN;
67                    byte_order = EMUL_LITTLE_ENDIAN;
68            }
69    
70          /*  Switch byte order for incoming data, if necessary:  */          /*  Switch byte order for incoming data, if necessary:  */
71          if (cpu->byte_order == EMUL_BIG_ENDIAN)          if (byte_order == EMUL_BIG_ENDIAN)
72                  for (i=0; i<len; i++) {                  for (i=0; i<len; i++) {
73                          x <<= 8;                          x <<= 8;
74                          x |= buf[i];                          x |= buf[i];
# Line 89  uint64_t memory_readmax64(struct cpu *cp Line 94  uint64_t memory_readmax64(struct cpu *cp
94  void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,  void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
95          uint64_t data)          uint64_t data)
96  {  {
97          int i;          int i, byte_order = cpu->byte_order;
98    
99            if (len & MEM_PCI_LITTLE_ENDIAN) {
100                    len &= ~MEM_PCI_LITTLE_ENDIAN;
101                    byte_order = EMUL_LITTLE_ENDIAN;
102            }
103    
104          if (cpu->byte_order == EMUL_LITTLE_ENDIAN)          if (byte_order == EMUL_LITTLE_ENDIAN)
105                  for (i=0; i<len; i++) {                  for (i=0; i<len; i++) {
106                          buf[i] = data & 255;                          buf[i] = data & 255;
107                          data >>= 8;                          data >>= 8;
# Line 388  void memory_device_register(struct memor Line 398  void memory_device_register(struct memor
398          debug("device %2i at 0x%010llx: %s",          debug("device %2i at 0x%010llx: %s",
399              mem->n_mmapped_devices, (long long)baseaddr, device_name);              mem->n_mmapped_devices, (long long)baseaddr, device_name);
400    
401          if (flags & (MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK)          if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
402              && (baseaddr & mem->dev_dyntrans_alignment) != 0) {              && (baseaddr & mem->dev_dyntrans_alignment) != 0) {
403                  fatal("\nWARNING: Device dyntrans access, but unaligned"                  fatal("\nWARNING: Device dyntrans access, but unaligned"
404                      " baseaddr 0x%llx.\n", (long long)baseaddr);                      " baseaddr 0x%llx.\n", (long long)baseaddr);
405          }          }
406    
407          if (flags & (MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK)) {          if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
408                  debug(" (dyntrans %s)",                  debug(" (dyntrans %s)",
409                      (flags & MEM_DYNTRANS_WRITE_OK)? "R/W" : "R");                      (flags & DM_DYNTRANS_WRITE_OK)? "R/W" : "R");
410          }          }
411          debug("\n");          debug("\n");
412    
# Line 412  void memory_device_register(struct memor Line 422  void memory_device_register(struct memor
422                  exit(1);                  exit(1);
423          }          }
424    
425          if (flags & (MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK)          if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
426              && !(flags & MEM_EMULATED_RAM) && dyntrans_data == NULL) {              && !(flags & DM_EMULATED_RAM) && dyntrans_data == NULL) {
427                  fatal("\nERROR: Device dyntrans access, but dyntrans_data"                  fatal("\nERROR: Device dyntrans access, but dyntrans_data"
428                      " = NULL!\n");                      " = NULL!\n");
429                  exit(1);                  exit(1);

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