--- trunk/src/memory.c	2007/10/08 16:18:38	12
+++ trunk/src/memory.c	2007/10/08 16:19:23	20
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: memory.c,v 1.175 2005/08/14 15:47:36 debug Exp $
+ *  $Id: memory.c,v 1.182 2005/11/22 16:26:36 debug Exp $
  *
  *  Functions for handling the memory of an emulated machine.
  */
@@ -59,11 +59,16 @@
  */
 uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
 {
-	int i;
+	int i, byte_order = cpu->byte_order;
 	uint64_t x = 0;
 
+	if (len & MEM_PCI_LITTLE_ENDIAN) {
+		len &= ~MEM_PCI_LITTLE_ENDIAN;
+		byte_order = EMUL_LITTLE_ENDIAN;
+	}
+
 	/*  Switch byte order for incoming data, if necessary:  */
-	if (cpu->byte_order == EMUL_BIG_ENDIAN)
+	if (byte_order == EMUL_BIG_ENDIAN)
 		for (i=0; i<len; i++) {
 			x <<= 8;
 			x |= buf[i];
@@ -89,9 +94,14 @@
 void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
 	uint64_t data)
 {
-	int i;
+	int i, byte_order = cpu->byte_order;
+
+	if (len & MEM_PCI_LITTLE_ENDIAN) {
+		len &= ~MEM_PCI_LITTLE_ENDIAN;
+		byte_order = EMUL_LITTLE_ENDIAN;
+	}
 
-	if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
+	if (byte_order == EMUL_LITTLE_ENDIAN)
 		for (i=0; i<len; i++) {
 			buf[i] = data & 255;
 			data >>= 8;
@@ -290,11 +300,13 @@
 			/*  Invalidate any pages of this device that might
 			    be in the dyntrans load/store cache, by marking
 			    the pages read-only.  */
-			if (cpu->invalidate_translation_caches_paddr != NULL) {
+			if (cpu->invalidate_translation_caches != NULL) {
 				for (s=0; s<mem->dev_length[i];
 				    s+=cpu->machine->arch_pagesize)
-					cpu->invalidate_translation_caches_paddr
-					    (cpu, mem->dev_baseaddr[i] + s);
+					cpu->invalidate_translation_caches
+					    (cpu, mem->dev_baseaddr[i] + s,
+					    JUST_MARK_AS_NON_WRITABLE
+					    | INVALIDATE_PADDR);
 			}
 
 			if (cpu->machine->arch == ARCH_MIPS) {
@@ -386,20 +398,21 @@
 	debug("device %2i at 0x%010llx: %s",
 	    mem->n_mmapped_devices, (long long)baseaddr, device_name);
 
-	if (flags & (MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK)
+	if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
 	    && (baseaddr & mem->dev_dyntrans_alignment) != 0) {
 		fatal("\nWARNING: Device dyntrans access, but unaligned"
 		    " baseaddr 0x%llx.\n", (long long)baseaddr);
 	}
 
-	if (flags & (MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK)) {
+	if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
 		debug(" (dyntrans %s)",
-		    (flags & MEM_DYNTRANS_WRITE_OK)? "R/W" : "R");
+		    (flags & DM_DYNTRANS_WRITE_OK)? "R/W" : "R");
 	}
 	debug("\n");
 
 	mem->dev_name[mem->n_mmapped_devices] = strdup(device_name);
 	mem->dev_baseaddr[mem->n_mmapped_devices] = baseaddr;
+	mem->dev_endaddr[mem->n_mmapped_devices] = baseaddr + len;
 	mem->dev_length[mem->n_mmapped_devices] = len;
 	mem->dev_flags[mem->n_mmapped_devices] = flags;
 	mem->dev_dyntrans_data[mem->n_mmapped_devices] = dyntrans_data;
@@ -409,14 +422,14 @@
 		exit(1);
 	}
 
-	if (flags & (MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK)
-	    && dyntrans_data == NULL) {
+	if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
+	    && !(flags & DM_EMULATED_RAM) && dyntrans_data == NULL) {
 		fatal("\nERROR: Device dyntrans access, but dyntrans_data"
 		    " = NULL!\n");
 		exit(1);
 	}
 
-	if ((size_t)dyntrans_data & 7) {
+	if ((size_t)dyntrans_data & (sizeof(void *) - 1)) {
 		fprintf(stderr, "memory_device_register():"
 		    " dyntrans_data not aligned correctly (%p)\n",
 		    dyntrans_data);