/[gxemul]/trunk/src/memory.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/src/memory.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 34 - (hide annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 18055 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============


1 dpavlin 2 /*
2 dpavlin 34 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 dpavlin 2 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 34 * $Id: memory.c,v 1.201 2006/12/30 13:30:52 debug Exp $
29 dpavlin 2 *
30     * Functions for handling the memory of an emulated machine.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36     #include <sys/types.h>
37     #include <sys/mman.h>
38    
39     #include "cpu.h"
40     #include "machine.h"
41     #include "memory.h"
42     #include "misc.h"
43    
44    
45 dpavlin 22 extern int verbose;
46 dpavlin 34 extern int quiet_mode;
47 dpavlin 2
48    
49     /*
50     * memory_readmax64():
51     *
52     * Read at most 64 bits of data from a buffer. Length is given by
53     * len, and the byte order by cpu->byte_order.
54     *
55     * This function should not be called with cpu == NULL.
56     */
57     uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
58     {
59 dpavlin 20 int i, byte_order = cpu->byte_order;
60 dpavlin 2 uint64_t x = 0;
61    
62 dpavlin 20 if (len & MEM_PCI_LITTLE_ENDIAN) {
63     len &= ~MEM_PCI_LITTLE_ENDIAN;
64     byte_order = EMUL_LITTLE_ENDIAN;
65     }
66    
67 dpavlin 2 /* Switch byte order for incoming data, if necessary: */
68 dpavlin 20 if (byte_order == EMUL_BIG_ENDIAN)
69 dpavlin 2 for (i=0; i<len; i++) {
70     x <<= 8;
71     x |= buf[i];
72     }
73     else
74     for (i=len-1; i>=0; i--) {
75     x <<= 8;
76     x |= buf[i];
77     }
78    
79     return x;
80     }
81    
82    
83     /*
84     * memory_writemax64():
85     *
86     * Write at most 64 bits of data to a buffer. Length is given by
87     * len, and the byte order by cpu->byte_order.
88     *
89     * This function should not be called with cpu == NULL.
90     */
91     void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
92     uint64_t data)
93     {
94 dpavlin 20 int i, byte_order = cpu->byte_order;
95 dpavlin 2
96 dpavlin 20 if (len & MEM_PCI_LITTLE_ENDIAN) {
97     len &= ~MEM_PCI_LITTLE_ENDIAN;
98     byte_order = EMUL_LITTLE_ENDIAN;
99     }
100    
101     if (byte_order == EMUL_LITTLE_ENDIAN)
102 dpavlin 2 for (i=0; i<len; i++) {
103     buf[i] = data & 255;
104     data >>= 8;
105     }
106     else
107     for (i=0; i<len; i++) {
108     buf[len - 1 - i] = data & 255;
109     data >>= 8;
110     }
111     }
112    
113    
114     /*
115     * zeroed_alloc():
116     *
117     * Allocates a block of memory using mmap(), and if that fails, try
118 dpavlin 12 * malloc() + memset(). The returned memory block contains only zeroes.
119 dpavlin 2 */
120     void *zeroed_alloc(size_t s)
121     {
122     void *p = mmap(NULL, s, PROT_READ | PROT_WRITE,
123     MAP_ANON | MAP_PRIVATE, -1, 0);
124 dpavlin 32
125 dpavlin 2 if (p == NULL) {
126 dpavlin 32 #if 1
127     fprintf(stderr, "zeroed_alloc(): mmap() failed. This should"
128     " not usually happen. If you can reproduce this, then"
129     " please contact me with details about your run-time"
130     " environment.\n");
131     exit(1);
132     #else
133 dpavlin 2 p = malloc(s);
134     if (p == NULL) {
135     fprintf(stderr, "out of memory\n");
136     exit(1);
137     }
138     memset(p, 0, s);
139 dpavlin 32 #endif
140 dpavlin 2 }
141 dpavlin 32
142 dpavlin 2 return p;
143     }
144    
145    
146     /*
147     * memory_new():
148     *
149     * This function creates a new memory object. An emulated machine needs one
150     * of these.
151     */
152 dpavlin 12 struct memory *memory_new(uint64_t physical_max, int arch)
153 dpavlin 2 {
154     struct memory *mem;
155     int bits_per_pagetable = BITS_PER_PAGETABLE;
156     int bits_per_memblock = BITS_PER_MEMBLOCK;
157     int entries_per_pagetable = 1 << BITS_PER_PAGETABLE;
158     int max_bits = MAX_BITS;
159     size_t s;
160    
161     mem = malloc(sizeof(struct memory));
162     if (mem == NULL) {
163     fprintf(stderr, "out of memory\n");
164     exit(1);
165     }
166    
167     memset(mem, 0, sizeof(struct memory));
168    
169     /* Check bits_per_pagetable and bits_per_memblock for sanity: */
170     if (bits_per_pagetable + bits_per_memblock != max_bits) {
171     fprintf(stderr, "memory_new(): bits_per_pagetable and "
172     "bits_per_memblock mismatch\n");
173     exit(1);
174     }
175    
176     mem->physical_max = physical_max;
177 dpavlin 12 mem->dev_dyntrans_alignment = 4095;
178     if (arch == ARCH_ALPHA)
179     mem->dev_dyntrans_alignment = 8191;
180 dpavlin 2
181     s = entries_per_pagetable * sizeof(void *);
182    
183     mem->pagetable = (unsigned char *) mmap(NULL, s,
184     PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
185     if (mem->pagetable == NULL) {
186     mem->pagetable = malloc(s);
187     if (mem->pagetable == NULL) {
188     fprintf(stderr, "out of memory\n");
189     exit(1);
190     }
191     memset(mem->pagetable, 0, s);
192     }
193    
194     mem->mmap_dev_minaddr = 0xffffffffffffffffULL;
195     mem->mmap_dev_maxaddr = 0;
196    
197     return mem;
198     }
199    
200    
201     /*
202     * memory_points_to_string():
203     *
204 dpavlin 22 * Returns 1 if there's something string-like in emulated memory at address
205     * addr, otherwise 0.
206 dpavlin 2 */
207     int memory_points_to_string(struct cpu *cpu, struct memory *mem, uint64_t addr,
208     int min_string_length)
209     {
210     int cur_length = 0;
211     unsigned char c;
212    
213     for (;;) {
214     c = '\0';
215     cpu->memory_rw(cpu, mem, addr+cur_length,
216     &c, sizeof(c), MEM_READ, CACHE_NONE | NO_EXCEPTIONS);
217     if (c=='\n' || c=='\t' || c=='\r' || (c>=' ' && c<127)) {
218     cur_length ++;
219     if (cur_length >= min_string_length)
220     return 1;
221     } else {
222     if (cur_length >= min_string_length)
223     return 1;
224     else
225     return 0;
226     }
227     }
228     }
229    
230    
231     /*
232     * memory_conv_to_string():
233     *
234 dpavlin 22 * Convert emulated memory contents to a string, placing it in a buffer
235     * provided by the caller.
236 dpavlin 2 */
237     char *memory_conv_to_string(struct cpu *cpu, struct memory *mem, uint64_t addr,
238     char *buf, int bufsize)
239     {
240     int len = 0;
241     int output_index = 0;
242     unsigned char c, p='\0';
243    
244     while (output_index < bufsize-1) {
245     c = '\0';
246     cpu->memory_rw(cpu, mem, addr+len, &c, sizeof(c), MEM_READ,
247     CACHE_NONE | NO_EXCEPTIONS);
248     buf[output_index] = c;
249     if (c>=' ' && c<127) {
250     len ++;
251     output_index ++;
252     } else if (c=='\n' || c=='\r' || c=='\t') {
253     len ++;
254     buf[output_index] = '\\';
255     output_index ++;
256     switch (c) {
257     case '\n': p = 'n'; break;
258     case '\r': p = 'r'; break;
259     case '\t': p = 't'; break;
260     }
261     if (output_index < bufsize-1) {
262     buf[output_index] = p;
263     output_index ++;
264     }
265     } else {
266     buf[output_index] = '\0';
267     return buf;
268     }
269     }
270    
271     buf[bufsize-1] = '\0';
272     return buf;
273     }
274    
275    
276     /*
277 dpavlin 12 * memory_device_dyntrans_access():
278 dpavlin 2 *
279 dpavlin 22 * Get the lowest and highest dyntrans access since last time.
280 dpavlin 2 */
281 dpavlin 12 void memory_device_dyntrans_access(struct cpu *cpu, struct memory *mem,
282 dpavlin 2 void *extra, uint64_t *low, uint64_t *high)
283     {
284     size_t s;
285 dpavlin 24 int i, need_inval = 0;
286 dpavlin 2
287     /* TODO: This is O(n), so it might be good to rewrite it some day.
288     For now, it will be enough, as long as this function is not
289     called too often. */
290    
291     for (i=0; i<mem->n_mmapped_devices; i++) {
292 dpavlin 32 if (mem->devices[i].extra == extra &&
293     mem->devices[i].flags & DM_DYNTRANS_WRITE_OK &&
294     mem->devices[i].dyntrans_data != NULL) {
295     if (mem->devices[i].dyntrans_write_low != (uint64_t) -1)
296 dpavlin 2 need_inval = 1;
297     if (low != NULL)
298 dpavlin 32 *low = mem->devices[i].dyntrans_write_low;
299     mem->devices[i].dyntrans_write_low = (uint64_t) -1;
300 dpavlin 2
301     if (high != NULL)
302 dpavlin 32 *high = mem->devices[i].dyntrans_write_high;
303     mem->devices[i].dyntrans_write_high = 0;
304 dpavlin 2
305     if (!need_inval)
306     return;
307    
308     /* Invalidate any pages of this device that might
309 dpavlin 12 be in the dyntrans load/store cache, by marking
310 dpavlin 2 the pages read-only. */
311 dpavlin 18 if (cpu->invalidate_translation_caches != NULL) {
312 dpavlin 32 for (s = *low; s <= *high;
313     s += cpu->machine->arch_pagesize)
314 dpavlin 18 cpu->invalidate_translation_caches
315 dpavlin 32 (cpu, mem->devices[i].baseaddr + s,
316 dpavlin 18 JUST_MARK_AS_NON_WRITABLE
317     | INVALIDATE_PADDR);
318 dpavlin 2 }
319    
320     return;
321     }
322     }
323     }
324    
325    
326     /*
327 dpavlin 28 * memory_device_update_data():
328     *
329     * Update a device' dyntrans data pointer.
330     *
331     * SUPER-IMPORTANT NOTE: Anyone who changes a dyntrans data pointer while
332     * things are running also needs to invalidate all CPUs' address translation
333     * caches! Otherwise, these may contain old pointers to the old data.
334     */
335     void memory_device_update_data(struct memory *mem, void *extra,
336     unsigned char *data)
337     {
338     int i;
339    
340     for (i=0; i<mem->n_mmapped_devices; i++) {
341 dpavlin 32 if (mem->devices[i].extra != extra)
342 dpavlin 28 continue;
343    
344 dpavlin 32 mem->devices[i].dyntrans_data = data;
345     mem->devices[i].dyntrans_write_low = (uint64_t)-1;
346     mem->devices[i].dyntrans_write_high = 0;
347 dpavlin 28 }
348     }
349    
350    
351     /*
352 dpavlin 2 * memory_device_register():
353     *
354 dpavlin 32 * Register a memory mapped device.
355 dpavlin 2 */
356     void memory_device_register(struct memory *mem, const char *device_name,
357     uint64_t baseaddr, uint64_t len,
358     int (*f)(struct cpu *,struct memory *,uint64_t,unsigned char *,
359     size_t,int,void *),
360 dpavlin 12 void *extra, int flags, unsigned char *dyntrans_data)
361 dpavlin 2 {
362 dpavlin 22 int i, newi = 0;
363 dpavlin 2
364 dpavlin 22 /*
365     * Figure out at which index to insert this device, and simultaneously
366     * check for collisions:
367     */
368     newi = -1;
369 dpavlin 2 for (i=0; i<mem->n_mmapped_devices; i++) {
370 dpavlin 32 if (i == 0 && baseaddr + len <= mem->devices[i].baseaddr)
371 dpavlin 22 newi = i;
372 dpavlin 32 if (i > 0 && baseaddr + len <= mem->devices[i].baseaddr &&
373     baseaddr >= mem->devices[i-1].endaddr)
374 dpavlin 22 newi = i;
375     if (i == mem->n_mmapped_devices - 1 &&
376 dpavlin 32 baseaddr >= mem->devices[i].endaddr)
377 dpavlin 22 newi = i + 1;
378    
379 dpavlin 32 /* If this is not colliding with device i, then continue: */
380     if (baseaddr + len <= mem->devices[i].baseaddr)
381 dpavlin 2 continue;
382 dpavlin 32 if (baseaddr >= mem->devices[i].endaddr)
383 dpavlin 2 continue;
384    
385 dpavlin 22 fatal("\nERROR! \"%s\" collides with device %i (\"%s\")!\n",
386 dpavlin 32 device_name, i, mem->devices[i].name);
387 dpavlin 22 exit(1);
388 dpavlin 2 }
389 dpavlin 22 if (mem->n_mmapped_devices == 0)
390     newi = 0;
391     if (newi == -1) {
392     fatal("INTERNAL ERROR\n");
393     exit(1);
394     }
395 dpavlin 2
396 dpavlin 22 if (verbose >= 2) {
397     /* (40 bits of physical address is displayed) */
398 dpavlin 24 debug("device at 0x%010"PRIx64": %s", (uint64_t) baseaddr,
399 dpavlin 22 device_name);
400 dpavlin 2
401 dpavlin 22 if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
402     && (baseaddr & mem->dev_dyntrans_alignment) != 0) {
403     fatal("\nWARNING: Device dyntrans access, but unaligned"
404 dpavlin 24 " baseaddr 0x%"PRIx64".\n", (uint64_t) baseaddr);
405 dpavlin 22 }
406    
407     if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
408     debug(" (dyntrans %s)",
409     (flags & DM_DYNTRANS_WRITE_OK)? "R/W" : "R");
410     }
411     debug("\n");
412 dpavlin 2 }
413    
414 dpavlin 22 for (i=0; i<mem->n_mmapped_devices; i++) {
415 dpavlin 32 if (dyntrans_data == mem->devices[i].dyntrans_data &&
416     mem->devices[i].flags&(DM_DYNTRANS_OK|DM_DYNTRANS_WRITE_OK)
417 dpavlin 22 && flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
418     fatal("ERROR: the data pointer used for dyntrans "
419     "accesses must only be used once!\n");
420     fatal("(%p cannot be used by '%s'; already in use by '"
421     "%s')\n", dyntrans_data, device_name,
422 dpavlin 32 mem->devices[i].name);
423 dpavlin 22 exit(1);
424     }
425 dpavlin 2 }
426    
427 dpavlin 22 mem->n_mmapped_devices++;
428 dpavlin 2
429 dpavlin 32 mem->devices = realloc(mem->devices, sizeof(struct memory_device)
430     * mem->n_mmapped_devices);
431     if (mem->devices == NULL) {
432     fprintf(stderr, "out of memory\n");
433     exit(1);
434     }
435    
436 dpavlin 22 /* Make space for the new entry: */
437 dpavlin 32 if (newi + 1 != mem->n_mmapped_devices)
438     memmove(&mem->devices[newi+1], &mem->devices[newi],
439     sizeof(struct memory_device)
440     * (mem->n_mmapped_devices - newi - 1));
441 dpavlin 22
442 dpavlin 32 mem->devices[newi].name = strdup(device_name);
443     mem->devices[newi].baseaddr = baseaddr;
444     mem->devices[newi].endaddr = baseaddr + len;
445     mem->devices[newi].length = len;
446     mem->devices[newi].flags = flags;
447     mem->devices[newi].dyntrans_data = dyntrans_data;
448 dpavlin 22
449 dpavlin 32 if (mem->devices[newi].name == NULL) {
450 dpavlin 2 fprintf(stderr, "out of memory\n");
451     exit(1);
452     }
453    
454 dpavlin 20 if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
455     && !(flags & DM_EMULATED_RAM) && dyntrans_data == NULL) {
456 dpavlin 12 fatal("\nERROR: Device dyntrans access, but dyntrans_data"
457     " = NULL!\n");
458     exit(1);
459     }
460    
461 dpavlin 18 if ((size_t)dyntrans_data & (sizeof(void *) - 1)) {
462 dpavlin 2 fprintf(stderr, "memory_device_register():"
463 dpavlin 12 " dyntrans_data not aligned correctly (%p)\n",
464     dyntrans_data);
465 dpavlin 2 exit(1);
466     }
467    
468 dpavlin 32 mem->devices[newi].dyntrans_write_low = (uint64_t)-1;
469     mem->devices[newi].dyntrans_write_high = 0;
470     mem->devices[newi].f = f;
471     mem->devices[newi].extra = extra;
472 dpavlin 2
473     if (baseaddr < mem->mmap_dev_minaddr)
474 dpavlin 12 mem->mmap_dev_minaddr = baseaddr & ~mem->dev_dyntrans_alignment;
475 dpavlin 2 if (baseaddr + len > mem->mmap_dev_maxaddr)
476 dpavlin 12 mem->mmap_dev_maxaddr = (((baseaddr + len) - 1) |
477     mem->dev_dyntrans_alignment) + 1;
478 dpavlin 32
479     if (newi < mem->last_accessed_device)
480     mem->last_accessed_device ++;
481 dpavlin 2 }
482    
483    
484     /*
485     * memory_device_remove():
486     *
487 dpavlin 32 * Unregister a memory mapped device from a memory object.
488 dpavlin 2 */
489     void memory_device_remove(struct memory *mem, int i)
490     {
491     if (i < 0 || i >= mem->n_mmapped_devices) {
492     fatal("memory_device_remove(): invalid device number %i\n", i);
493 dpavlin 32 exit(1);
494 dpavlin 2 }
495    
496     mem->n_mmapped_devices --;
497    
498     if (i == mem->n_mmapped_devices)
499     return;
500    
501 dpavlin 32 memmove(&mem->devices[i], &mem->devices[i+1],
502     sizeof(struct memory_device) * (mem->n_mmapped_devices - i));
503 dpavlin 2
504 dpavlin 32 if (i <= mem->last_accessed_device)
505     mem->last_accessed_device --;
506     if (mem->last_accessed_device < 0)
507     mem->last_accessed_device = 0;
508 dpavlin 2 }
509    
510    
511     #define MEMORY_RW userland_memory_rw
512     #define MEM_USERLAND
513     #include "memory_rw.c"
514     #undef MEM_USERLAND
515     #undef MEMORY_RW
516    
517    
518     /*
519     * memory_paddr_to_hostaddr():
520     *
521 dpavlin 28 * Translate a physical address into a host address. The usual way to call
522     * this function is to make sure that paddr is page aligned, which will result
523     * in the host _page_ corresponding to that address.
524 dpavlin 2 *
525 dpavlin 28 * Return value is a pointer to the address in the host, or NULL on failure.
526 dpavlin 2 * On reads, a NULL return value should be interpreted as reading all zeroes.
527     */
528     unsigned char *memory_paddr_to_hostaddr(struct memory *mem,
529     uint64_t paddr, int writeflag)
530     {
531     void **table;
532     int entry;
533     const int mask = (1 << BITS_PER_PAGETABLE) - 1;
534     const int shrcount = MAX_BITS - BITS_PER_PAGETABLE;
535 dpavlin 28 unsigned char *hostptr;
536 dpavlin 2
537     table = mem->pagetable;
538     entry = (paddr >> shrcount) & mask;
539    
540 dpavlin 24 /* printf("memory_paddr_to_hostaddr(): p=%16"PRIx64
541     " w=%i => entry=0x%x\n", (uint64_t) paddr, writeflag, entry); */
542 dpavlin 2
543     if (table[entry] == NULL) {
544     size_t alloclen;
545    
546     /*
547     * Special case: reading from a nonexistant memblock
548     * returns all zeroes, and doesn't allocate anything.
549     * (If any intermediate pagetable is nonexistant, then
550     * the same thing happens):
551     */
552     if (writeflag == MEM_READ)
553     return NULL;
554    
555     /* Allocate a memblock: */
556     alloclen = 1 << BITS_PER_MEMBLOCK;
557    
558     /* printf(" allocating for entry %i, len=%i\n",
559     entry, alloclen); */
560    
561     /* Anonymous mmap() should return zero-filled memory,
562     try malloc + memset if mmap failed. */
563     table[entry] = (void *) mmap(NULL, alloclen,
564 dpavlin 22 PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
565 dpavlin 2 if (table[entry] == NULL) {
566     table[entry] = malloc(alloclen);
567     if (table[entry] == NULL) {
568     fatal("out of memory\n");
569     exit(1);
570     }
571     memset(table[entry], 0, alloclen);
572     }
573     }
574    
575 dpavlin 28 hostptr = (unsigned char *) table[entry];
576    
577     if (hostptr != NULL)
578     hostptr += (paddr & ((1 << BITS_PER_MEMBLOCK) - 1));
579    
580     return hostptr;
581 dpavlin 2 }
582    
583 dpavlin 24
584     #define UPDATE_CHECKSUM(value) { \
585     internal_state -= 0x118c7771c0c0a77fULL; \
586     internal_state = ((internal_state + (value)) << 7) ^ \
587     (checksum >> 11) ^ ((checksum - (value)) << 3) ^ \
588     (internal_state - checksum) ^ ((value) - internal_state); \
589     checksum ^= internal_state; \
590     }
591    
592    
593     /*
594     * memory_checksum():
595     *
596     * Calculate a 64-bit checksum of everything in a struct memory. This is
597     * useful for tracking down bugs; an old (presumably working) version of
598     * the emulator can be compared to a newer (buggy) version.
599     */
600     uint64_t memory_checksum(struct memory *mem)
601     {
602     uint64_t internal_state = 0x80624185376feff2ULL;
603     uint64_t checksum = 0xcb9a87d5c010072cULL;
604     const int n_entries = (1 << BITS_PER_PAGETABLE) - 1;
605     const size_t len = (1 << BITS_PER_MEMBLOCK) / sizeof(uint64_t);
606     size_t entry, i;
607    
608     for (entry=0; entry<=n_entries; entry++) {
609     uint64_t **table = mem->pagetable;
610     uint64_t *memblock = table[entry];
611    
612     if (memblock == NULL) {
613     UPDATE_CHECKSUM(0x1198ab7c8174a76fULL);
614     continue;
615     }
616    
617     for (i=0; i<len; i++)
618     UPDATE_CHECKSUM(memblock[i]);
619     }
620    
621     return checksum;
622     }
623    
624 dpavlin 34
625     /*
626     * memory_warn_about_unimplemented_addr():
627     *
628     * Called from memory_rw whenever memory outside of the physical address space
629     * is accessed (and quiet_mode isn't set).
630     */
631     void memory_warn_about_unimplemented_addr(struct cpu *cpu, struct memory *mem,
632     int writeflag, uint64_t paddr, uint8_t *data, size_t len)
633     {
634     uint64_t offset, old_pc = cpu->pc;
635     char *symbol;
636    
637     /*
638     * This allows guest OS kernels to probe memory a few KBs past the
639     * end of memory, without giving too many warnings.
640     */
641     if (paddr < mem->physical_max + 0x40000)
642     return;
643    
644     if (!cpu->machine->halt_on_nonexistant_memaccess && quiet_mode)
645     return;
646    
647     fatal("[ memory_rw(): %s ", writeflag? "write":"read");
648    
649     if (writeflag) {
650     unsigned int i;
651     debug("data={", writeflag);
652     if (len > 16) {
653     int start2 = len-16;
654     for (i=0; i<16; i++)
655     debug("%s%02x", i?",":"", data[i]);
656     debug(" .. ");
657     if (start2 < 16)
658     start2 = 16;
659     for (i=start2; i<len; i++)
660     debug("%s%02x", i?",":"", data[i]);
661     } else
662     for (i=0; i<len; i++)
663     debug("%s%02x", i?",":"", data[i]);
664     debug("} ");
665     }
666    
667     fatal("paddr=0x%llx >= physical_max; pc=", (long long)paddr);
668     if (cpu->is_32bit)
669     fatal("0x%08"PRIx32, (uint32_t) old_pc);
670     else
671     fatal("0x%016"PRIx64, (uint64_t) old_pc);
672     symbol = get_symbol_name(&cpu->machine->symbol_context,
673     old_pc, &offset);
674     fatal(" <%s> ]\n", symbol? symbol : " no symbol ");
675    
676     if (cpu->machine->halt_on_nonexistant_memaccess) {
677     /* TODO: Halt in a nicer way. Not possible with the
678     current dyntrans system... */
679     exit(1);
680     }
681     }
682    

  ViewVC Help
Powered by ViewVC 1.1.26