/[gxemul]/trunk/src/memory.c
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Revision 28 - (hide annotations)
Mon Oct 8 16:20:26 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 17959 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============


1 dpavlin 2 /*
2 dpavlin 22 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 dpavlin 2 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 28 * $Id: memory.c,v 1.192 2006/07/14 16:33:27 debug Exp $
29 dpavlin 2 *
30     * Functions for handling the memory of an emulated machine.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36     #include <sys/types.h>
37     #include <sys/mman.h>
38    
39     #include "cpu.h"
40     #include "machine.h"
41     #include "memory.h"
42     #include "misc.h"
43    
44    
45 dpavlin 22 extern int verbose;
46 dpavlin 2
47    
48     /*
49     * memory_readmax64():
50     *
51     * Read at most 64 bits of data from a buffer. Length is given by
52     * len, and the byte order by cpu->byte_order.
53     *
54     * This function should not be called with cpu == NULL.
55     */
56     uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
57     {
58 dpavlin 20 int i, byte_order = cpu->byte_order;
59 dpavlin 2 uint64_t x = 0;
60    
61 dpavlin 20 if (len & MEM_PCI_LITTLE_ENDIAN) {
62     len &= ~MEM_PCI_LITTLE_ENDIAN;
63     byte_order = EMUL_LITTLE_ENDIAN;
64     }
65    
66 dpavlin 2 /* Switch byte order for incoming data, if necessary: */
67 dpavlin 20 if (byte_order == EMUL_BIG_ENDIAN)
68 dpavlin 2 for (i=0; i<len; i++) {
69     x <<= 8;
70     x |= buf[i];
71     }
72     else
73     for (i=len-1; i>=0; i--) {
74     x <<= 8;
75     x |= buf[i];
76     }
77    
78     return x;
79     }
80    
81    
82     /*
83     * memory_writemax64():
84     *
85     * Write at most 64 bits of data to a buffer. Length is given by
86     * len, and the byte order by cpu->byte_order.
87     *
88     * This function should not be called with cpu == NULL.
89     */
90     void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
91     uint64_t data)
92     {
93 dpavlin 20 int i, byte_order = cpu->byte_order;
94 dpavlin 2
95 dpavlin 20 if (len & MEM_PCI_LITTLE_ENDIAN) {
96     len &= ~MEM_PCI_LITTLE_ENDIAN;
97     byte_order = EMUL_LITTLE_ENDIAN;
98     }
99    
100     if (byte_order == EMUL_LITTLE_ENDIAN)
101 dpavlin 2 for (i=0; i<len; i++) {
102     buf[i] = data & 255;
103     data >>= 8;
104     }
105     else
106     for (i=0; i<len; i++) {
107     buf[len - 1 - i] = data & 255;
108     data >>= 8;
109     }
110     }
111    
112    
113     /*
114     * zeroed_alloc():
115     *
116     * Allocates a block of memory using mmap(), and if that fails, try
117 dpavlin 12 * malloc() + memset(). The returned memory block contains only zeroes.
118 dpavlin 2 */
119     void *zeroed_alloc(size_t s)
120     {
121     void *p = mmap(NULL, s, PROT_READ | PROT_WRITE,
122     MAP_ANON | MAP_PRIVATE, -1, 0);
123     if (p == NULL) {
124     p = malloc(s);
125     if (p == NULL) {
126     fprintf(stderr, "out of memory\n");
127     exit(1);
128     }
129     memset(p, 0, s);
130     }
131     return p;
132     }
133    
134    
135     /*
136     * memory_new():
137     *
138     * This function creates a new memory object. An emulated machine needs one
139     * of these.
140     */
141 dpavlin 12 struct memory *memory_new(uint64_t physical_max, int arch)
142 dpavlin 2 {
143     struct memory *mem;
144     int bits_per_pagetable = BITS_PER_PAGETABLE;
145     int bits_per_memblock = BITS_PER_MEMBLOCK;
146     int entries_per_pagetable = 1 << BITS_PER_PAGETABLE;
147     int max_bits = MAX_BITS;
148     size_t s;
149    
150     mem = malloc(sizeof(struct memory));
151     if (mem == NULL) {
152     fprintf(stderr, "out of memory\n");
153     exit(1);
154     }
155    
156     memset(mem, 0, sizeof(struct memory));
157    
158     /* Check bits_per_pagetable and bits_per_memblock for sanity: */
159     if (bits_per_pagetable + bits_per_memblock != max_bits) {
160     fprintf(stderr, "memory_new(): bits_per_pagetable and "
161     "bits_per_memblock mismatch\n");
162     exit(1);
163     }
164    
165     mem->physical_max = physical_max;
166 dpavlin 12 mem->dev_dyntrans_alignment = 4095;
167     if (arch == ARCH_ALPHA)
168     mem->dev_dyntrans_alignment = 8191;
169 dpavlin 2
170     s = entries_per_pagetable * sizeof(void *);
171    
172     mem->pagetable = (unsigned char *) mmap(NULL, s,
173     PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
174     if (mem->pagetable == NULL) {
175     mem->pagetable = malloc(s);
176     if (mem->pagetable == NULL) {
177     fprintf(stderr, "out of memory\n");
178     exit(1);
179     }
180     memset(mem->pagetable, 0, s);
181     }
182    
183     mem->mmap_dev_minaddr = 0xffffffffffffffffULL;
184     mem->mmap_dev_maxaddr = 0;
185    
186     return mem;
187     }
188    
189    
190     /*
191     * memory_points_to_string():
192     *
193 dpavlin 22 * Returns 1 if there's something string-like in emulated memory at address
194     * addr, otherwise 0.
195 dpavlin 2 */
196     int memory_points_to_string(struct cpu *cpu, struct memory *mem, uint64_t addr,
197     int min_string_length)
198     {
199     int cur_length = 0;
200     unsigned char c;
201    
202     for (;;) {
203     c = '\0';
204     cpu->memory_rw(cpu, mem, addr+cur_length,
205     &c, sizeof(c), MEM_READ, CACHE_NONE | NO_EXCEPTIONS);
206     if (c=='\n' || c=='\t' || c=='\r' || (c>=' ' && c<127)) {
207     cur_length ++;
208     if (cur_length >= min_string_length)
209     return 1;
210     } else {
211     if (cur_length >= min_string_length)
212     return 1;
213     else
214     return 0;
215     }
216     }
217     }
218    
219    
220     /*
221     * memory_conv_to_string():
222     *
223 dpavlin 22 * Convert emulated memory contents to a string, placing it in a buffer
224     * provided by the caller.
225 dpavlin 2 */
226     char *memory_conv_to_string(struct cpu *cpu, struct memory *mem, uint64_t addr,
227     char *buf, int bufsize)
228     {
229     int len = 0;
230     int output_index = 0;
231     unsigned char c, p='\0';
232    
233     while (output_index < bufsize-1) {
234     c = '\0';
235     cpu->memory_rw(cpu, mem, addr+len, &c, sizeof(c), MEM_READ,
236     CACHE_NONE | NO_EXCEPTIONS);
237     buf[output_index] = c;
238     if (c>=' ' && c<127) {
239     len ++;
240     output_index ++;
241     } else if (c=='\n' || c=='\r' || c=='\t') {
242     len ++;
243     buf[output_index] = '\\';
244     output_index ++;
245     switch (c) {
246     case '\n': p = 'n'; break;
247     case '\r': p = 'r'; break;
248     case '\t': p = 't'; break;
249     }
250     if (output_index < bufsize-1) {
251     buf[output_index] = p;
252     output_index ++;
253     }
254     } else {
255     buf[output_index] = '\0';
256     return buf;
257     }
258     }
259    
260     buf[bufsize-1] = '\0';
261     return buf;
262     }
263    
264    
265     /*
266 dpavlin 12 * memory_device_dyntrans_access():
267 dpavlin 2 *
268 dpavlin 22 * Get the lowest and highest dyntrans access since last time.
269 dpavlin 2 */
270 dpavlin 12 void memory_device_dyntrans_access(struct cpu *cpu, struct memory *mem,
271 dpavlin 2 void *extra, uint64_t *low, uint64_t *high)
272     {
273     size_t s;
274 dpavlin 24 int i, need_inval = 0;
275 dpavlin 2
276     /* TODO: This is O(n), so it might be good to rewrite it some day.
277     For now, it will be enough, as long as this function is not
278     called too often. */
279    
280     for (i=0; i<mem->n_mmapped_devices; i++) {
281     if (mem->dev_extra[i] == extra &&
282 dpavlin 22 mem->dev_flags[i] & DM_DYNTRANS_WRITE_OK &&
283 dpavlin 12 mem->dev_dyntrans_data[i] != NULL) {
284     if (mem->dev_dyntrans_write_low[i] != (uint64_t) -1)
285 dpavlin 2 need_inval = 1;
286     if (low != NULL)
287 dpavlin 12 *low = mem->dev_dyntrans_write_low[i];
288     mem->dev_dyntrans_write_low[i] = (uint64_t) -1;
289 dpavlin 2
290     if (high != NULL)
291 dpavlin 12 *high = mem->dev_dyntrans_write_high[i];
292     mem->dev_dyntrans_write_high[i] = 0;
293 dpavlin 2
294     if (!need_inval)
295     return;
296    
297     /* Invalidate any pages of this device that might
298 dpavlin 12 be in the dyntrans load/store cache, by marking
299 dpavlin 2 the pages read-only. */
300 dpavlin 18 if (cpu->invalidate_translation_caches != NULL) {
301 dpavlin 12 for (s=0; s<mem->dev_length[i];
302     s+=cpu->machine->arch_pagesize)
303 dpavlin 18 cpu->invalidate_translation_caches
304 dpavlin 14 (cpu, mem->dev_baseaddr[i] + s,
305 dpavlin 18 JUST_MARK_AS_NON_WRITABLE
306     | INVALIDATE_PADDR);
307 dpavlin 2 }
308    
309     return;
310     }
311     }
312     }
313    
314    
315     /*
316 dpavlin 28 * memory_device_update_data():
317     *
318     * Update a device' dyntrans data pointer.
319     *
320     * SUPER-IMPORTANT NOTE: Anyone who changes a dyntrans data pointer while
321     * things are running also needs to invalidate all CPUs' address translation
322     * caches! Otherwise, these may contain old pointers to the old data.
323     */
324     void memory_device_update_data(struct memory *mem, void *extra,
325     unsigned char *data)
326     {
327     int i;
328    
329     for (i=0; i<mem->n_mmapped_devices; i++) {
330     if (mem->dev_extra[i] != extra)
331     continue;
332    
333     mem->dev_dyntrans_data[i] = data;
334     mem->dev_dyntrans_write_low[i] = (uint64_t)-1;
335     mem->dev_dyntrans_write_high[i] = 0;
336     }
337     }
338    
339    
340     /*
341 dpavlin 2 * memory_device_register():
342     *
343     * Register a (memory mapped) device by adding it to the dev_* fields of a
344     * memory struct.
345     */
346     void memory_device_register(struct memory *mem, const char *device_name,
347     uint64_t baseaddr, uint64_t len,
348     int (*f)(struct cpu *,struct memory *,uint64_t,unsigned char *,
349     size_t,int,void *),
350 dpavlin 12 void *extra, int flags, unsigned char *dyntrans_data)
351 dpavlin 2 {
352 dpavlin 22 int i, newi = 0;
353 dpavlin 2
354     if (mem->n_mmapped_devices >= MAX_DEVICES) {
355     fprintf(stderr, "memory_device_register(): too many "
356     "devices registered, cannot register '%s'\n", device_name);
357     exit(1);
358     }
359    
360 dpavlin 22 /*
361     * Figure out at which index to insert this device, and simultaneously
362     * check for collisions:
363     */
364     newi = -1;
365 dpavlin 2 for (i=0; i<mem->n_mmapped_devices; i++) {
366 dpavlin 22 if (i == 0 && baseaddr + len <= mem->dev_baseaddr[i])
367     newi = i;
368     if (i > 0 && baseaddr + len <= mem->dev_baseaddr[i] &&
369     baseaddr >= mem->dev_endaddr[i-1])
370     newi = i;
371     if (i == mem->n_mmapped_devices - 1 &&
372     baseaddr >= mem->dev_endaddr[i])
373     newi = i + 1;
374    
375 dpavlin 2 /* If we are not colliding with device i, then continue: */
376     if (baseaddr + len <= mem->dev_baseaddr[i])
377     continue;
378 dpavlin 22 if (baseaddr >= mem->dev_endaddr[i])
379 dpavlin 2 continue;
380    
381 dpavlin 22 fatal("\nERROR! \"%s\" collides with device %i (\"%s\")!\n",
382 dpavlin 2 device_name, i, mem->dev_name[i]);
383 dpavlin 22 exit(1);
384 dpavlin 2 }
385 dpavlin 22 if (mem->n_mmapped_devices == 0)
386     newi = 0;
387     if (newi == -1) {
388     fatal("INTERNAL ERROR\n");
389     exit(1);
390     }
391 dpavlin 2
392 dpavlin 22 if (verbose >= 2) {
393     /* (40 bits of physical address is displayed) */
394 dpavlin 24 debug("device at 0x%010"PRIx64": %s", (uint64_t) baseaddr,
395 dpavlin 22 device_name);
396 dpavlin 2
397 dpavlin 22 if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
398     && (baseaddr & mem->dev_dyntrans_alignment) != 0) {
399     fatal("\nWARNING: Device dyntrans access, but unaligned"
400 dpavlin 24 " baseaddr 0x%"PRIx64".\n", (uint64_t) baseaddr);
401 dpavlin 22 }
402    
403     if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
404     debug(" (dyntrans %s)",
405     (flags & DM_DYNTRANS_WRITE_OK)? "R/W" : "R");
406     }
407     debug("\n");
408 dpavlin 2 }
409    
410 dpavlin 22 for (i=0; i<mem->n_mmapped_devices; i++) {
411     if (dyntrans_data == mem->dev_dyntrans_data[i] &&
412     mem->dev_flags[i] & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
413     && flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
414     fatal("ERROR: the data pointer used for dyntrans "
415     "accesses must only be used once!\n");
416     fatal("(%p cannot be used by '%s'; already in use by '"
417     "%s')\n", dyntrans_data, device_name,
418     mem->dev_name[i]);
419     exit(1);
420     }
421 dpavlin 2 }
422    
423 dpavlin 22 mem->n_mmapped_devices++;
424 dpavlin 2
425 dpavlin 22 /*
426     * YUCK! This is ugly. TODO: fix
427     */
428     /* Make space for the new entry: */
429     memmove(&mem->dev_name[newi+1], &mem->dev_name[newi], sizeof(char *) *
430     (MAX_DEVICES - newi - 1));
431     memmove(&mem->dev_baseaddr[newi+1], &mem->dev_baseaddr[newi],
432     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
433     memmove(&mem->dev_endaddr[newi+1], &mem->dev_endaddr[newi],
434     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
435     memmove(&mem->dev_length[newi+1], &mem->dev_length[newi],
436     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
437     memmove(&mem->dev_flags[newi+1], &mem->dev_flags[newi], sizeof(int) *
438     (MAX_DEVICES - newi - 1));
439     memmove(&mem->dev_extra[newi+1], &mem->dev_extra[newi], sizeof(void *) *
440     (MAX_DEVICES - newi - 1));
441     memmove(&mem->dev_f[newi+1], &mem->dev_f[newi], sizeof(void *) *
442     (MAX_DEVICES - newi - 1));
443     memmove(&mem->dev_dyntrans_data[newi+1], &mem->dev_dyntrans_data[newi],
444     sizeof(void *) * (MAX_DEVICES - newi - 1));
445     memmove(&mem->dev_dyntrans_write_low[newi+1],
446     &mem->dev_dyntrans_write_low[newi],
447     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
448     memmove(&mem->dev_dyntrans_write_high[newi+1],
449     &mem->dev_dyntrans_write_high[newi],
450     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
451    
452    
453     mem->dev_name[newi] = strdup(device_name);
454     mem->dev_baseaddr[newi] = baseaddr;
455     mem->dev_endaddr[newi] = baseaddr + len;
456     mem->dev_length[newi] = len;
457     mem->dev_flags[newi] = flags;
458     mem->dev_dyntrans_data[newi] = dyntrans_data;
459    
460     if (mem->dev_name[newi] == NULL) {
461 dpavlin 2 fprintf(stderr, "out of memory\n");
462     exit(1);
463     }
464    
465 dpavlin 20 if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
466     && !(flags & DM_EMULATED_RAM) && dyntrans_data == NULL) {
467 dpavlin 12 fatal("\nERROR: Device dyntrans access, but dyntrans_data"
468     " = NULL!\n");
469     exit(1);
470     }
471    
472 dpavlin 18 if ((size_t)dyntrans_data & (sizeof(void *) - 1)) {
473 dpavlin 2 fprintf(stderr, "memory_device_register():"
474 dpavlin 12 " dyntrans_data not aligned correctly (%p)\n",
475     dyntrans_data);
476 dpavlin 2 exit(1);
477     }
478    
479 dpavlin 22 mem->dev_dyntrans_write_low[newi] = (uint64_t)-1;
480     mem->dev_dyntrans_write_high[newi] = 0;
481     mem->dev_f[newi] = f;
482     mem->dev_extra[newi] = extra;
483 dpavlin 2
484     if (baseaddr < mem->mmap_dev_minaddr)
485 dpavlin 12 mem->mmap_dev_minaddr = baseaddr & ~mem->dev_dyntrans_alignment;
486 dpavlin 2 if (baseaddr + len > mem->mmap_dev_maxaddr)
487 dpavlin 12 mem->mmap_dev_maxaddr = (((baseaddr + len) - 1) |
488     mem->dev_dyntrans_alignment) + 1;
489 dpavlin 2 }
490    
491    
492     /*
493     * memory_device_remove():
494     *
495     * Unregister a (memory mapped) device from a memory struct.
496     */
497     void memory_device_remove(struct memory *mem, int i)
498     {
499     if (i < 0 || i >= mem->n_mmapped_devices) {
500     fatal("memory_device_remove(): invalid device number %i\n", i);
501     return;
502     }
503    
504     mem->n_mmapped_devices --;
505    
506     if (i == mem->n_mmapped_devices)
507     return;
508    
509     /*
510     * YUCK! This is ugly. TODO: fix
511     */
512    
513     memmove(&mem->dev_name[i], &mem->dev_name[i+1], sizeof(char *) *
514     (MAX_DEVICES - i - 1));
515     memmove(&mem->dev_baseaddr[i], &mem->dev_baseaddr[i+1],
516     sizeof(uint64_t) * (MAX_DEVICES - i - 1));
517 dpavlin 22 memmove(&mem->dev_endaddr[i], &mem->dev_endaddr[i+1],
518     sizeof(uint64_t) * (MAX_DEVICES - i - 1));
519 dpavlin 2 memmove(&mem->dev_length[i], &mem->dev_length[i+1], sizeof(uint64_t) *
520     (MAX_DEVICES - i - 1));
521     memmove(&mem->dev_flags[i], &mem->dev_flags[i+1], sizeof(int) *
522     (MAX_DEVICES - i - 1));
523     memmove(&mem->dev_extra[i], &mem->dev_extra[i+1], sizeof(void *) *
524     (MAX_DEVICES - i - 1));
525     memmove(&mem->dev_f[i], &mem->dev_f[i+1], sizeof(void *) *
526     (MAX_DEVICES - i - 1));
527 dpavlin 12 memmove(&mem->dev_dyntrans_data[i], &mem->dev_dyntrans_data[i+1],
528 dpavlin 2 sizeof(void *) * (MAX_DEVICES - i - 1));
529 dpavlin 12 memmove(&mem->dev_dyntrans_write_low[i], &mem->dev_dyntrans_write_low
530 dpavlin 22 [i+1], sizeof(uint64_t) * (MAX_DEVICES - i - 1));
531 dpavlin 12 memmove(&mem->dev_dyntrans_write_high[i], &mem->dev_dyntrans_write_high
532 dpavlin 22 [i+1], sizeof(uint64_t) * (MAX_DEVICES - i - 1));
533 dpavlin 2 }
534    
535    
536     #define MEMORY_RW userland_memory_rw
537     #define MEM_USERLAND
538     #include "memory_rw.c"
539     #undef MEM_USERLAND
540     #undef MEMORY_RW
541    
542    
543     /*
544     * memory_paddr_to_hostaddr():
545     *
546 dpavlin 28 * Translate a physical address into a host address. The usual way to call
547     * this function is to make sure that paddr is page aligned, which will result
548     * in the host _page_ corresponding to that address.
549 dpavlin 2 *
550 dpavlin 28 * Return value is a pointer to the address in the host, or NULL on failure.
551 dpavlin 2 * On reads, a NULL return value should be interpreted as reading all zeroes.
552     */
553     unsigned char *memory_paddr_to_hostaddr(struct memory *mem,
554     uint64_t paddr, int writeflag)
555     {
556     void **table;
557     int entry;
558     const int mask = (1 << BITS_PER_PAGETABLE) - 1;
559     const int shrcount = MAX_BITS - BITS_PER_PAGETABLE;
560 dpavlin 28 unsigned char *hostptr;
561 dpavlin 2
562     table = mem->pagetable;
563     entry = (paddr >> shrcount) & mask;
564    
565 dpavlin 24 /* printf("memory_paddr_to_hostaddr(): p=%16"PRIx64
566     " w=%i => entry=0x%x\n", (uint64_t) paddr, writeflag, entry); */
567 dpavlin 2
568     if (table[entry] == NULL) {
569     size_t alloclen;
570    
571     /*
572     * Special case: reading from a nonexistant memblock
573     * returns all zeroes, and doesn't allocate anything.
574     * (If any intermediate pagetable is nonexistant, then
575     * the same thing happens):
576     */
577     if (writeflag == MEM_READ)
578     return NULL;
579    
580     /* Allocate a memblock: */
581     alloclen = 1 << BITS_PER_MEMBLOCK;
582    
583     /* printf(" allocating for entry %i, len=%i\n",
584     entry, alloclen); */
585    
586     /* Anonymous mmap() should return zero-filled memory,
587     try malloc + memset if mmap failed. */
588     table[entry] = (void *) mmap(NULL, alloclen,
589 dpavlin 22 PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
590 dpavlin 2 if (table[entry] == NULL) {
591     table[entry] = malloc(alloclen);
592     if (table[entry] == NULL) {
593     fatal("out of memory\n");
594     exit(1);
595     }
596     memset(table[entry], 0, alloclen);
597     }
598     }
599    
600 dpavlin 28 hostptr = (unsigned char *) table[entry];
601    
602     if (hostptr != NULL)
603     hostptr += (paddr & ((1 << BITS_PER_MEMBLOCK) - 1));
604    
605     return hostptr;
606 dpavlin 2 }
607    
608 dpavlin 24
609     #define UPDATE_CHECKSUM(value) { \
610     internal_state -= 0x118c7771c0c0a77fULL; \
611     internal_state = ((internal_state + (value)) << 7) ^ \
612     (checksum >> 11) ^ ((checksum - (value)) << 3) ^ \
613     (internal_state - checksum) ^ ((value) - internal_state); \
614     checksum ^= internal_state; \
615     }
616    
617    
618     /*
619     * memory_checksum():
620     *
621     * Calculate a 64-bit checksum of everything in a struct memory. This is
622     * useful for tracking down bugs; an old (presumably working) version of
623     * the emulator can be compared to a newer (buggy) version.
624     */
625     uint64_t memory_checksum(struct memory *mem)
626     {
627     uint64_t internal_state = 0x80624185376feff2ULL;
628     uint64_t checksum = 0xcb9a87d5c010072cULL;
629     const int n_entries = (1 << BITS_PER_PAGETABLE) - 1;
630     const size_t len = (1 << BITS_PER_MEMBLOCK) / sizeof(uint64_t);
631     size_t entry, i;
632    
633     for (entry=0; entry<=n_entries; entry++) {
634     uint64_t **table = mem->pagetable;
635     uint64_t *memblock = table[entry];
636    
637     if (memblock == NULL) {
638     UPDATE_CHECKSUM(0x1198ab7c8174a76fULL);
639     continue;
640     }
641    
642     for (i=0; i<len; i++)
643     UPDATE_CHECKSUM(memblock[i]);
644     }
645    
646     return checksum;
647     }
648    

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