/[gxemul]/trunk/src/memory.c
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Revision 24 - (hide annotations)
Mon Oct 8 16:19:56 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 17036 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1256 2006/06/23 20:43:44 debug Exp $
20060219	Various minor updates. Removing the old MIPS16 skeleton code,
		because it will need to be rewritten for dyntrans anyway.
20060220-22	Removing the non-working dyntrans backend support.
		Continuing on the 64-bit dyntrans virtual memory generalization.
20060223	More work on the 64-bit vm generalization.
20060225	Beginning on MIPS dyntrans load/store instructions.
		Minor PPC updates (64-bit load/store, etc).
		Fixes for the variable-instruction-length framework, some
		minor AVR updates (a simple Hello World program works!).
		Beginning on a skeleton for automatically generating documen-
		tation (for devices etc.).
20060226	PPC updates (adding some more 64-bit instructions, etc).
		AVR updates (more instructions).
		FINALLY found and fixed the zs bug, making NetBSD/macppc
		accept the serial console.
20060301	Adding more AVR instructions.
20060304	Continuing on AVR-related stuff. Beginning on a framework for
		cycle-accurate device emulation. Adding an experimental "PAL
		TV" device (just a dummy so far).
20060305	Adding more AVR instructions.
		Adding a dummy epcom serial controller (for TS7200 emulation).
20060310	Removing the emul() command from configuration files, so only
		net() and machine() are supported.
		Minor progress on the MIPS dyntrans rewrite.
20060311	Continuing on the MIPS dyntrans rewrite (adding more
		instructions, etc).
20060315	Adding more instructions (sllv, srav, srlv, bgtz[l], blez[l],
		beql, bnel, slti[u], various loads and stores).
20060316	Removing the ALWAYS_SIGNEXTEND_32 option, since it was rarely
		used.
		Adding more MIPS dyntrans instructions, and fixing bugs.
20060318	Implementing fast loads/stores for MIPS dyntrans (big/little
		endian, 32-bit and 64-bit modes).
20060320	Making MIPS dyntrans the default configure option; use
		"--enable-oldmips" to use the old bintrans system.
		Adding MIPS dyntrans dmult[u]; minor updates.
20060322	Continuing... adding some more instructions.
		Adding a simple skeleton for demangling C++ "_ZN" symbols.
20060323	Moving src/debugger.c into a new directory (src/debugger/).
20060324	Fixing the hack used to load PPC ELFs (useful for relocated
		Linux/ppc kernels), and adding a dummy G3 machine mode.
20060325-26	Beginning to experiment with GDB remote serial protocol
		connections; adding a -G command line option for selecting
		which TCP port to listen to.
20060330	Beginning a major cleanup to replace things like "0x%016llx"
		with more correct "0x%016"PRIx64, etc.
		Continuing on the GDB remote serial protocol support.
20060331	More cleanup, and some minor GDB remote progress.
20060402	Adding a hack to the configure script, to allow compilation
		on systems that lack PRIx64 etc.
20060406	Removing the temporary FreeBSD/arm hack in dev_ns16550.c and
		replacing it with a better fix from Olivier Houchard.
20060407	A remote debugger (gdb or ddd) can now start and stop the
		emulator using the GDB remote serial protocol, and registers
		and memory can be read. MIPS only for now.
20060408	More GDB progress: single-stepping also works, and also adding
		support for ARM, PowerPC, and Alpha targets.
		Continuing on the delay-slot-across-page-boundary issue.
20060412	Minor update: beginning to add support for the SPARC target
		to the remote GDB functionality.
20060414	Various MIPS updates: adding more instructions for dyntrans
		(eret, add), and making some exceptions work. Fixing a bug
		in dmult[u].
		Implementing the first SPARC instructions (sethi, or).
20060415	Adding "magic trap" instructions so that PROM calls can be
		software emulated in MIPS dyntrans.
		Adding more MIPS dyntrans instructions (ddiv, dadd) and
		fixing another bug in dmult.
20060416	More MIPS dyntrans progress: adding [d]addi, movn, movz, dsllv,
		rfi, an ugly hack for supporting R2000/R3000 style faked caches,
		preliminary interrupt support, and various other updates and
		bugfixes.
20060417	Adding more SPARC instructions (add, sub, sll[x], sra[x],
		srl[x]), and useful SPARC header definitions.
		Adding the first (trivial) x86/AMD64 dyntrans instructions (nop,
		cli/sti, stc/clc, std/cld, simple mov, inc ax). Various other
		x86 updates related to variable instruction length stuff.
		Adding unaligned loads/stores to the MIPS dyntrans mode (but
		still using the pre-dyntrans (slow) imlementation).
20060419	Fixing a MIPS dyntrans exception-in-delay-slot bug.
		Removing the old "show opcode statistics" functionality, since
		it wasn't really useful and isn't implemented for dyntrans.
		Single-stepping (or running with instruction trace) now looks
		ok with dyntrans with delay-slot architectures.
20060420	Minor hacks (removing the -B command line option when compiled
		for non-bintrans, and some other very minor updates).
		Adding (slow) MIPS dyntrans load-linked/store-conditional.
20060422	Applying fixes for bugs discovered by Nils Weller's nwcc
		(static DEC memmap => now per machine, and adding an extern
		keyword in cpu_arm_instr.c).
		Finally found one of the MIPS dyntrans bugs that I've been
		looking for (copy/paste spelling error BIG vs LITTLE endian in
		cpu_mips_instr_loadstore.c for 16-bit fast stores).
		FINALLY found the major MIPS dyntrans bug: slti vs sltiu
		signed/unsigned code in cpu_mips_instr.c. :-)
		Adding more MIPS dyntrans instructions (lwc1, swc1, bgezal[l],
		ctc1, tlt[u], tge[u], tne, beginning on rdhwr).
		NetBSD/hpcmips can now reach userland when using dyntrans :-)
		Adding some more x86 dyntrans instructions.
		Finally removed the old Alpha-specific virtual memory code,
		and replaced it with the generic 64-bit version.
		Beginning to add disassembly support for SPECIAL3 MIPS opcodes.
20060423	Continuing on the delay-slot-across-page-boundary issue;
		adding an end_of_page2 ic slot (like I had planned before, but
		had removed for some reason).
		Adding a quick-and-dirty fallback to legacy coprocessor 1
		code (i.e. skipping dyntrans implementation for now).
		NetBSD/hpcmips and NetBSD/pmax (when running on an emulated
		R4400) can now be installed and run. :-)  (Many bugs left
		to fix, though.)
		Adding more MIPS dyntrans instructions: madd[u], msub[u].
		Cleaning up the SPECIAL2 vs R5900/TX79/C790 "MMI" opcode
		maps somewhat (disassembly and dyntrans instruction decoding).
20060424	Adding an isa_revision field to mips_cpu_types.h, and making
		sure that SPECIAL3 opcodes cause Reserved Instruction
		exceptions on MIPS32/64 revisions lower than 2.
		Adding the SPARC 'ba', 'call', 'jmpl/retl', 'and', and 'xor'
		instructions.
20060425	Removing the -m command line option ("run at most x 
		instructions") and -T ("single_step_on_bad_addr"), because
		they never worked correctly with dyntrans anyway.
		Freshening up the man page.
20060428	Adding more MIPS dyntrans instructions: bltzal[l], idle.
		Enabling MIPS dyntrans compare interrupts.
20060429	FINALLY found the weird dyntrans bug, causing NetBSD etc. to
		behave strangely: some floating point code (conditional
		coprocessor branches) could not be reused from the old
		non-dyntrans code. The "quick-and-dirty fallback" only appeared
		to work. Fixing by implementing bc1* for MIPS dyntrans.
		More MIPS instructions: [d]sub, sdc1, ldc1, dmtc1, dmfc1, cfc0.
		Freshening up MIPS floating point disassembly appearance.
20060430	Continuing on C790/R5900/TX79 disassembly; implementing 128-bit
		"por" and "pextlw".
20060504	Disabling -u (userland emulation) unless compiled as unstable
		development version.
		Beginning on freshening up the testmachine include files,
		to make it easier to reuse those files (placing them in
		src/include/testmachine/), and beginning on a set of "demos"
		or "tutorials" for the testmachine functionality.
		Minor updates to the MIPS GDB remote protocol stub.
		Refreshing doc/experiments.html and gdb_remote.html.
		Enabling Alpha emulation in the stable release configuration,
		even though no guest OSes for Alpha can run yet.
20060505	Adding a generic 'settings' object, which will contain
		references to settable variables (which will later be possible
		to access using the debugger).
20060506	Updating dev_disk and corresponding demo/documentation (and
		switching from SCSI to IDE disk types, so it actually works
		with current test machines :-).
20060510	Adding a -D_LARGEFILE_SOURCE hack for 64-bit Linux hosts,
		so that fseeko() doesn't give a warning.
		Updating the section about how dyntrans works (the "runnable
		IR") in doc/intro.html.
		Instruction updates (some x64=1 checks, some more R5900
		dyntrans stuff: better mul/mult separation from MIPS32/64,
		adding ei and di).
		Updating MIPS cpuregs.h to a newer one (from NetBSD).
		Adding more MIPS dyntrans instructions: deret, ehb.
20060514	Adding disassembly and beginning implementation of SPARC wr
		and wrpr instructions.
20060515	Adding a SUN SPARC machine mode, with dummy SS20 and Ultra1
		machines. Adding the 32-bit "rd psr" instruction.
20060517	Disassembly support for the general SPARC rd instruction.
		Partial implementation of the cmp (subcc) instruction.
		Some other minor updates (making sure that R5900 processors
		start up with the EIE bit enabled, otherwise Linux/playstation2
		receives no interrupts).
20060519	Minor MIPS updates/cleanups.
20060521	Moving the MeshCube machine into evbmips; this seems to work
		reasonably well with a snapshot of a NetBSD MeshCube kernel.
		Cleanup/fix of MIPS config0 register initialization.
20060529	Minor MIPS fixes, including a sign-extension fix to the
		unaligned load/store code, which makes NetBSD/pmax on R3000
		work better with dyntrans. (Ultrix and Linux/DECstation still
		don't work, though.)
20060530	Minor updates to the Alpha machine mode: adding an AlphaBook
		mode, an LCA bus (forwarding accesses to an ISA bus), etc.
20060531	Applying a bugfix for the MIPS dyntrans sc[d] instruction from
		Ondrej Palkovsky. (Many thanks.)
20060601	Minifix to allow ARM immediate msr instruction to not give
		an error for some valid values.
		More Alpha updates.
20060602	Some minor Alpha updates.
20060603	Adding the Alpha cmpbge instruction. NetBSD/alpha prints its
		first boot messages :-) on an emulated Alphabook 1.
20060612	Minor updates; adding a dev_ether.h include file for the
		testmachine ether device. Continuing the hunt for the dyntrans
		bug which makes Linux and Ultrix on DECstation behave
		strangely... FINALLY found it! It seems to be related to
		invalidation of the translation cache, on tlbw{r,i}. There
		also seems to be some remaining interrupt-related problems.
20060614	Correcting the implementation of ldc1/sdc1 for MIPS dyntrans
		(so that it uses 16 32-bit registers if the FR bit in the
		status register is not set).
20060616	REMOVING BINTRANS COMPLETELY!
		Removing the old MIPS interpretation mode.
		Removing the MFHILO_DELAY and instruction delay stuff, because
		they wouldn't work with dyntrans anyway.
20060617	Some documentation updates (adding "NetBSD-archive" to some
		URLs, and new Debian/DECstation installation screenshots).
		Removing the "tracenull" and "enable-caches" configure options.
		Improving MIPS dyntrans performance somewhat (only invalidate
		translations if necessary, on writes to the entryhi register,
		instead of doing it for all cop0 writes).
20060618	More cleanup after the removal of the old MIPS emulation.
		Trying to fix the MIPS dyntrans performance bugs/bottlenecks;
		only semi-successful so far (for R3000).
20060620	Minor update to allow clean compilation again on Tru64/Alpha.
20060622	MIPS cleanup and fixes (removing the pc_last stuff, which
		doesn't make sense with dyntrans anyway, and fixing a cross-
		page-delay-slot-with-exception case in end_of_page).
		Removing the old max_random_cycles_per_chunk stuff, and the
		concept of cycles vs instructions for MIPS emulation.
		FINALLY found and fixed the bug which caused NetBSD/pmax
		clocks to behave strangely (it was a load to the zero register,
		which was treated as a NOP; now it is treated as a load to a
		dummy scratch register).
20060623	Increasing the dyntrans chunk size back to
		N_SAFE_DYNTRANS_LIMIT, instead of N_SAFE_DYNTRANS_LIMIT/2.
		Preparing for a quick release, even though there are known
		bugs, and performance for non-R3000 MIPS emulation is very
		poor. :-/
		Reverting to half the dyntrans chunk size again, because
		NetBSD/cats seemed less stable with full size chunks. :(
		NetBSD/sgimips 3.0 can now run :-)  (With release 0.3.8, only
		NetBSD/sgimips 2.1 worked, not 3.0.)

==============  RELEASE 0.4.0  ==============


1 dpavlin 2 /*
2 dpavlin 22 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 dpavlin 2 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 24 * $Id: memory.c,v 1.190 2006/06/16 18:31:25 debug Exp $
29 dpavlin 2 *
30     * Functions for handling the memory of an emulated machine.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36     #include <sys/types.h>
37     #include <sys/mman.h>
38    
39     #include "cpu.h"
40     #include "machine.h"
41     #include "memory.h"
42     #include "misc.h"
43    
44    
45 dpavlin 22 extern int verbose;
46 dpavlin 2
47    
48     /*
49     * memory_readmax64():
50     *
51     * Read at most 64 bits of data from a buffer. Length is given by
52     * len, and the byte order by cpu->byte_order.
53     *
54     * This function should not be called with cpu == NULL.
55     */
56     uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
57     {
58 dpavlin 20 int i, byte_order = cpu->byte_order;
59 dpavlin 2 uint64_t x = 0;
60    
61 dpavlin 20 if (len & MEM_PCI_LITTLE_ENDIAN) {
62     len &= ~MEM_PCI_LITTLE_ENDIAN;
63     byte_order = EMUL_LITTLE_ENDIAN;
64     }
65    
66 dpavlin 2 /* Switch byte order for incoming data, if necessary: */
67 dpavlin 20 if (byte_order == EMUL_BIG_ENDIAN)
68 dpavlin 2 for (i=0; i<len; i++) {
69     x <<= 8;
70     x |= buf[i];
71     }
72     else
73     for (i=len-1; i>=0; i--) {
74     x <<= 8;
75     x |= buf[i];
76     }
77    
78     return x;
79     }
80    
81    
82     /*
83     * memory_writemax64():
84     *
85     * Write at most 64 bits of data to a buffer. Length is given by
86     * len, and the byte order by cpu->byte_order.
87     *
88     * This function should not be called with cpu == NULL.
89     */
90     void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
91     uint64_t data)
92     {
93 dpavlin 20 int i, byte_order = cpu->byte_order;
94 dpavlin 2
95 dpavlin 20 if (len & MEM_PCI_LITTLE_ENDIAN) {
96     len &= ~MEM_PCI_LITTLE_ENDIAN;
97     byte_order = EMUL_LITTLE_ENDIAN;
98     }
99    
100     if (byte_order == EMUL_LITTLE_ENDIAN)
101 dpavlin 2 for (i=0; i<len; i++) {
102     buf[i] = data & 255;
103     data >>= 8;
104     }
105     else
106     for (i=0; i<len; i++) {
107     buf[len - 1 - i] = data & 255;
108     data >>= 8;
109     }
110     }
111    
112    
113     /*
114     * zeroed_alloc():
115     *
116     * Allocates a block of memory using mmap(), and if that fails, try
117 dpavlin 12 * malloc() + memset(). The returned memory block contains only zeroes.
118 dpavlin 2 */
119     void *zeroed_alloc(size_t s)
120     {
121     void *p = mmap(NULL, s, PROT_READ | PROT_WRITE,
122     MAP_ANON | MAP_PRIVATE, -1, 0);
123     if (p == NULL) {
124     p = malloc(s);
125     if (p == NULL) {
126     fprintf(stderr, "out of memory\n");
127     exit(1);
128     }
129     memset(p, 0, s);
130     }
131     return p;
132     }
133    
134    
135     /*
136     * memory_new():
137     *
138     * This function creates a new memory object. An emulated machine needs one
139     * of these.
140     */
141 dpavlin 12 struct memory *memory_new(uint64_t physical_max, int arch)
142 dpavlin 2 {
143     struct memory *mem;
144     int bits_per_pagetable = BITS_PER_PAGETABLE;
145     int bits_per_memblock = BITS_PER_MEMBLOCK;
146     int entries_per_pagetable = 1 << BITS_PER_PAGETABLE;
147     int max_bits = MAX_BITS;
148     size_t s;
149    
150     mem = malloc(sizeof(struct memory));
151     if (mem == NULL) {
152     fprintf(stderr, "out of memory\n");
153     exit(1);
154     }
155    
156     memset(mem, 0, sizeof(struct memory));
157    
158     /* Check bits_per_pagetable and bits_per_memblock for sanity: */
159     if (bits_per_pagetable + bits_per_memblock != max_bits) {
160     fprintf(stderr, "memory_new(): bits_per_pagetable and "
161     "bits_per_memblock mismatch\n");
162     exit(1);
163     }
164    
165     mem->physical_max = physical_max;
166 dpavlin 12 mem->dev_dyntrans_alignment = 4095;
167     if (arch == ARCH_ALPHA)
168     mem->dev_dyntrans_alignment = 8191;
169 dpavlin 2
170     s = entries_per_pagetable * sizeof(void *);
171    
172     mem->pagetable = (unsigned char *) mmap(NULL, s,
173     PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
174     if (mem->pagetable == NULL) {
175     mem->pagetable = malloc(s);
176     if (mem->pagetable == NULL) {
177     fprintf(stderr, "out of memory\n");
178     exit(1);
179     }
180     memset(mem->pagetable, 0, s);
181     }
182    
183     mem->mmap_dev_minaddr = 0xffffffffffffffffULL;
184     mem->mmap_dev_maxaddr = 0;
185    
186     return mem;
187     }
188    
189    
190     /*
191     * memory_points_to_string():
192     *
193 dpavlin 22 * Returns 1 if there's something string-like in emulated memory at address
194     * addr, otherwise 0.
195 dpavlin 2 */
196     int memory_points_to_string(struct cpu *cpu, struct memory *mem, uint64_t addr,
197     int min_string_length)
198     {
199     int cur_length = 0;
200     unsigned char c;
201    
202     for (;;) {
203     c = '\0';
204     cpu->memory_rw(cpu, mem, addr+cur_length,
205     &c, sizeof(c), MEM_READ, CACHE_NONE | NO_EXCEPTIONS);
206     if (c=='\n' || c=='\t' || c=='\r' || (c>=' ' && c<127)) {
207     cur_length ++;
208     if (cur_length >= min_string_length)
209     return 1;
210     } else {
211     if (cur_length >= min_string_length)
212     return 1;
213     else
214     return 0;
215     }
216     }
217     }
218    
219    
220     /*
221     * memory_conv_to_string():
222     *
223 dpavlin 22 * Convert emulated memory contents to a string, placing it in a buffer
224     * provided by the caller.
225 dpavlin 2 */
226     char *memory_conv_to_string(struct cpu *cpu, struct memory *mem, uint64_t addr,
227     char *buf, int bufsize)
228     {
229     int len = 0;
230     int output_index = 0;
231     unsigned char c, p='\0';
232    
233     while (output_index < bufsize-1) {
234     c = '\0';
235     cpu->memory_rw(cpu, mem, addr+len, &c, sizeof(c), MEM_READ,
236     CACHE_NONE | NO_EXCEPTIONS);
237     buf[output_index] = c;
238     if (c>=' ' && c<127) {
239     len ++;
240     output_index ++;
241     } else if (c=='\n' || c=='\r' || c=='\t') {
242     len ++;
243     buf[output_index] = '\\';
244     output_index ++;
245     switch (c) {
246     case '\n': p = 'n'; break;
247     case '\r': p = 'r'; break;
248     case '\t': p = 't'; break;
249     }
250     if (output_index < bufsize-1) {
251     buf[output_index] = p;
252     output_index ++;
253     }
254     } else {
255     buf[output_index] = '\0';
256     return buf;
257     }
258     }
259    
260     buf[bufsize-1] = '\0';
261     return buf;
262     }
263    
264    
265     /*
266 dpavlin 12 * memory_device_dyntrans_access():
267 dpavlin 2 *
268 dpavlin 22 * Get the lowest and highest dyntrans access since last time.
269 dpavlin 2 */
270 dpavlin 12 void memory_device_dyntrans_access(struct cpu *cpu, struct memory *mem,
271 dpavlin 2 void *extra, uint64_t *low, uint64_t *high)
272     {
273     size_t s;
274 dpavlin 24 int i, need_inval = 0;
275 dpavlin 2
276     /* TODO: This is O(n), so it might be good to rewrite it some day.
277     For now, it will be enough, as long as this function is not
278     called too often. */
279    
280     for (i=0; i<mem->n_mmapped_devices; i++) {
281     if (mem->dev_extra[i] == extra &&
282 dpavlin 22 mem->dev_flags[i] & DM_DYNTRANS_WRITE_OK &&
283 dpavlin 12 mem->dev_dyntrans_data[i] != NULL) {
284     if (mem->dev_dyntrans_write_low[i] != (uint64_t) -1)
285 dpavlin 2 need_inval = 1;
286     if (low != NULL)
287 dpavlin 12 *low = mem->dev_dyntrans_write_low[i];
288     mem->dev_dyntrans_write_low[i] = (uint64_t) -1;
289 dpavlin 2
290     if (high != NULL)
291 dpavlin 12 *high = mem->dev_dyntrans_write_high[i];
292     mem->dev_dyntrans_write_high[i] = 0;
293 dpavlin 2
294     if (!need_inval)
295     return;
296    
297     /* Invalidate any pages of this device that might
298 dpavlin 12 be in the dyntrans load/store cache, by marking
299 dpavlin 2 the pages read-only. */
300 dpavlin 18 if (cpu->invalidate_translation_caches != NULL) {
301 dpavlin 12 for (s=0; s<mem->dev_length[i];
302     s+=cpu->machine->arch_pagesize)
303 dpavlin 18 cpu->invalidate_translation_caches
304 dpavlin 14 (cpu, mem->dev_baseaddr[i] + s,
305 dpavlin 18 JUST_MARK_AS_NON_WRITABLE
306     | INVALIDATE_PADDR);
307 dpavlin 2 }
308    
309     return;
310     }
311     }
312     }
313    
314    
315     /*
316     * memory_device_register():
317     *
318     * Register a (memory mapped) device by adding it to the dev_* fields of a
319     * memory struct.
320     */
321     void memory_device_register(struct memory *mem, const char *device_name,
322     uint64_t baseaddr, uint64_t len,
323     int (*f)(struct cpu *,struct memory *,uint64_t,unsigned char *,
324     size_t,int,void *),
325 dpavlin 12 void *extra, int flags, unsigned char *dyntrans_data)
326 dpavlin 2 {
327 dpavlin 22 int i, newi = 0;
328 dpavlin 2
329     if (mem->n_mmapped_devices >= MAX_DEVICES) {
330     fprintf(stderr, "memory_device_register(): too many "
331     "devices registered, cannot register '%s'\n", device_name);
332     exit(1);
333     }
334    
335 dpavlin 22 /*
336     * Figure out at which index to insert this device, and simultaneously
337     * check for collisions:
338     */
339     newi = -1;
340 dpavlin 2 for (i=0; i<mem->n_mmapped_devices; i++) {
341 dpavlin 22 if (i == 0 && baseaddr + len <= mem->dev_baseaddr[i])
342     newi = i;
343     if (i > 0 && baseaddr + len <= mem->dev_baseaddr[i] &&
344     baseaddr >= mem->dev_endaddr[i-1])
345     newi = i;
346     if (i == mem->n_mmapped_devices - 1 &&
347     baseaddr >= mem->dev_endaddr[i])
348     newi = i + 1;
349    
350 dpavlin 2 /* If we are not colliding with device i, then continue: */
351     if (baseaddr + len <= mem->dev_baseaddr[i])
352     continue;
353 dpavlin 22 if (baseaddr >= mem->dev_endaddr[i])
354 dpavlin 2 continue;
355    
356 dpavlin 22 fatal("\nERROR! \"%s\" collides with device %i (\"%s\")!\n",
357 dpavlin 2 device_name, i, mem->dev_name[i]);
358 dpavlin 22 exit(1);
359 dpavlin 2 }
360 dpavlin 22 if (mem->n_mmapped_devices == 0)
361     newi = 0;
362     if (newi == -1) {
363     fatal("INTERNAL ERROR\n");
364     exit(1);
365     }
366 dpavlin 2
367 dpavlin 22 if (verbose >= 2) {
368     /* (40 bits of physical address is displayed) */
369 dpavlin 24 debug("device at 0x%010"PRIx64": %s", (uint64_t) baseaddr,
370 dpavlin 22 device_name);
371 dpavlin 2
372 dpavlin 22 if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
373     && (baseaddr & mem->dev_dyntrans_alignment) != 0) {
374     fatal("\nWARNING: Device dyntrans access, but unaligned"
375 dpavlin 24 " baseaddr 0x%"PRIx64".\n", (uint64_t) baseaddr);
376 dpavlin 22 }
377    
378     if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
379     debug(" (dyntrans %s)",
380     (flags & DM_DYNTRANS_WRITE_OK)? "R/W" : "R");
381     }
382     debug("\n");
383 dpavlin 2 }
384    
385 dpavlin 22 for (i=0; i<mem->n_mmapped_devices; i++) {
386     if (dyntrans_data == mem->dev_dyntrans_data[i] &&
387     mem->dev_flags[i] & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
388     && flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)) {
389     fatal("ERROR: the data pointer used for dyntrans "
390     "accesses must only be used once!\n");
391     fatal("(%p cannot be used by '%s'; already in use by '"
392     "%s')\n", dyntrans_data, device_name,
393     mem->dev_name[i]);
394     exit(1);
395     }
396 dpavlin 2 }
397    
398 dpavlin 22 mem->n_mmapped_devices++;
399 dpavlin 2
400 dpavlin 22 /*
401     * YUCK! This is ugly. TODO: fix
402     */
403     /* Make space for the new entry: */
404     memmove(&mem->dev_name[newi+1], &mem->dev_name[newi], sizeof(char *) *
405     (MAX_DEVICES - newi - 1));
406     memmove(&mem->dev_baseaddr[newi+1], &mem->dev_baseaddr[newi],
407     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
408     memmove(&mem->dev_endaddr[newi+1], &mem->dev_endaddr[newi],
409     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
410     memmove(&mem->dev_length[newi+1], &mem->dev_length[newi],
411     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
412     memmove(&mem->dev_flags[newi+1], &mem->dev_flags[newi], sizeof(int) *
413     (MAX_DEVICES - newi - 1));
414     memmove(&mem->dev_extra[newi+1], &mem->dev_extra[newi], sizeof(void *) *
415     (MAX_DEVICES - newi - 1));
416     memmove(&mem->dev_f[newi+1], &mem->dev_f[newi], sizeof(void *) *
417     (MAX_DEVICES - newi - 1));
418     memmove(&mem->dev_dyntrans_data[newi+1], &mem->dev_dyntrans_data[newi],
419     sizeof(void *) * (MAX_DEVICES - newi - 1));
420     memmove(&mem->dev_dyntrans_write_low[newi+1],
421     &mem->dev_dyntrans_write_low[newi],
422     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
423     memmove(&mem->dev_dyntrans_write_high[newi+1],
424     &mem->dev_dyntrans_write_high[newi],
425     sizeof(uint64_t) * (MAX_DEVICES - newi - 1));
426    
427    
428     mem->dev_name[newi] = strdup(device_name);
429     mem->dev_baseaddr[newi] = baseaddr;
430     mem->dev_endaddr[newi] = baseaddr + len;
431     mem->dev_length[newi] = len;
432     mem->dev_flags[newi] = flags;
433     mem->dev_dyntrans_data[newi] = dyntrans_data;
434    
435     if (mem->dev_name[newi] == NULL) {
436 dpavlin 2 fprintf(stderr, "out of memory\n");
437     exit(1);
438     }
439    
440 dpavlin 20 if (flags & (DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK)
441     && !(flags & DM_EMULATED_RAM) && dyntrans_data == NULL) {
442 dpavlin 12 fatal("\nERROR: Device dyntrans access, but dyntrans_data"
443     " = NULL!\n");
444     exit(1);
445     }
446    
447 dpavlin 18 if ((size_t)dyntrans_data & (sizeof(void *) - 1)) {
448 dpavlin 2 fprintf(stderr, "memory_device_register():"
449 dpavlin 12 " dyntrans_data not aligned correctly (%p)\n",
450     dyntrans_data);
451 dpavlin 2 exit(1);
452     }
453    
454 dpavlin 22 mem->dev_dyntrans_write_low[newi] = (uint64_t)-1;
455     mem->dev_dyntrans_write_high[newi] = 0;
456     mem->dev_f[newi] = f;
457     mem->dev_extra[newi] = extra;
458 dpavlin 2
459     if (baseaddr < mem->mmap_dev_minaddr)
460 dpavlin 12 mem->mmap_dev_minaddr = baseaddr & ~mem->dev_dyntrans_alignment;
461 dpavlin 2 if (baseaddr + len > mem->mmap_dev_maxaddr)
462 dpavlin 12 mem->mmap_dev_maxaddr = (((baseaddr + len) - 1) |
463     mem->dev_dyntrans_alignment) + 1;
464 dpavlin 2 }
465    
466    
467     /*
468     * memory_device_remove():
469     *
470     * Unregister a (memory mapped) device from a memory struct.
471     */
472     void memory_device_remove(struct memory *mem, int i)
473     {
474     if (i < 0 || i >= mem->n_mmapped_devices) {
475     fatal("memory_device_remove(): invalid device number %i\n", i);
476     return;
477     }
478    
479     mem->n_mmapped_devices --;
480    
481     if (i == mem->n_mmapped_devices)
482     return;
483    
484     /*
485     * YUCK! This is ugly. TODO: fix
486     */
487    
488     memmove(&mem->dev_name[i], &mem->dev_name[i+1], sizeof(char *) *
489     (MAX_DEVICES - i - 1));
490     memmove(&mem->dev_baseaddr[i], &mem->dev_baseaddr[i+1],
491     sizeof(uint64_t) * (MAX_DEVICES - i - 1));
492 dpavlin 22 memmove(&mem->dev_endaddr[i], &mem->dev_endaddr[i+1],
493     sizeof(uint64_t) * (MAX_DEVICES - i - 1));
494 dpavlin 2 memmove(&mem->dev_length[i], &mem->dev_length[i+1], sizeof(uint64_t) *
495     (MAX_DEVICES - i - 1));
496     memmove(&mem->dev_flags[i], &mem->dev_flags[i+1], sizeof(int) *
497     (MAX_DEVICES - i - 1));
498     memmove(&mem->dev_extra[i], &mem->dev_extra[i+1], sizeof(void *) *
499     (MAX_DEVICES - i - 1));
500     memmove(&mem->dev_f[i], &mem->dev_f[i+1], sizeof(void *) *
501     (MAX_DEVICES - i - 1));
502 dpavlin 12 memmove(&mem->dev_dyntrans_data[i], &mem->dev_dyntrans_data[i+1],
503 dpavlin 2 sizeof(void *) * (MAX_DEVICES - i - 1));
504 dpavlin 12 memmove(&mem->dev_dyntrans_write_low[i], &mem->dev_dyntrans_write_low
505 dpavlin 22 [i+1], sizeof(uint64_t) * (MAX_DEVICES - i - 1));
506 dpavlin 12 memmove(&mem->dev_dyntrans_write_high[i], &mem->dev_dyntrans_write_high
507 dpavlin 22 [i+1], sizeof(uint64_t) * (MAX_DEVICES - i - 1));
508 dpavlin 2 }
509    
510    
511     #define MEMORY_RW userland_memory_rw
512     #define MEM_USERLAND
513     #include "memory_rw.c"
514     #undef MEM_USERLAND
515     #undef MEMORY_RW
516    
517    
518     /*
519     * memory_paddr_to_hostaddr():
520     *
521     * Translate a physical address into a host address.
522     *
523     * Return value is a pointer to a host memblock, or NULL on failure.
524     * On reads, a NULL return value should be interpreted as reading all zeroes.
525     */
526     unsigned char *memory_paddr_to_hostaddr(struct memory *mem,
527     uint64_t paddr, int writeflag)
528     {
529     void **table;
530     int entry;
531     const int mask = (1 << BITS_PER_PAGETABLE) - 1;
532     const int shrcount = MAX_BITS - BITS_PER_PAGETABLE;
533    
534     table = mem->pagetable;
535     entry = (paddr >> shrcount) & mask;
536    
537 dpavlin 24 /* printf("memory_paddr_to_hostaddr(): p=%16"PRIx64
538     " w=%i => entry=0x%x\n", (uint64_t) paddr, writeflag, entry); */
539 dpavlin 2
540     if (table[entry] == NULL) {
541     size_t alloclen;
542    
543     /*
544     * Special case: reading from a nonexistant memblock
545     * returns all zeroes, and doesn't allocate anything.
546     * (If any intermediate pagetable is nonexistant, then
547     * the same thing happens):
548     */
549     if (writeflag == MEM_READ)
550     return NULL;
551    
552     /* Allocate a memblock: */
553     alloclen = 1 << BITS_PER_MEMBLOCK;
554    
555     /* printf(" allocating for entry %i, len=%i\n",
556     entry, alloclen); */
557    
558     /* Anonymous mmap() should return zero-filled memory,
559     try malloc + memset if mmap failed. */
560     table[entry] = (void *) mmap(NULL, alloclen,
561 dpavlin 22 PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
562 dpavlin 2 if (table[entry] == NULL) {
563     table[entry] = malloc(alloclen);
564     if (table[entry] == NULL) {
565     fatal("out of memory\n");
566     exit(1);
567     }
568     memset(table[entry], 0, alloclen);
569     }
570     }
571    
572     return (unsigned char *) table[entry];
573     }
574    
575 dpavlin 24
576     #define UPDATE_CHECKSUM(value) { \
577     internal_state -= 0x118c7771c0c0a77fULL; \
578     internal_state = ((internal_state + (value)) << 7) ^ \
579     (checksum >> 11) ^ ((checksum - (value)) << 3) ^ \
580     (internal_state - checksum) ^ ((value) - internal_state); \
581     checksum ^= internal_state; \
582     }
583    
584    
585     /*
586     * memory_checksum():
587     *
588     * Calculate a 64-bit checksum of everything in a struct memory. This is
589     * useful for tracking down bugs; an old (presumably working) version of
590     * the emulator can be compared to a newer (buggy) version.
591     */
592     uint64_t memory_checksum(struct memory *mem)
593     {
594     uint64_t internal_state = 0x80624185376feff2ULL;
595     uint64_t checksum = 0xcb9a87d5c010072cULL;
596     const int n_entries = (1 << BITS_PER_PAGETABLE) - 1;
597     const size_t len = (1 << BITS_PER_MEMBLOCK) / sizeof(uint64_t);
598     size_t entry, i;
599    
600     for (entry=0; entry<=n_entries; entry++) {
601     uint64_t **table = mem->pagetable;
602     uint64_t *memblock = table[entry];
603    
604     if (memblock == NULL) {
605     UPDATE_CHECKSUM(0x1198ab7c8174a76fULL);
606     continue;
607     }
608    
609     for (i=0; i<len; i++)
610     UPDATE_CHECKSUM(memblock[i]);
611     }
612    
613     return checksum;
614     }
615    

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