/[gxemul]/trunk/src/machines/machine_test.c
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Contents of /trunk/src/machines/machine_test.c

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Revision 40 - (show annotations)
Mon Oct 8 16:22:11 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 10111 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1539 2007/05/01 04:03:51 debug Exp $
20070415	Landisk PCLOCK should be 33.33 MHz, not 50 MHz. (This makes
		the clock run at correct speed.)
		FINALLY found and fixed the bug which caused OpenBSD/landisk
		to randomly bug out: an &-sign was missing in the special case
		handling of FPSCR in the 'LDS.L @Rm+,FPSCR' instruction.
		Adding similar special case handling for 'LDC.L @Rm+,SR'
		(calling sh_update_sr() instead of just loading).
		Implementing the 'FCNVSD FPUL,DRn' and 'FCNVDS DRm,FPUL'
		SuperH instructions.
		The 'LDC Rm,SR' instruction now immediately breaks out of the
		dyntrans loop if an interrupt is to be triggered.
20070416	In memory_rw.c, if mapping a page as writable, make sure to
		invalidate code translations even if the data access was a
		read.
		Minor SuperH updates.
20070418	Removing the dummy M68K emulation mode.
		Minor SH update (turning unnecessary sts_mach_rn, sts_macl_rn,
		and sts_pr_rn instruction handlers into mov_rm_rn).
20070419	Beginning to add a skeleton for an M88K mode: Adding a hack to
		allow OpenBSD/m88k a.out binaries to be loaded, and disassembly
		of a few simple 88K instructions.
		Commenting out the 'LDC Rm,SR' fix from a few days ago, because
		it made Linux/dreamcast bug out.
		Adding a hack to dev_sh4.c (an extra translation cache
		invalidation), which allows OpenBSD/landisk to boot ok after
		an install. Upgrading the Landisk machine mode to stable,
		updating documentation, etc.
20070420	Experimenting with adding a PCI controller (pcic) to dev_sh4.
		Adding a dummy Realtek 8139C+ skeleton device (dev_rtl8139c).
		Implementing the first M88K instructions (br, or[.u] imm), and
		adding disassembly of some more instructions.
20070421	Continuing a little on dev_rtl8139c.
20070422	Implementing the 9346 EEPROM "read" command for dev_rtl8139c.
		Finally found and fixed an old bug in the log n symbol search
		(it sometimes missed symbols). Debug trace (-i, -t etc) should
		now show more symbols. :-)
20070423	Continuing a little on M88K disassembly.
20070428	Fixing a memset arg order bug in src/net/net.c (thanks to
		Nigel Horne for noticing the bug).
		Applying parts of a patch from Carl van Schaik to clear out
		bottom bits of MIPS addresses more correctly, when using large
		page sizes, and doing some other minor cleanup/refactoring.
		Fixing a couple of warnings given by gcc with the -W option (a
		few more warnings than just plain -Wall).
		Reducing SuperH dyntrans physical address space from 64-bit to
		32-bit (since SH5/SH64 isn't imlemented yet anyway).
		Adding address-to-symbol annotation to a few more instructions
		in the SuperH instruction trace output.
		Beginning regression testing for the next release.
		Reverting the value of SCIF_DELAYED_TX_VALUE from 1 to 2,
		because OpenBSD/landisk may otherwise hang randomly.
20070429	The ugly hack/workaround to get OpenBSD/landisk booting without
		crashing does NOT work anymore (with the April 21 snapshot
		of OpenBSD/landisk). Strangely enough, removing the hack
		completely causes OpenBSD/landisk to work (!).
		More regression testing (re-testing everything SuperH-related,
		and some other things).
		Cobalt interrupts were actually broken; fixing by commenting
		out the DEC21143s in the Cobalt machine.
20070430	More regression testing.
20070501	Updating the OpenBSD/landisk install instructions to use
		4.1 instead of the current snapshot.
		GAAAH! OpenBSD/landisk 4.1 _needs_ the ugly hack/workaround;
		reintroducing it again. (The 4.1 kernel is actually from
		2007-03-11.)
		Simplifying the NetBSD/evbarm install instructions a bit.
		More regression testing.

==============  RELEASE 0.4.5.1  ==============
1 /*
2 * Copyright (C) 2005-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: machine_test.c,v 1.33 2007/04/19 15:18:16 debug Exp $
29 *
30 * Various "test" machines (bare machines with just a CPU, or a bare machine
31 * plus some experimental devices).
32 */
33
34 #include <stdio.h>
35 #include <string.h>
36
37 #include "cpu.h"
38 #include "device.h"
39 #include "machine.h"
40 #include "memory.h"
41 #include "misc.h"
42
43 #include "testmachine/dev_cons.h"
44 #include "testmachine/dev_disk.h"
45 #include "testmachine/dev_ether.h"
46 #include "testmachine/dev_fb.h"
47 #include "testmachine/dev_mp.h"
48 #include "testmachine/dev_rtc.h"
49
50
51 static void default_test(struct machine *machine, struct cpu *cpu)
52 {
53 char tmpstr[1000];
54
55 snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=none",
56 (uint64_t) DEV_CONS_ADDRESS);
57 machine->main_console_handle = (size_t)device_add(machine, tmpstr);
58
59 snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,
60 (uint64_t) DEV_MP_ADDRESS);
61 device_add(machine, tmpstr);
62
63 snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64,
64 (uint64_t) DEV_FBCTRL_ADDRESS);
65 device_add(machine, tmpstr);
66
67 snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64,
68 (uint64_t) DEV_DISK_ADDRESS);
69 device_add(machine, tmpstr);
70
71 snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=none",
72 (uint64_t) DEV_ETHER_ADDRESS);
73 device_add(machine, tmpstr);
74
75 snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=none",
76 (uint64_t) DEV_RTC_ADDRESS);
77 device_add(machine, tmpstr);
78 }
79
80
81 MACHINE_SETUP(barealpha)
82 {
83 machine->machine_name = "Generic \"bare\" Alpha machine";
84 machine->stable = 1;
85 }
86
87
88 MACHINE_SETUP(testalpha)
89 {
90 machine->machine_name = "Alpha test machine";
91 machine->stable = 1;
92
93 /* TODO: interrupt for Alpha? */
94
95 default_test(machine, cpu);
96 }
97
98
99 MACHINE_DEFAULT_CPU(barealpha)
100 {
101 machine->cpu_name = strdup("21264");
102 }
103
104
105 MACHINE_DEFAULT_CPU(testalpha)
106 {
107 machine->cpu_name = strdup("21264");
108 }
109
110
111 MACHINE_REGISTER(barealpha)
112 {
113 MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine",
114 ARCH_ALPHA, MACHINE_BAREALPHA);
115
116 machine_entry_add_alias(me, "barealpha");
117 }
118
119
120 MACHINE_REGISTER(testalpha)
121 {
122 MR_DEFAULT(testalpha, "Test-machine for Alpha",
123 ARCH_ALPHA, MACHINE_TESTALPHA);
124
125 machine_entry_add_alias(me, "testalpha");
126 }
127
128
129 MACHINE_SETUP(barearm)
130 {
131 machine->machine_name = "Generic \"bare\" ARM machine";
132 machine->stable = 1;
133 }
134
135
136 MACHINE_SETUP(testarm)
137 {
138 machine->machine_name = "ARM test machine";
139 machine->stable = 1;
140
141 /* TODO: interrupt for ARM? */
142
143 default_test(machine, cpu);
144
145 /*
146 * Place a tiny stub at end of memory, and set the link register to
147 * point to it. This stub halts the machine (making it easy to try
148 * out simple stand-alone C functions).
149 */
150 cpu->cd.arm.r[ARM_SP] = machine->physical_ram_in_mb * 1048576 - 4096;
151 cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32;
152 store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201);
153 store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010);
154 store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, 0xeafffffe);
155 }
156
157
158 MACHINE_DEFAULT_CPU(barearm)
159 {
160 machine->cpu_name = strdup("SA1110");
161 }
162
163
164 MACHINE_DEFAULT_CPU(testarm)
165 {
166 machine->cpu_name = strdup("SA1110");
167 }
168
169
170 MACHINE_REGISTER(barearm)
171 {
172 MR_DEFAULT(barearm, "Generic \"bare\" ARM machine",
173 ARCH_ARM, MACHINE_BAREARM);
174
175 machine_entry_add_alias(me, "barearm");
176 }
177
178
179 MACHINE_REGISTER(testarm)
180 {
181 MR_DEFAULT(testarm, "Test-machine for ARM", ARCH_ARM, MACHINE_TESTARM);
182
183 machine_entry_add_alias(me, "testarm");
184 }
185
186
187
188 MACHINE_SETUP(barem88k)
189 {
190 machine->machine_name = "Generic \"bare\" M88K machine";
191 machine->stable = 1;
192 }
193
194
195 MACHINE_SETUP(testm88k)
196 {
197 machine->machine_name = "M88K test machine";
198 machine->stable = 1;
199
200 /* TODO: interrupt for M88K? */
201
202 default_test(machine, cpu);
203 }
204
205
206 MACHINE_DEFAULT_CPU(barem88k)
207 {
208 machine->cpu_name = strdup("88110");
209 }
210
211
212 MACHINE_DEFAULT_CPU(testm88k)
213 {
214 machine->cpu_name = strdup("88110");
215 }
216
217
218 MACHINE_REGISTER(barem88k)
219 {
220 MR_DEFAULT(barem88k, "Generic \"bare\" M88K machine",
221 ARCH_M88K, MACHINE_BAREM88K);
222
223 machine_entry_add_alias(me, "barem88k");
224 }
225
226
227 MACHINE_REGISTER(testm88k)
228 {
229 MR_DEFAULT(testm88k, "Test-machine for M88K",
230 ARCH_M88K, MACHINE_TESTM88K);
231
232 machine_entry_add_alias(me, "testm88k");
233 }
234
235
236 MACHINE_SETUP(baremips)
237 {
238 machine->machine_name = "Generic \"bare\" MIPS machine";
239 machine->stable = 1;
240 cpu->byte_order = EMUL_BIG_ENDIAN;
241 }
242
243
244 MACHINE_SETUP(testmips)
245 {
246 /*
247 * A MIPS test machine. Originally, this was created as a way for
248 * me to test my master's thesis code; since then it has both
249 * evolved to support new things, and suffered bit rot so that it
250 * no longer can run my thesis code. Well, well...
251 *
252 * IRQ map:
253 * 7 CPU counter
254 * 6 SMP IPIs
255 * 5 not used yet
256 * 4 rtc
257 * 3 ethernet
258 * 2 serial console
259 */
260
261 char tmpstr[300];
262
263 machine->machine_name = "MIPS test machine";
264 machine->stable = 1;
265 cpu->byte_order = EMUL_BIG_ENDIAN;
266
267 snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=%s."
268 "cpu[%i].2", (uint64_t) DEV_CONS_ADDRESS, machine->path,
269 machine->bootstrap_cpu);
270 machine->main_console_handle = (size_t)device_add(machine, tmpstr);
271
272 snprintf(tmpstr, sizeof(tmpstr), "mp irq=6 addr=0x%"PRIx64,
273 (uint64_t) DEV_MP_ADDRESS);
274 device_add(machine, tmpstr);
275
276 snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64,
277 (uint64_t) DEV_FBCTRL_ADDRESS);
278 device_add(machine, tmpstr);
279
280 snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64,
281 (uint64_t) DEV_DISK_ADDRESS);
282 device_add(machine, tmpstr);
283
284 snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s."
285 "cpu[%i].3", (uint64_t) DEV_ETHER_ADDRESS, machine->path,
286 machine->bootstrap_cpu);
287 device_add(machine, tmpstr);
288
289 snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s."
290 "cpu[%i].4", (uint64_t) DEV_RTC_ADDRESS, machine->path,
291 machine->bootstrap_cpu);
292 device_add(machine, tmpstr);
293 }
294
295
296 MACHINE_DEFAULT_CPU(baremips)
297 {
298 machine->cpu_name = strdup("5KE");
299 }
300
301
302 MACHINE_DEFAULT_CPU(testmips)
303 {
304 machine->cpu_name = strdup("5KE");
305 }
306
307
308 MACHINE_REGISTER(baremips)
309 {
310 MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine",
311 ARCH_MIPS, MACHINE_BAREMIPS);
312
313 machine_entry_add_alias(me, "baremips");
314 }
315
316
317 MACHINE_REGISTER(testmips)
318 {
319 MR_DEFAULT(testmips, "Test-machine for MIPS",
320 ARCH_MIPS, MACHINE_TESTMIPS);
321
322 machine_entry_add_alias(me, "testmips");
323 }
324
325
326 MACHINE_SETUP(bareppc)
327 {
328 machine->machine_name = "Generic \"bare\" PPC machine";
329 machine->stable = 1;
330 }
331
332
333 MACHINE_SETUP(testppc)
334 {
335 machine->machine_name = "PPC test machine";
336 machine->stable = 1;
337
338 /* TODO: interrupt for PPC? */
339
340 default_test(machine, cpu);
341 }
342
343
344 MACHINE_DEFAULT_CPU(bareppc)
345 {
346 machine->cpu_name = strdup("PPC970");
347 }
348
349
350 MACHINE_DEFAULT_CPU(testppc)
351 {
352 machine->cpu_name = strdup("PPC970");
353 }
354
355
356 MACHINE_REGISTER(bareppc)
357 {
358 MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine",
359 ARCH_PPC, MACHINE_BAREPPC);
360
361 machine_entry_add_alias(me, "bareppc");
362 }
363
364
365 MACHINE_REGISTER(testppc)
366 {
367 MR_DEFAULT(testppc, "Test-machine for PPC", ARCH_PPC, MACHINE_TESTPPC);
368
369 machine_entry_add_alias(me, "testppc");
370 }
371
372
373 MACHINE_SETUP(baresh)
374 {
375 machine->machine_name = "Generic \"bare\" SH machine";
376 machine->stable = 1;
377 }
378
379
380 MACHINE_SETUP(testsh)
381 {
382 machine->machine_name = "SH test machine";
383 machine->stable = 1;
384
385 /* TODO: interrupt for SH? */
386
387 default_test(machine, cpu);
388 }
389
390
391 MACHINE_DEFAULT_CPU(baresh)
392 {
393 machine->cpu_name = strdup("SH7750");
394 }
395
396
397 MACHINE_DEFAULT_CPU(testsh)
398 {
399 machine->cpu_name = strdup("SH7750");
400 }
401
402
403 MACHINE_REGISTER(baresh)
404 {
405 MR_DEFAULT(baresh, "Generic \"bare\" SH machine",
406 ARCH_SH, MACHINE_BARESH);
407
408 machine_entry_add_alias(me, "baresh");
409 }
410
411
412 MACHINE_REGISTER(testsh)
413 {
414 MR_DEFAULT(testsh, "Test-machine for SH", ARCH_SH, MACHINE_TESTSH);
415
416 machine_entry_add_alias(me, "testsh");
417 }
418
419
420 MACHINE_SETUP(baresparc)
421 {
422 machine->machine_name = "Generic \"bare\" SPARC machine";
423 machine->stable = 1;
424 }
425
426
427 MACHINE_SETUP(testsparc)
428 {
429 machine->machine_name = "SPARC test machine";
430 machine->stable = 1;
431
432 /* TODO: interrupt for SPARC? */
433
434 default_test(machine, cpu);
435 }
436
437
438 MACHINE_DEFAULT_CPU(baresparc)
439 {
440 machine->cpu_name = strdup("UltraSPARC");
441 }
442
443
444 MACHINE_DEFAULT_CPU(testsparc)
445 {
446 machine->cpu_name = strdup("UltraSPARC");
447 }
448
449
450 MACHINE_REGISTER(baresparc)
451 {
452 MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine",
453 ARCH_SPARC, MACHINE_BARESPARC);
454
455 machine_entry_add_alias(me, "baresparc");
456 }
457
458
459 MACHINE_REGISTER(testsparc)
460 {
461 MR_DEFAULT(testsparc, "Test-machine for SPARC",
462 ARCH_SPARC, MACHINE_TESTSPARC);
463
464 machine_entry_add_alias(me, "testsparc");
465 }
466
467
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