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/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: machine_test.c,v 1.1 2006/01/01 20:41:25 debug Exp $ |
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* |
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* Various "test" machines (bare machines with just a CPU, or a bare machine |
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* plus some experimental devices). |
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*/ |
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|
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#include <stdio.h> |
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#include <string.h> |
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|
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#include "cpu.h" |
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#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "mp.h" |
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|
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|
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static void default_test(struct machine *machine, struct cpu *cpu) |
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{ |
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char tmpstr[1000]; |
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snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=0", |
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(long long)DEV_CONS_ADDRESS); |
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machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
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|
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snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
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(long long)DEV_MP_ADDRESS); |
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device_add(machine, tmpstr); |
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|
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dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC, |
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640,480, 640,480, 24, "testalpha generic"); |
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|
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snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
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(long long)DEV_DISK_ADDRESS); |
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device_add(machine, tmpstr); |
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|
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snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=0", |
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(long long)DEV_ETHER_ADDRESS); |
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device_add(machine, tmpstr); |
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} |
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|
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|
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MACHINE_SETUP(barealpha) |
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{ |
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machine->machine_name = "Generic \"bare\" Alpha machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_SETUP(testalpha) |
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{ |
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machine->machine_name = "Alpha test machine"; |
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machine->stable = 1; |
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|
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/* TODO: interrupt for Alpha? */ |
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|
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default_test(machine, cpu); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(barealpha) |
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{ |
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machine->cpu_name = strdup("Alpha"); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(testalpha) |
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{ |
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machine->cpu_name = strdup("Alpha"); |
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} |
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|
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|
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MACHINE_REGISTER(barealpha) |
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{ |
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MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine", |
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ARCH_ALPHA, MACHINE_BAREALPHA, 1, 0); |
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me->aliases[0] = "barealpha"; |
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machine_entry_add(me, ARCH_ALPHA); |
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} |
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|
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|
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MACHINE_REGISTER(testalpha) |
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{ |
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MR_DEFAULT(testalpha, "Test-machine for Alpha", |
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ARCH_ALPHA, MACHINE_TESTALPHA, 1, 0); |
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me->aliases[0] = "testalpha"; |
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machine_entry_add(me, ARCH_ALPHA); |
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} |
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|
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|
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MACHINE_SETUP(barearm) |
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{ |
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machine->machine_name = "Generic \"bare\" ARM machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_SETUP(testarm) |
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{ |
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machine->machine_name = "ARM test machine"; |
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machine->stable = 1; |
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|
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/* TODO: interrupt for ARM? */ |
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|
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default_test(machine, cpu); |
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|
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/* |
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* Place a tiny stub at end of memory, and set the link register to |
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* point to it. This stub halts the machine (making it easy to try |
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* out simple stand-alone C functions). |
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*/ |
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cpu->cd.arm.r[ARM_SP] = machine->physical_ram_in_mb * 1048576 - 4096; |
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cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32; |
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store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201); |
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store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010); |
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store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, 0xeafffffe); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(barearm) |
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{ |
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machine->cpu_name = strdup("SA1110"); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(testarm) |
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{ |
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machine->cpu_name = strdup("SA1110"); |
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} |
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|
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|
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MACHINE_REGISTER(barearm) |
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{ |
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MR_DEFAULT(barearm, "Generic \"bare\" ARM machine", |
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ARCH_ARM, MACHINE_BAREARM, 1, 0); |
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me->aliases[0] = "barearm"; |
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machine_entry_add(me, ARCH_ARM); |
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} |
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|
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|
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MACHINE_REGISTER(testarm) |
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{ |
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MR_DEFAULT(testarm, "Test-machine for ARM", |
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ARCH_ARM, MACHINE_TESTARM, 1, 0); |
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me->aliases[0] = "testarm"; |
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machine_entry_add(me, ARCH_ARM); |
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} |
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|
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|
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|
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MACHINE_SETUP(bareavr) |
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{ |
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machine->machine_name = "Generic \"bare\" AVR machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(bareavr) |
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{ |
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machine->cpu_name = strdup("AVR"); |
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} |
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|
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|
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MACHINE_REGISTER(bareavr) |
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{ |
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MR_DEFAULT(bareavr, "Generic \"bare\" AVR machine", |
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ARCH_AVR, MACHINE_BAREAVR, 1, 0); |
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me->aliases[0] = "bareavr"; |
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machine_entry_add(me, ARCH_AVR); |
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} |
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|
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|
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MACHINE_SETUP(barehppa) |
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{ |
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machine->machine_name = "Generic \"bare\" HPPA machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_SETUP(testhppa) |
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{ |
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machine->machine_name = "HPPA test machine"; |
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machine->stable = 1; |
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|
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/* TODO: interrupt for HPPA? */ |
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|
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default_test(machine, cpu); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(barehppa) |
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{ |
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machine->cpu_name = strdup("HPPA"); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(testhppa) |
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{ |
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machine->cpu_name = strdup("HPPA"); |
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} |
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|
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|
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MACHINE_REGISTER(barehppa) |
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{ |
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MR_DEFAULT(barehppa, "Generic \"bare\" HPPA machine", |
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ARCH_HPPA, MACHINE_BAREHPPA, 1, 0); |
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me->aliases[0] = "barehppa"; |
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machine_entry_add(me, ARCH_HPPA); |
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} |
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|
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|
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MACHINE_REGISTER(testhppa) |
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{ |
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MR_DEFAULT(testhppa, "Test-machine for HPPA", |
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ARCH_HPPA, MACHINE_TESTHPPA, 1, 0); |
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me->aliases[0] = "testhppa"; |
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machine_entry_add(me, ARCH_HPPA); |
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} |
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|
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|
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MACHINE_SETUP(barei960) |
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{ |
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machine->machine_name = "Generic \"bare\" i960 machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_SETUP(testi960) |
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{ |
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machine->machine_name = "i960 test machine"; |
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machine->stable = 1; |
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|
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/* TODO: interrupt for i960? */ |
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|
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default_test(machine, cpu); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(barei960) |
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{ |
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machine->cpu_name = strdup("i960"); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(testi960) |
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{ |
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machine->cpu_name = strdup("i960"); |
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} |
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|
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|
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MACHINE_REGISTER(barei960) |
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{ |
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MR_DEFAULT(barei960, "Generic \"bare\" i960 machine", |
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ARCH_I960, MACHINE_BAREI960, 1, 0); |
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me->aliases[0] = "barei960"; |
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machine_entry_add(me, ARCH_I960); |
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} |
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|
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|
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MACHINE_REGISTER(testi960) |
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{ |
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MR_DEFAULT(testi960, "Test-machine for i960", |
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ARCH_I960, MACHINE_TESTI960, 1, 0); |
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me->aliases[0] = "testi960"; |
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machine_entry_add(me, ARCH_I960); |
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} |
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|
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|
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MACHINE_SETUP(bareia64) |
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{ |
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machine->machine_name = "Generic \"bare\" IA64 machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_SETUP(testia64) |
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{ |
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machine->machine_name = "IA64 test machine"; |
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machine->stable = 1; |
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|
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/* TODO: interrupt for IA64? */ |
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|
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default_test(machine, cpu); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(bareia64) |
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{ |
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machine->cpu_name = strdup("IA64"); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(testia64) |
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{ |
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machine->cpu_name = strdup("IA64"); |
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} |
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|
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|
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MACHINE_REGISTER(bareia64) |
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{ |
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MR_DEFAULT(bareia64, "Generic \"bare\" IA64 machine", |
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ARCH_IA64, MACHINE_BAREIA64, 1, 0); |
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me->aliases[0] = "bareia64"; |
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machine_entry_add(me, ARCH_IA64); |
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} |
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|
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|
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MACHINE_REGISTER(testia64) |
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{ |
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MR_DEFAULT(testia64, "Test-machine for IA64", |
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ARCH_IA64, MACHINE_TESTIA64, 1, 0); |
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me->aliases[0] = "testia64"; |
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machine_entry_add(me, ARCH_IA64); |
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} |
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|
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|
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MACHINE_SETUP(barem68k) |
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{ |
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machine->machine_name = "Generic \"bare\" M68K machine"; |
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machine->stable = 1; |
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} |
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|
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|
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MACHINE_SETUP(testm68k) |
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{ |
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machine->machine_name = "M68K test machine"; |
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machine->stable = 1; |
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|
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/* TODO: interrupt for M68K? */ |
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|
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default_test(machine, cpu); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(barem68k) |
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{ |
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machine->cpu_name = strdup("68020"); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(testm68k) |
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{ |
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machine->cpu_name = strdup("68020"); |
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} |
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|
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|
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MACHINE_REGISTER(barem68k) |
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{ |
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MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine", |
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ARCH_M68K, MACHINE_BAREM68K, 1, 0); |
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me->aliases[0] = "barem68k"; |
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machine_entry_add(me, ARCH_M68K); |
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} |
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|
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|
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MACHINE_REGISTER(testm68k) |
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{ |
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MR_DEFAULT(testm68k, "Test-machine for M68K", |
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ARCH_M68K, MACHINE_TESTM68K, 1, 0); |
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me->aliases[0] = "testm68k"; |
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machine_entry_add(me, ARCH_M68K); |
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} |
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|
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|
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MACHINE_SETUP(baremips) |
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{ |
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machine->machine_name = "Generic \"bare\" MIPS machine"; |
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machine->stable = 1; |
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cpu->byte_order = EMUL_BIG_ENDIAN; |
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} |
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|
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|
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MACHINE_SETUP(testmips) |
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{ |
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/* |
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* A MIPS test machine (which happens to work with the |
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* code in my master's thesis). :-) |
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* |
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* IRQ map: |
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* 7 CPU counter |
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* 6 SMP IPIs |
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* 5 not used yet |
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* 4 not used yet |
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* 3 ethernet |
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* 2 serial console |
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*/ |
414 |
|
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char tmpstr[1000]; |
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|
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machine->machine_name = "MIPS test machine"; |
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machine->stable = 1; |
419 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
420 |
|
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snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%llx irq=2", |
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(long long)DEV_CONS_ADDRESS); |
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machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
424 |
|
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snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%llx", |
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(long long)DEV_MP_ADDRESS); |
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device_add(machine, tmpstr); |
428 |
|
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dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC, |
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640,480, 640,480, 24, "testmips generic"); |
431 |
|
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snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%llx", |
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(long long)DEV_DISK_ADDRESS); |
434 |
device_add(machine, tmpstr); |
435 |
|
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snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%llx irq=3", |
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(long long)DEV_ETHER_ADDRESS); |
438 |
device_add(machine, tmpstr); |
439 |
} |
440 |
|
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|
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MACHINE_DEFAULT_CPU(baremips) |
443 |
{ |
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machine->cpu_name = strdup("R4000"); |
445 |
} |
446 |
|
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|
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MACHINE_DEFAULT_CPU(testmips) |
449 |
{ |
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machine->cpu_name = strdup("R4000"); |
451 |
} |
452 |
|
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|
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MACHINE_REGISTER(baremips) |
455 |
{ |
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MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine", |
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ARCH_MIPS, MACHINE_BAREMIPS, 1, 0); |
458 |
me->aliases[0] = "baremips"; |
459 |
machine_entry_add(me, ARCH_MIPS); |
460 |
} |
461 |
|
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|
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MACHINE_REGISTER(testmips) |
464 |
{ |
465 |
MR_DEFAULT(testmips, "Test-machine for MIPS", |
466 |
ARCH_MIPS, MACHINE_TESTMIPS, 1, 0); |
467 |
me->aliases[0] = "testmips"; |
468 |
machine_entry_add(me, ARCH_MIPS); |
469 |
} |
470 |
|
471 |
|
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MACHINE_SETUP(bareppc) |
473 |
{ |
474 |
machine->machine_name = "Generic \"bare\" PPC machine"; |
475 |
machine->stable = 1; |
476 |
} |
477 |
|
478 |
|
479 |
MACHINE_SETUP(testppc) |
480 |
{ |
481 |
machine->machine_name = "PPC test machine"; |
482 |
machine->stable = 1; |
483 |
|
484 |
/* TODO: interrupt for PPC? */ |
485 |
|
486 |
default_test(machine, cpu); |
487 |
} |
488 |
|
489 |
|
490 |
MACHINE_DEFAULT_CPU(bareppc) |
491 |
{ |
492 |
machine->cpu_name = strdup("PPC970"); |
493 |
} |
494 |
|
495 |
|
496 |
MACHINE_DEFAULT_CPU(testppc) |
497 |
{ |
498 |
machine->cpu_name = strdup("PPC970"); |
499 |
} |
500 |
|
501 |
|
502 |
MACHINE_REGISTER(bareppc) |
503 |
{ |
504 |
MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine", |
505 |
ARCH_PPC, MACHINE_BAREPPC, 1, 0); |
506 |
me->aliases[0] = "bareppc"; |
507 |
machine_entry_add(me, ARCH_PPC); |
508 |
} |
509 |
|
510 |
|
511 |
MACHINE_REGISTER(testppc) |
512 |
{ |
513 |
MR_DEFAULT(testppc, "Test-machine for PPC", |
514 |
ARCH_PPC, MACHINE_TESTPPC, 1, 0); |
515 |
me->aliases[0] = "testppc"; |
516 |
machine_entry_add(me, ARCH_PPC); |
517 |
} |
518 |
|
519 |
|
520 |
MACHINE_SETUP(baresh) |
521 |
{ |
522 |
machine->machine_name = "Generic \"bare\" SH machine"; |
523 |
machine->stable = 1; |
524 |
} |
525 |
|
526 |
|
527 |
MACHINE_SETUP(testsh) |
528 |
{ |
529 |
machine->machine_name = "SH test machine"; |
530 |
machine->stable = 1; |
531 |
|
532 |
/* TODO: interrupt for SH? */ |
533 |
|
534 |
default_test(machine, cpu); |
535 |
} |
536 |
|
537 |
|
538 |
MACHINE_DEFAULT_CPU(baresh) |
539 |
{ |
540 |
machine->cpu_name = strdup("SH"); |
541 |
} |
542 |
|
543 |
|
544 |
MACHINE_DEFAULT_CPU(testsh) |
545 |
{ |
546 |
machine->cpu_name = strdup("SH"); |
547 |
} |
548 |
|
549 |
|
550 |
MACHINE_REGISTER(baresh) |
551 |
{ |
552 |
MR_DEFAULT(baresh, "Generic \"bare\" SH machine", |
553 |
ARCH_SH, MACHINE_BARESH, 1, 0); |
554 |
me->aliases[0] = "baresh"; |
555 |
machine_entry_add(me, ARCH_SH); |
556 |
} |
557 |
|
558 |
|
559 |
MACHINE_REGISTER(testsh) |
560 |
{ |
561 |
MR_DEFAULT(testsh, "Test-machine for SH", |
562 |
ARCH_SH, MACHINE_TESTSH, 1, 0); |
563 |
me->aliases[0] = "testsh"; |
564 |
machine_entry_add(me, ARCH_SH); |
565 |
} |
566 |
|
567 |
|
568 |
MACHINE_SETUP(baresparc) |
569 |
{ |
570 |
machine->machine_name = "Generic \"bare\" SPARC machine"; |
571 |
machine->stable = 1; |
572 |
} |
573 |
|
574 |
|
575 |
MACHINE_SETUP(testsparc) |
576 |
{ |
577 |
machine->machine_name = "SPARC test machine"; |
578 |
machine->stable = 1; |
579 |
|
580 |
/* TODO: interrupt for SPARC? */ |
581 |
|
582 |
default_test(machine, cpu); |
583 |
} |
584 |
|
585 |
|
586 |
MACHINE_DEFAULT_CPU(baresparc) |
587 |
{ |
588 |
machine->cpu_name = strdup("SPARCv9"); |
589 |
} |
590 |
|
591 |
|
592 |
MACHINE_DEFAULT_CPU(testsparc) |
593 |
{ |
594 |
machine->cpu_name = strdup("SPARCv9"); |
595 |
} |
596 |
|
597 |
|
598 |
MACHINE_REGISTER(baresparc) |
599 |
{ |
600 |
MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine", |
601 |
ARCH_SPARC, MACHINE_BARESPARC, 1, 0); |
602 |
me->aliases[0] = "baresparc"; |
603 |
machine_entry_add(me, ARCH_SPARC); |
604 |
} |
605 |
|
606 |
|
607 |
MACHINE_REGISTER(testsparc) |
608 |
{ |
609 |
MR_DEFAULT(testsparc, "Test-machine for SPARC", |
610 |
ARCH_SPARC, MACHINE_TESTSPARC, 1, 0); |
611 |
me->aliases[0] = "testsparc"; |
612 |
machine_entry_add(me, ARCH_SPARC); |
613 |
} |
614 |
|