/[gxemul]/trunk/src/machines/machine_test.c
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revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_test.c,v 1.17 2006/07/20 21:53:00 debug Exp $   *  $Id: machine_test.c,v 1.38 2007/06/15 18:08:10 debug Exp $
29   *   *
30   *  Various "test" machines (bare machines with just a CPU, or a bare machine   *  COMMENT: Various test machines
31   *  plus some experimental devices).   *
32     *  Generally, the machines are as follows:
33     *
34     *      bareXYZ:        A bare machine using an XYZ processor.
35     *
36     *      testXYZ:        A machine with an XYZ processor, and some experimental
37     *                      devices connected to it.
38     *
39     *  The experimental devices in the test machines are:
40     *
41     *      cons            A serial I/O console device.
42     *      disk            A device for reading/writing (emulated) disk sectors.
43     *      ether           An ethernet device, for sending/receiving ethernet
44     *                      frames on an emulated network.
45     *      fb              Framebuffer (24-bit RGB per pixel).
46     *      irqc            A generic interrupt controller.
47     *      mp              A multiprocessor controller.
48     *      rtc             A real-time clock device.
49   */   */
50    
51  #include <stdio.h>  #include <stdio.h>
# Line 36  Line 53 
53    
54  #include "cpu.h"  #include "cpu.h"
55  #include "device.h"  #include "device.h"
 #include "devices.h"  
56  #include "machine.h"  #include "machine.h"
57  #include "memory.h"  #include "memory.h"
58  #include "misc.h"  #include "misc.h"
59    
60    #include "sh4_exception.h"
61    
62  #include "testmachine/dev_cons.h"  #include "testmachine/dev_cons.h"
63  #include "testmachine/dev_disk.h"  #include "testmachine/dev_disk.h"
64  #include "testmachine/dev_ether.h"  #include "testmachine/dev_ether.h"
65  #include "testmachine/dev_fb.h"  #include "testmachine/dev_fb.h"
66    #include "testmachine/dev_irqc.h"
67  #include "testmachine/dev_mp.h"  #include "testmachine/dev_mp.h"
68    #include "testmachine/dev_rtc.h"
69    
70    
71    /*
72     *  default_test():
73     *
74     *  Initializes devices for most test machines. (Note: MIPS is different,
75     *  because of legacy reasons.)
76     */
77  static void default_test(struct machine *machine, struct cpu *cpu)  static void default_test(struct machine *machine, struct cpu *cpu)
78  {  {
79          char tmpstr[1000];          char tmpstr[1000];
80            char base_irq[1000];
81            char end_of_base_irq[50];
82    
83          snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=0",          /*
84              (uint64_t) DEV_CONS_ADDRESS);           *  First add the interrupt controller. Most processor architectures
85             *  in GXemul have only 1 interrupt pin on the CPU, and it is simply
86             *  called "emul[x].machine[y].cpu[z]".
87             *
88             *  MIPS is an exception, dealt with in a separate setup function.
89             *  ARM and SH are dealt with here.
90             */
91    
92            switch (machine->arch) {
93    
94            case ARCH_ARM:
95                    snprintf(end_of_base_irq, sizeof(end_of_base_irq), ".irq");
96                    break;
97    
98            case ARCH_SH:
99                    snprintf(end_of_base_irq, sizeof(end_of_base_irq),
100                        ".irq[0x%x]", SH4_INTEVT_IRQ15);
101                    break;
102    
103            default:
104                    end_of_base_irq[0] = '\0';
105            }
106    
107            snprintf(base_irq, sizeof(base_irq), "%s.cpu[%i]%s",
108                machine->path, machine->bootstrap_cpu, end_of_base_irq);
109    
110            snprintf(tmpstr, sizeof(tmpstr), "irqc addr=0x%"PRIx64" irq=%s",
111                (uint64_t) DEV_IRQC_ADDRESS, base_irq);
112            device_add(machine, tmpstr);
113    
114    
115            /*  Now, add the other devices:  */
116    
117            snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64
118                " irq=%s.irqc.2 in_use=%i",
119                (uint64_t) DEV_CONS_ADDRESS, base_irq, machine->arch != ARCH_SH);
120          machine->main_console_handle = (size_t)device_add(machine, tmpstr);          machine->main_console_handle = (size_t)device_add(machine, tmpstr);
121    
122          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64" irq=%s%sirqc.6",
123              (uint64_t) DEV_MP_ADDRESS);              (uint64_t) DEV_MP_ADDRESS,
124                end_of_base_irq[0]? end_of_base_irq + 1 : "",
125                end_of_base_irq[0]? "." : "");
126          device_add(machine, tmpstr);          device_add(machine, tmpstr);
127    
128          snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64,          snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64,
# Line 68  static void default_test(struct machine Line 133  static void default_test(struct machine
133              (uint64_t) DEV_DISK_ADDRESS);              (uint64_t) DEV_DISK_ADDRESS);
134          device_add(machine, tmpstr);          device_add(machine, tmpstr);
135    
136          snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=0",          snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s.irqc.3",
137              (uint64_t) DEV_ETHER_ADDRESS);              (uint64_t) DEV_ETHER_ADDRESS, base_irq);
138            device_add(machine, tmpstr);
139    
140            snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s.irqc.4",
141                (uint64_t) DEV_RTC_ADDRESS, base_irq);
142          device_add(machine, tmpstr);          device_add(machine, tmpstr);
143  }  }
144    
# Line 77  static void default_test(struct machine Line 146  static void default_test(struct machine
146  MACHINE_SETUP(barealpha)  MACHINE_SETUP(barealpha)
147  {  {
148          machine->machine_name = "Generic \"bare\" Alpha machine";          machine->machine_name = "Generic \"bare\" Alpha machine";
         machine->stable = 1;  
149  }  }
150    
151    
152  MACHINE_SETUP(testalpha)  MACHINE_SETUP(testalpha)
153  {  {
154          machine->machine_name = "Alpha test machine";          machine->machine_name = "Alpha test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for Alpha?  */  
155    
156          default_test(machine, cpu);          default_test(machine, cpu);
157  }  }
# Line 125  MACHINE_REGISTER(testalpha) Line 190  MACHINE_REGISTER(testalpha)
190  MACHINE_SETUP(barearm)  MACHINE_SETUP(barearm)
191  {  {
192          machine->machine_name = "Generic \"bare\" ARM machine";          machine->machine_name = "Generic \"bare\" ARM machine";
         machine->stable = 1;  
193  }  }
194    
195    
196  MACHINE_SETUP(testarm)  MACHINE_SETUP(testarm)
197  {  {
198          machine->machine_name = "ARM test machine";          machine->machine_name = "ARM test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for ARM?  */  
199    
200          default_test(machine, cpu);          default_test(machine, cpu);
201    
# Line 181  MACHINE_REGISTER(testarm) Line 242  MACHINE_REGISTER(testarm)
242    
243    
244    
245  MACHINE_SETUP(barehppa)  MACHINE_SETUP(barem88k)
 {  
         machine->machine_name = "Generic \"bare\" HPPA machine";  
         machine->stable = 1;  
 }  
   
   
 MACHINE_SETUP(testhppa)  
 {  
         machine->machine_name = "HPPA test machine";  
         machine->stable = 1;  
   
         /*  TODO: interrupt for HPPA?  */  
   
         default_test(machine, cpu);  
 }  
   
   
 MACHINE_DEFAULT_CPU(barehppa)  
 {  
         machine->cpu_name = strdup("HPPA");  
 }  
   
   
 MACHINE_DEFAULT_CPU(testhppa)  
246  {  {
247          machine->cpu_name = strdup("HPPA");          machine->machine_name = "Generic \"bare\" M88K machine";
248  }  }
249    
250    
251  MACHINE_REGISTER(barehppa)  MACHINE_SETUP(testm88k)
252  {  {
253          MR_DEFAULT(barehppa, "Generic \"bare\" HPPA machine",          machine->machine_name = "M88K test machine";
             ARCH_HPPA, MACHINE_BAREHPPA);  
   
         machine_entry_add_alias(me, "barehppa");  
 }  
   
   
 MACHINE_REGISTER(testhppa)  
 {  
         MR_DEFAULT(testhppa, "Test-machine for HPPA",  
             ARCH_HPPA, MACHINE_TESTHPPA);  
   
         machine_entry_add_alias(me, "testhppa");  
 }  
   
   
 MACHINE_SETUP(barei960)  
 {  
         machine->machine_name = "Generic \"bare\" i960 machine";  
         machine->stable = 1;  
 }  
   
   
 MACHINE_SETUP(testi960)  
 {  
         machine->machine_name = "i960 test machine";  
         machine->stable = 1;  
   
         /*  TODO: interrupt for i960?  */  
254    
255          default_test(machine, cpu);          default_test(machine, cpu);
256  }  }
257    
258    
259  MACHINE_DEFAULT_CPU(barei960)  MACHINE_DEFAULT_CPU(barem88k)
 {  
         machine->cpu_name = strdup("i960");  
 }  
   
   
 MACHINE_DEFAULT_CPU(testi960)  
260  {  {
261          machine->cpu_name = strdup("i960");          machine->cpu_name = strdup("88110");
262  }  }
263    
264    
265  MACHINE_REGISTER(barei960)  MACHINE_DEFAULT_CPU(testm88k)
266  {  {
267          MR_DEFAULT(barei960, "Generic \"bare\" i960 machine",          machine->cpu_name = strdup("88110");
             ARCH_I960, MACHINE_BAREI960);  
   
         machine_entry_add_alias(me, "barei960");  
268  }  }
269    
270    
271  MACHINE_REGISTER(testi960)  MACHINE_REGISTER(barem88k)
272  {  {
273          MR_DEFAULT(testi960, "Test-machine for i960",          MR_DEFAULT(barem88k, "Generic \"bare\" M88K machine",
274              ARCH_I960, MACHINE_TESTI960);              ARCH_M88K, MACHINE_BAREM88K);
   
         machine_entry_add_alias(me, "testi960");  
 }  
275    
276            machine_entry_add_alias(me, "barem88k");
 MACHINE_SETUP(bareia64)  
 {  
         machine->machine_name = "Generic \"bare\" IA64 machine";  
         machine->stable = 1;  
277  }  }
278    
279    
280  MACHINE_SETUP(testia64)  MACHINE_REGISTER(testm88k)
281  {  {
282          machine->machine_name = "IA64 test machine";          MR_DEFAULT(testm88k, "Test-machine for M88K",
283          machine->stable = 1;              ARCH_M88K, MACHINE_TESTM88K);
284    
285          /*  TODO: interrupt for IA64?  */          machine_entry_add_alias(me, "testm88k");
   
         default_test(machine, cpu);  
 }  
   
   
 MACHINE_DEFAULT_CPU(bareia64)  
 {  
         machine->cpu_name = strdup("IA64");  
 }  
   
   
 MACHINE_DEFAULT_CPU(testia64)  
 {  
         machine->cpu_name = strdup("IA64");  
 }  
   
   
 MACHINE_REGISTER(bareia64)  
 {  
         MR_DEFAULT(bareia64, "Generic \"bare\" IA64 machine",  
             ARCH_IA64, MACHINE_BAREIA64);  
   
         machine_entry_add_alias(me, "bareia64");  
 }  
   
   
 MACHINE_REGISTER(testia64)  
 {  
         MR_DEFAULT(testia64, "Test-machine for IA64",  
             ARCH_IA64, MACHINE_TESTIA64);  
   
         machine_entry_add_alias(me, "testia64");  
 }  
   
   
 MACHINE_SETUP(barem68k)  
 {  
         machine->machine_name = "Generic \"bare\" M68K machine";  
         machine->stable = 1;  
 }  
   
   
 MACHINE_SETUP(testm68k)  
 {  
         machine->machine_name = "M68K test machine";  
         machine->stable = 1;  
   
         /*  TODO: interrupt for M68K?  */  
   
         default_test(machine, cpu);  
 }  
   
   
 MACHINE_DEFAULT_CPU(barem68k)  
 {  
         machine->cpu_name = strdup("68020");  
 }  
   
   
 MACHINE_DEFAULT_CPU(testm68k)  
 {  
         machine->cpu_name = strdup("68020");  
 }  
   
   
 MACHINE_REGISTER(barem68k)  
 {  
         MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine",  
             ARCH_M68K, MACHINE_BAREM68K);  
   
         machine_entry_add_alias(me, "barem68k");  
 }  
   
   
 MACHINE_REGISTER(testm68k)  
 {  
         MR_DEFAULT(testm68k, "Test-machine for M68K",  
             ARCH_M68K, MACHINE_TESTM68K);  
   
         machine_entry_add_alias(me, "testm68k");  
286  }  }
287    
288    
289  MACHINE_SETUP(baremips)  MACHINE_SETUP(baremips)
290  {  {
291          machine->machine_name = "Generic \"bare\" MIPS machine";          machine->machine_name = "Generic \"bare\" MIPS machine";
         machine->stable = 1;  
292          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
293  }  }
294    
# Line 384  MACHINE_SETUP(baremips) Line 296  MACHINE_SETUP(baremips)
296  MACHINE_SETUP(testmips)  MACHINE_SETUP(testmips)
297  {  {
298          /*          /*
299           *  A MIPS test machine (which happens to work with the           *  A MIPS test machine. Originally, this was created as a way for
300           *  code in my master's thesis).  :-)           *  me to test my master's thesis code; since then it has both
301             *  evolved to support new things, and suffered bit rot so that it
302             *  no longer can run my thesis code. Well, well...
303           *           *
304           *  IRQ map:           *  IRQ map:
305           *      7       CPU counter           *      7       CPU counter
306           *      6       SMP IPIs           *      6       SMP IPIs
307           *      5       not used yet           *      5       not used yet
308           *      4       not used yet           *      4       rtc
309           *      3       ethernet             *      3       ethernet  
310           *      2       serial console           *      2       serial console
311           */           */
312    
313          char tmpstr[1000];          char tmpstr[300];
314    
315          machine->machine_name = "MIPS test machine";          machine->machine_name = "MIPS test machine";
         machine->stable = 1;  
316          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
317    
318          snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=2",          snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=%s."
319              (uint64_t) DEV_CONS_ADDRESS);              "cpu[%i].2", (uint64_t) DEV_CONS_ADDRESS, machine->path,
320                machine->bootstrap_cpu);
321          machine->main_console_handle = (size_t)device_add(machine, tmpstr);          machine->main_console_handle = (size_t)device_add(machine, tmpstr);
322    
323          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64" irq=6",
324              (uint64_t) DEV_MP_ADDRESS);              (uint64_t) DEV_MP_ADDRESS);
325          device_add(machine, tmpstr);          device_add(machine, tmpstr);
326    
# Line 418  MACHINE_SETUP(testmips) Line 332  MACHINE_SETUP(testmips)
332              (uint64_t) DEV_DISK_ADDRESS);              (uint64_t) DEV_DISK_ADDRESS);
333          device_add(machine, tmpstr);          device_add(machine, tmpstr);
334    
335          snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=3",          snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s."
336              (uint64_t) DEV_ETHER_ADDRESS);              "cpu[%i].3", (uint64_t) DEV_ETHER_ADDRESS, machine->path,
337                machine->bootstrap_cpu);
338            device_add(machine, tmpstr);
339    
340            snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s."
341                "cpu[%i].4", (uint64_t) DEV_RTC_ADDRESS, machine->path,
342                machine->bootstrap_cpu);
343          device_add(machine, tmpstr);          device_add(machine, tmpstr);
344  }  }
345    
346    
347  MACHINE_DEFAULT_CPU(baremips)  MACHINE_DEFAULT_CPU(baremips)
348  {  {
349          machine->cpu_name = strdup("5Kc");          machine->cpu_name = strdup("5KE");
350  }  }
351    
352    
353  MACHINE_DEFAULT_CPU(testmips)  MACHINE_DEFAULT_CPU(testmips)
354  {  {
355          machine->cpu_name = strdup("5Kc");          machine->cpu_name = strdup("5KE");
356  }  }
357    
358    
# Line 457  MACHINE_REGISTER(testmips) Line 377  MACHINE_REGISTER(testmips)
377  MACHINE_SETUP(bareppc)  MACHINE_SETUP(bareppc)
378  {  {
379          machine->machine_name = "Generic \"bare\" PPC machine";          machine->machine_name = "Generic \"bare\" PPC machine";
         machine->stable = 1;  
380  }  }
381    
382    
383  MACHINE_SETUP(testppc)  MACHINE_SETUP(testppc)
384  {  {
385          machine->machine_name = "PPC test machine";          machine->machine_name = "PPC test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for PPC?  */  
386    
387          default_test(machine, cpu);          default_test(machine, cpu);
388  }  }
# Line 504  MACHINE_REGISTER(testppc) Line 420  MACHINE_REGISTER(testppc)
420  MACHINE_SETUP(baresh)  MACHINE_SETUP(baresh)
421  {  {
422          machine->machine_name = "Generic \"bare\" SH machine";          machine->machine_name = "Generic \"bare\" SH machine";
         machine->stable = 1;  
423  }  }
424    
425    
426  MACHINE_SETUP(testsh)  MACHINE_SETUP(testsh)
427  {  {
428          machine->machine_name = "SH test machine";          machine->machine_name = "SH test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for SH?  */  
429    
430          default_test(machine, cpu);          default_test(machine, cpu);
431  }  }
# Line 521  MACHINE_SETUP(testsh) Line 433  MACHINE_SETUP(testsh)
433    
434  MACHINE_DEFAULT_CPU(baresh)  MACHINE_DEFAULT_CPU(baresh)
435  {  {
436          machine->cpu_name = strdup("SH");          machine->cpu_name = strdup("SH7750");
437  }  }
438    
439    
440  MACHINE_DEFAULT_CPU(testsh)  MACHINE_DEFAULT_CPU(testsh)
441  {  {
442          machine->cpu_name = strdup("SH");          machine->cpu_name = strdup("SH7750");
443  }  }
444    
445    
# Line 551  MACHINE_REGISTER(testsh) Line 463  MACHINE_REGISTER(testsh)
463  MACHINE_SETUP(baresparc)  MACHINE_SETUP(baresparc)
464  {  {
465          machine->machine_name = "Generic \"bare\" SPARC machine";          machine->machine_name = "Generic \"bare\" SPARC machine";
         machine->stable = 1;  
466  }  }
467    
468    
469  MACHINE_SETUP(testsparc)  MACHINE_SETUP(testsparc)
470  {  {
471          machine->machine_name = "SPARC test machine";          machine->machine_name = "SPARC test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for SPARC?  */  
472    
473          default_test(machine, cpu);          default_test(machine, cpu);
474  }  }
# Line 596  MACHINE_REGISTER(testsparc) Line 504  MACHINE_REGISTER(testsparc)
504  }  }
505    
506    
 MACHINE_SETUP(baretransputer)  
 {  
         machine->machine_name = "Generic \"bare\" Transputer machine";  
         machine->stable = 1;  
 }  
   
   
 MACHINE_DEFAULT_CPU(baretransputer)  
 {  
         machine->cpu_name = strdup("T800");  
 }  
   
   
 MACHINE_REGISTER(baretransputer)  
 {  
         MR_DEFAULT(baretransputer, "Generic \"bare\" Transputer machine",  
             ARCH_TRANSPUTER, MACHINE_BARETRANSPUTER);  
   
         machine_entry_add_alias(me, "baretransputer");  
 }  
   
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