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/* |
/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: machine_test.c,v 1.13 2006/06/12 10:21:12 debug Exp $ |
* $Id: machine_test.c,v 1.38 2007/06/15 18:08:10 debug Exp $ |
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* |
* |
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* Various "test" machines (bare machines with just a CPU, or a bare machine |
* COMMENT: Various test machines |
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* plus some experimental devices). |
* |
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* Generally, the machines are as follows: |
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* |
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* bareXYZ: A bare machine using an XYZ processor. |
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* |
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* testXYZ: A machine with an XYZ processor, and some experimental |
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* devices connected to it. |
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* |
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* The experimental devices in the test machines are: |
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* |
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* cons A serial I/O console device. |
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* disk A device for reading/writing (emulated) disk sectors. |
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* ether An ethernet device, for sending/receiving ethernet |
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* frames on an emulated network. |
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* fb Framebuffer (24-bit RGB per pixel). |
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* irqc A generic interrupt controller. |
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* mp A multiprocessor controller. |
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* rtc A real-time clock device. |
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*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
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#include "cpu.h" |
#include "cpu.h" |
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#include "device.h" |
#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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#include "sh4_exception.h" |
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#include "testmachine/dev_cons.h" |
#include "testmachine/dev_cons.h" |
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#include "testmachine/dev_disk.h" |
#include "testmachine/dev_disk.h" |
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#include "testmachine/dev_ether.h" |
#include "testmachine/dev_ether.h" |
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#include "testmachine/dev_fb.h" |
#include "testmachine/dev_fb.h" |
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#include "testmachine/dev_irqc.h" |
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#include "testmachine/dev_mp.h" |
#include "testmachine/dev_mp.h" |
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#include "testmachine/dev_rtc.h" |
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/* |
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* default_test(): |
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* |
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* Initializes devices for most test machines. (Note: MIPS is different, |
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* because of legacy reasons.) |
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*/ |
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static void default_test(struct machine *machine, struct cpu *cpu) |
static void default_test(struct machine *machine, struct cpu *cpu) |
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{ |
{ |
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char tmpstr[1000]; |
char tmpstr[1000]; |
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char base_irq[1000]; |
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char end_of_base_irq[50]; |
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/* |
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* First add the interrupt controller. Most processor architectures |
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* in GXemul have only 1 interrupt pin on the CPU, and it is simply |
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* called "emul[x].machine[y].cpu[z]". |
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* |
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* MIPS is an exception, dealt with in a separate setup function. |
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* ARM and SH are dealt with here. |
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*/ |
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switch (machine->arch) { |
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case ARCH_ARM: |
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snprintf(end_of_base_irq, sizeof(end_of_base_irq), ".irq"); |
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break; |
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case ARCH_SH: |
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snprintf(end_of_base_irq, sizeof(end_of_base_irq), |
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".irq[0x%x]", SH4_INTEVT_IRQ15); |
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break; |
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default: |
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end_of_base_irq[0] = '\0'; |
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} |
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snprintf(base_irq, sizeof(base_irq), "%s.cpu[%i]%s", |
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machine->path, machine->bootstrap_cpu, end_of_base_irq); |
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snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=0", |
snprintf(tmpstr, sizeof(tmpstr), "irqc addr=0x%"PRIx64" irq=%s", |
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(uint64_t) DEV_CONS_ADDRESS); |
(uint64_t) DEV_IRQC_ADDRESS, base_irq); |
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device_add(machine, tmpstr); |
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/* Now, add the other devices: */ |
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snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64 |
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" irq=%s.irqc.2 in_use=%i", |
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(uint64_t) DEV_CONS_ADDRESS, base_irq, machine->arch != ARCH_SH); |
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machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64, |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64" irq=%s%sirqc.6", |
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(uint64_t) DEV_MP_ADDRESS); |
(uint64_t) DEV_MP_ADDRESS, |
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end_of_base_irq[0]? end_of_base_irq + 1 : "", |
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end_of_base_irq[0]? "." : ""); |
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device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
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dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC, |
snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64, |
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640,480, 640,480, 24, "generic"); |
(uint64_t) DEV_FBCTRL_ADDRESS); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
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(uint64_t) DEV_DISK_ADDRESS); |
(uint64_t) DEV_DISK_ADDRESS); |
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device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=0", |
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s.irqc.3", |
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(uint64_t) DEV_ETHER_ADDRESS); |
(uint64_t) DEV_ETHER_ADDRESS, base_irq); |
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device_add(machine, tmpstr); |
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snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s.irqc.4", |
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(uint64_t) DEV_RTC_ADDRESS, base_irq); |
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device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
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} |
} |
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MACHINE_SETUP(barealpha) |
MACHINE_SETUP(barealpha) |
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{ |
{ |
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machine->machine_name = "Generic \"bare\" Alpha machine"; |
machine->machine_name = "Generic \"bare\" Alpha machine"; |
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machine->stable = 1; |
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} |
} |
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MACHINE_SETUP(testalpha) |
MACHINE_SETUP(testalpha) |
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{ |
{ |
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machine->machine_name = "Alpha test machine"; |
machine->machine_name = "Alpha test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for Alpha? */ |
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default_test(machine, cpu); |
default_test(machine, cpu); |
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} |
} |
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MACHINE_REGISTER(barealpha) |
MACHINE_REGISTER(barealpha) |
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{ |
{ |
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MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine", |
MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine", |
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ARCH_ALPHA, MACHINE_BAREALPHA, 1, 0); |
ARCH_ALPHA, MACHINE_BAREALPHA); |
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me->aliases[0] = "barealpha"; |
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machine_entry_add(me, ARCH_ALPHA); |
machine_entry_add_alias(me, "barealpha"); |
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} |
} |
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MACHINE_REGISTER(testalpha) |
MACHINE_REGISTER(testalpha) |
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{ |
{ |
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MR_DEFAULT(testalpha, "Test-machine for Alpha", |
MR_DEFAULT(testalpha, "Test-machine for Alpha", |
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ARCH_ALPHA, MACHINE_TESTALPHA, 1, 0); |
ARCH_ALPHA, MACHINE_TESTALPHA); |
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me->aliases[0] = "testalpha"; |
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machine_entry_add(me, ARCH_ALPHA); |
machine_entry_add_alias(me, "testalpha"); |
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} |
} |
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MACHINE_SETUP(barearm) |
MACHINE_SETUP(barearm) |
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{ |
{ |
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machine->machine_name = "Generic \"bare\" ARM machine"; |
machine->machine_name = "Generic \"bare\" ARM machine"; |
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machine->stable = 1; |
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} |
} |
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MACHINE_SETUP(testarm) |
MACHINE_SETUP(testarm) |
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{ |
{ |
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machine->machine_name = "ARM test machine"; |
machine->machine_name = "ARM test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for ARM? */ |
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default_test(machine, cpu); |
default_test(machine, cpu); |
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MACHINE_REGISTER(barearm) |
MACHINE_REGISTER(barearm) |
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{ |
{ |
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MR_DEFAULT(barearm, "Generic \"bare\" ARM machine", |
MR_DEFAULT(barearm, "Generic \"bare\" ARM machine", |
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ARCH_ARM, MACHINE_BAREARM, 1, 0); |
ARCH_ARM, MACHINE_BAREARM); |
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me->aliases[0] = "barearm"; |
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machine_entry_add(me, ARCH_ARM); |
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} |
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MACHINE_REGISTER(testarm) |
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{ |
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MR_DEFAULT(testarm, "Test-machine for ARM", |
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ARCH_ARM, MACHINE_TESTARM, 1, 0); |
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me->aliases[0] = "testarm"; |
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machine_entry_add(me, ARCH_ARM); |
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} |
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MACHINE_SETUP(barehppa) |
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{ |
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machine->machine_name = "Generic \"bare\" HPPA machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testhppa) |
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{ |
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machine->machine_name = "HPPA test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for HPPA? */ |
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default_test(machine, cpu); |
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} |
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MACHINE_DEFAULT_CPU(barehppa) |
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{ |
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machine->cpu_name = strdup("HPPA"); |
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} |
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MACHINE_DEFAULT_CPU(testhppa) |
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{ |
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machine->cpu_name = strdup("HPPA"); |
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} |
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MACHINE_REGISTER(barehppa) |
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{ |
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MR_DEFAULT(barehppa, "Generic \"bare\" HPPA machine", |
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ARCH_HPPA, MACHINE_BAREHPPA, 1, 0); |
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me->aliases[0] = "barehppa"; |
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machine_entry_add(me, ARCH_HPPA); |
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} |
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MACHINE_REGISTER(testhppa) |
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{ |
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MR_DEFAULT(testhppa, "Test-machine for HPPA", |
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ARCH_HPPA, MACHINE_TESTHPPA, 1, 0); |
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me->aliases[0] = "testhppa"; |
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machine_entry_add(me, ARCH_HPPA); |
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} |
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machine_entry_add_alias(me, "barearm"); |
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MACHINE_SETUP(barei960) |
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{ |
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machine->machine_name = "Generic \"bare\" i960 machine"; |
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machine->stable = 1; |
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} |
} |
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MACHINE_SETUP(testi960) |
MACHINE_REGISTER(testarm) |
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{ |
{ |
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machine->machine_name = "i960 test machine"; |
MR_DEFAULT(testarm, "Test-machine for ARM", ARCH_ARM, MACHINE_TESTARM); |
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machine->stable = 1; |
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/* TODO: interrupt for i960? */ |
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default_test(machine, cpu); |
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} |
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MACHINE_DEFAULT_CPU(barei960) |
machine_entry_add_alias(me, "testarm"); |
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{ |
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machine->cpu_name = strdup("i960"); |
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} |
} |
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MACHINE_DEFAULT_CPU(testi960) |
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{ |
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machine->cpu_name = strdup("i960"); |
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} |
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MACHINE_REGISTER(barei960) |
MACHINE_SETUP(barem88k) |
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{ |
{ |
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MR_DEFAULT(barei960, "Generic \"bare\" i960 machine", |
machine->machine_name = "Generic \"bare\" M88K machine"; |
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ARCH_I960, MACHINE_BAREI960, 1, 0); |
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me->aliases[0] = "barei960"; |
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machine_entry_add(me, ARCH_I960); |
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} |
} |
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MACHINE_REGISTER(testi960) |
MACHINE_SETUP(testm88k) |
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{ |
{ |
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MR_DEFAULT(testi960, "Test-machine for i960", |
machine->machine_name = "M88K test machine"; |
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ARCH_I960, MACHINE_TESTI960, 1, 0); |
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me->aliases[0] = "testi960"; |
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machine_entry_add(me, ARCH_I960); |
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} |
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MACHINE_SETUP(bareia64) |
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{ |
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machine->machine_name = "Generic \"bare\" IA64 machine"; |
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machine->stable = 1; |
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} |
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MACHINE_SETUP(testia64) |
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{ |
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machine->machine_name = "IA64 test machine"; |
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machine->stable = 1; |
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/* TODO: interrupt for IA64? */ |
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default_test(machine, cpu); |
default_test(machine, cpu); |
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} |
} |
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MACHINE_DEFAULT_CPU(bareia64) |
MACHINE_DEFAULT_CPU(barem88k) |
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{ |
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machine->cpu_name = strdup("IA64"); |
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} |
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MACHINE_DEFAULT_CPU(testia64) |
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{ |
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machine->cpu_name = strdup("IA64"); |
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} |
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MACHINE_REGISTER(bareia64) |
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{ |
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MR_DEFAULT(bareia64, "Generic \"bare\" IA64 machine", |
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ARCH_IA64, MACHINE_BAREIA64, 1, 0); |
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me->aliases[0] = "bareia64"; |
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machine_entry_add(me, ARCH_IA64); |
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} |
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MACHINE_REGISTER(testia64) |
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{ |
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MR_DEFAULT(testia64, "Test-machine for IA64", |
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ARCH_IA64, MACHINE_TESTIA64, 1, 0); |
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me->aliases[0] = "testia64"; |
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machine_entry_add(me, ARCH_IA64); |
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} |
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MACHINE_SETUP(barem68k) |
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{ |
{ |
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machine->machine_name = "Generic \"bare\" M68K machine"; |
machine->cpu_name = strdup("88110"); |
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machine->stable = 1; |
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} |
} |
263 |
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264 |
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MACHINE_SETUP(testm68k) |
MACHINE_DEFAULT_CPU(testm88k) |
266 |
{ |
{ |
267 |
machine->machine_name = "M68K test machine"; |
machine->cpu_name = strdup("88110"); |
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machine->stable = 1; |
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/* TODO: interrupt for M68K? */ |
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default_test(machine, cpu); |
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} |
} |
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MACHINE_DEFAULT_CPU(barem68k) |
MACHINE_REGISTER(barem88k) |
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{ |
{ |
273 |
machine->cpu_name = strdup("68020"); |
MR_DEFAULT(barem88k, "Generic \"bare\" M88K machine", |
274 |
} |
ARCH_M88K, MACHINE_BAREM88K); |
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machine_entry_add_alias(me, "barem88k"); |
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MACHINE_DEFAULT_CPU(testm68k) |
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{ |
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machine->cpu_name = strdup("68020"); |
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} |
} |
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MACHINE_REGISTER(barem68k) |
MACHINE_REGISTER(testm88k) |
281 |
{ |
{ |
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MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine", |
MR_DEFAULT(testm88k, "Test-machine for M88K", |
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ARCH_M68K, MACHINE_BAREM68K, 1, 0); |
ARCH_M88K, MACHINE_TESTM88K); |
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me->aliases[0] = "barem68k"; |
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machine_entry_add(me, ARCH_M68K); |
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} |
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MACHINE_REGISTER(testm68k) |
machine_entry_add_alias(me, "testm88k"); |
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{ |
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MR_DEFAULT(testm68k, "Test-machine for M68K", |
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ARCH_M68K, MACHINE_TESTM68K, 1, 0); |
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me->aliases[0] = "testm68k"; |
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machine_entry_add(me, ARCH_M68K); |
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} |
} |
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MACHINE_SETUP(baremips) |
MACHINE_SETUP(baremips) |
290 |
{ |
{ |
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machine->machine_name = "Generic \"bare\" MIPS machine"; |
machine->machine_name = "Generic \"bare\" MIPS machine"; |
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machine->stable = 1; |
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cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
293 |
} |
} |
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MACHINE_SETUP(testmips) |
MACHINE_SETUP(testmips) |
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{ |
{ |
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/* |
/* |
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* A MIPS test machine (which happens to work with the |
* A MIPS test machine. Originally, this was created as a way for |
300 |
* code in my master's thesis). :-) |
* me to test my master's thesis code; since then it has both |
301 |
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* evolved to support new things, and suffered bit rot so that it |
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* no longer can run my thesis code. Well, well... |
303 |
* |
* |
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* IRQ map: |
* IRQ map: |
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* 7 CPU counter |
* 7 CPU counter |
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* 6 SMP IPIs |
* 6 SMP IPIs |
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* 5 not used yet |
* 5 not used yet |
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* 4 not used yet |
* 4 rtc |
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* 3 ethernet |
* 3 ethernet |
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* 2 serial console |
* 2 serial console |
311 |
*/ |
*/ |
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313 |
char tmpstr[1000]; |
char tmpstr[300]; |
314 |
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315 |
machine->machine_name = "MIPS test machine"; |
machine->machine_name = "MIPS test machine"; |
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machine->stable = 1; |
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316 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
317 |
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318 |
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=2", |
snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=%s." |
319 |
(uint64_t) DEV_CONS_ADDRESS); |
"cpu[%i].2", (uint64_t) DEV_CONS_ADDRESS, machine->path, |
320 |
|
machine->bootstrap_cpu); |
321 |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
machine->main_console_handle = (size_t)device_add(machine, tmpstr); |
322 |
|
|
323 |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64, |
snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64" irq=6", |
324 |
(uint64_t) DEV_MP_ADDRESS); |
(uint64_t) DEV_MP_ADDRESS); |
325 |
device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
326 |
|
|
327 |
dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC, |
snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64, |
328 |
640,480, 640,480, 24, "testmips generic"); |
(uint64_t) DEV_FBCTRL_ADDRESS); |
329 |
|
device_add(machine, tmpstr); |
330 |
|
|
331 |
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64, |
332 |
(uint64_t) DEV_DISK_ADDRESS); |
(uint64_t) DEV_DISK_ADDRESS); |
333 |
device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
334 |
|
|
335 |
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=3", |
snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s." |
336 |
(uint64_t) DEV_ETHER_ADDRESS); |
"cpu[%i].3", (uint64_t) DEV_ETHER_ADDRESS, machine->path, |
337 |
|
machine->bootstrap_cpu); |
338 |
|
device_add(machine, tmpstr); |
339 |
|
|
340 |
|
snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s." |
341 |
|
"cpu[%i].4", (uint64_t) DEV_RTC_ADDRESS, machine->path, |
342 |
|
machine->bootstrap_cpu); |
343 |
device_add(machine, tmpstr); |
device_add(machine, tmpstr); |
344 |
} |
} |
345 |
|
|
346 |
|
|
347 |
MACHINE_DEFAULT_CPU(baremips) |
MACHINE_DEFAULT_CPU(baremips) |
348 |
{ |
{ |
349 |
machine->cpu_name = strdup("5Kc"); |
machine->cpu_name = strdup("5KE"); |
350 |
} |
} |
351 |
|
|
352 |
|
|
353 |
MACHINE_DEFAULT_CPU(testmips) |
MACHINE_DEFAULT_CPU(testmips) |
354 |
{ |
{ |
355 |
machine->cpu_name = strdup("5Kc"); |
machine->cpu_name = strdup("5KE"); |
356 |
} |
} |
357 |
|
|
358 |
|
|
359 |
MACHINE_REGISTER(baremips) |
MACHINE_REGISTER(baremips) |
360 |
{ |
{ |
361 |
MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine", |
MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine", |
362 |
ARCH_MIPS, MACHINE_BAREMIPS, 1, 0); |
ARCH_MIPS, MACHINE_BAREMIPS); |
363 |
me->aliases[0] = "baremips"; |
|
364 |
machine_entry_add(me, ARCH_MIPS); |
machine_entry_add_alias(me, "baremips"); |
365 |
} |
} |
366 |
|
|
367 |
|
|
368 |
MACHINE_REGISTER(testmips) |
MACHINE_REGISTER(testmips) |
369 |
{ |
{ |
370 |
MR_DEFAULT(testmips, "Test-machine for MIPS", |
MR_DEFAULT(testmips, "Test-machine for MIPS", |
371 |
ARCH_MIPS, MACHINE_TESTMIPS, 1, 0); |
ARCH_MIPS, MACHINE_TESTMIPS); |
372 |
me->aliases[0] = "testmips"; |
|
373 |
machine_entry_add(me, ARCH_MIPS); |
machine_entry_add_alias(me, "testmips"); |
374 |
} |
} |
375 |
|
|
376 |
|
|
377 |
MACHINE_SETUP(bareppc) |
MACHINE_SETUP(bareppc) |
378 |
{ |
{ |
379 |
machine->machine_name = "Generic \"bare\" PPC machine"; |
machine->machine_name = "Generic \"bare\" PPC machine"; |
|
machine->stable = 1; |
|
380 |
} |
} |
381 |
|
|
382 |
|
|
383 |
MACHINE_SETUP(testppc) |
MACHINE_SETUP(testppc) |
384 |
{ |
{ |
385 |
machine->machine_name = "PPC test machine"; |
machine->machine_name = "PPC test machine"; |
|
machine->stable = 1; |
|
|
|
|
|
/* TODO: interrupt for PPC? */ |
|
386 |
|
|
387 |
default_test(machine, cpu); |
default_test(machine, cpu); |
388 |
} |
} |
403 |
MACHINE_REGISTER(bareppc) |
MACHINE_REGISTER(bareppc) |
404 |
{ |
{ |
405 |
MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine", |
MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine", |
406 |
ARCH_PPC, MACHINE_BAREPPC, 1, 0); |
ARCH_PPC, MACHINE_BAREPPC); |
407 |
me->aliases[0] = "bareppc"; |
|
408 |
machine_entry_add(me, ARCH_PPC); |
machine_entry_add_alias(me, "bareppc"); |
409 |
} |
} |
410 |
|
|
411 |
|
|
412 |
MACHINE_REGISTER(testppc) |
MACHINE_REGISTER(testppc) |
413 |
{ |
{ |
414 |
MR_DEFAULT(testppc, "Test-machine for PPC", |
MR_DEFAULT(testppc, "Test-machine for PPC", ARCH_PPC, MACHINE_TESTPPC); |
415 |
ARCH_PPC, MACHINE_TESTPPC, 1, 0); |
|
416 |
me->aliases[0] = "testppc"; |
machine_entry_add_alias(me, "testppc"); |
|
machine_entry_add(me, ARCH_PPC); |
|
417 |
} |
} |
418 |
|
|
419 |
|
|
420 |
MACHINE_SETUP(baresh) |
MACHINE_SETUP(baresh) |
421 |
{ |
{ |
422 |
machine->machine_name = "Generic \"bare\" SH machine"; |
machine->machine_name = "Generic \"bare\" SH machine"; |
|
machine->stable = 1; |
|
423 |
} |
} |
424 |
|
|
425 |
|
|
426 |
MACHINE_SETUP(testsh) |
MACHINE_SETUP(testsh) |
427 |
{ |
{ |
428 |
machine->machine_name = "SH test machine"; |
machine->machine_name = "SH test machine"; |
|
machine->stable = 1; |
|
|
|
|
|
/* TODO: interrupt for SH? */ |
|
429 |
|
|
430 |
default_test(machine, cpu); |
default_test(machine, cpu); |
431 |
} |
} |
433 |
|
|
434 |
MACHINE_DEFAULT_CPU(baresh) |
MACHINE_DEFAULT_CPU(baresh) |
435 |
{ |
{ |
436 |
machine->cpu_name = strdup("SH"); |
machine->cpu_name = strdup("SH7750"); |
437 |
} |
} |
438 |
|
|
439 |
|
|
440 |
MACHINE_DEFAULT_CPU(testsh) |
MACHINE_DEFAULT_CPU(testsh) |
441 |
{ |
{ |
442 |
machine->cpu_name = strdup("SH"); |
machine->cpu_name = strdup("SH7750"); |
443 |
} |
} |
444 |
|
|
445 |
|
|
446 |
MACHINE_REGISTER(baresh) |
MACHINE_REGISTER(baresh) |
447 |
{ |
{ |
448 |
MR_DEFAULT(baresh, "Generic \"bare\" SH machine", |
MR_DEFAULT(baresh, "Generic \"bare\" SH machine", |
449 |
ARCH_SH, MACHINE_BARESH, 1, 0); |
ARCH_SH, MACHINE_BARESH); |
450 |
me->aliases[0] = "baresh"; |
|
451 |
machine_entry_add(me, ARCH_SH); |
machine_entry_add_alias(me, "baresh"); |
452 |
} |
} |
453 |
|
|
454 |
|
|
455 |
MACHINE_REGISTER(testsh) |
MACHINE_REGISTER(testsh) |
456 |
{ |
{ |
457 |
MR_DEFAULT(testsh, "Test-machine for SH", |
MR_DEFAULT(testsh, "Test-machine for SH", ARCH_SH, MACHINE_TESTSH); |
458 |
ARCH_SH, MACHINE_TESTSH, 1, 0); |
|
459 |
me->aliases[0] = "testsh"; |
machine_entry_add_alias(me, "testsh"); |
|
machine_entry_add(me, ARCH_SH); |
|
460 |
} |
} |
461 |
|
|
462 |
|
|
463 |
MACHINE_SETUP(baresparc) |
MACHINE_SETUP(baresparc) |
464 |
{ |
{ |
465 |
machine->machine_name = "Generic \"bare\" SPARC machine"; |
machine->machine_name = "Generic \"bare\" SPARC machine"; |
|
machine->stable = 1; |
|
466 |
} |
} |
467 |
|
|
468 |
|
|
469 |
MACHINE_SETUP(testsparc) |
MACHINE_SETUP(testsparc) |
470 |
{ |
{ |
471 |
machine->machine_name = "SPARC test machine"; |
machine->machine_name = "SPARC test machine"; |
|
machine->stable = 1; |
|
|
|
|
|
/* TODO: interrupt for SPARC? */ |
|
472 |
|
|
473 |
default_test(machine, cpu); |
default_test(machine, cpu); |
474 |
} |
} |
489 |
MACHINE_REGISTER(baresparc) |
MACHINE_REGISTER(baresparc) |
490 |
{ |
{ |
491 |
MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine", |
MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine", |
492 |
ARCH_SPARC, MACHINE_BARESPARC, 1, 0); |
ARCH_SPARC, MACHINE_BARESPARC); |
493 |
me->aliases[0] = "baresparc"; |
|
494 |
machine_entry_add(me, ARCH_SPARC); |
machine_entry_add_alias(me, "baresparc"); |
495 |
} |
} |
496 |
|
|
497 |
|
|
498 |
MACHINE_REGISTER(testsparc) |
MACHINE_REGISTER(testsparc) |
499 |
{ |
{ |
500 |
MR_DEFAULT(testsparc, "Test-machine for SPARC", |
MR_DEFAULT(testsparc, "Test-machine for SPARC", |
501 |
ARCH_SPARC, MACHINE_TESTSPARC, 1, 0); |
ARCH_SPARC, MACHINE_TESTSPARC); |
502 |
me->aliases[0] = "testsparc"; |
|
503 |
machine_entry_add(me, ARCH_SPARC); |
machine_entry_add_alias(me, "testsparc"); |
504 |
} |
} |
505 |
|
|
506 |
|
|