/[gxemul]/trunk/src/machines/machine_test.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 41 by dpavlin, Mon Oct 8 16:22:11 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_test.c,v 1.33 2007/04/19 15:18:16 debug Exp $   *  $Id: machine_test.c,v 1.38 2007/06/15 18:08:10 debug Exp $
29   *   *
30   *  Various "test" machines (bare machines with just a CPU, or a bare machine   *  COMMENT: Various test machines
31   *  plus some experimental devices).   *
32     *  Generally, the machines are as follows:
33     *
34     *      bareXYZ:        A bare machine using an XYZ processor.
35     *
36     *      testXYZ:        A machine with an XYZ processor, and some experimental
37     *                      devices connected to it.
38     *
39     *  The experimental devices in the test machines are:
40     *
41     *      cons            A serial I/O console device.
42     *      disk            A device for reading/writing (emulated) disk sectors.
43     *      ether           An ethernet device, for sending/receiving ethernet
44     *                      frames on an emulated network.
45     *      fb              Framebuffer (24-bit RGB per pixel).
46     *      irqc            A generic interrupt controller.
47     *      mp              A multiprocessor controller.
48     *      rtc             A real-time clock device.
49   */   */
50    
51  #include <stdio.h>  #include <stdio.h>
# Line 40  Line 57 
57  #include "memory.h"  #include "memory.h"
58  #include "misc.h"  #include "misc.h"
59    
60    #include "sh4_exception.h"
61    
62  #include "testmachine/dev_cons.h"  #include "testmachine/dev_cons.h"
63  #include "testmachine/dev_disk.h"  #include "testmachine/dev_disk.h"
64  #include "testmachine/dev_ether.h"  #include "testmachine/dev_ether.h"
65  #include "testmachine/dev_fb.h"  #include "testmachine/dev_fb.h"
66    #include "testmachine/dev_irqc.h"
67  #include "testmachine/dev_mp.h"  #include "testmachine/dev_mp.h"
68  #include "testmachine/dev_rtc.h"  #include "testmachine/dev_rtc.h"
69    
70    
71    /*
72     *  default_test():
73     *
74     *  Initializes devices for most test machines. (Note: MIPS is different,
75     *  because of legacy reasons.)
76     */
77  static void default_test(struct machine *machine, struct cpu *cpu)  static void default_test(struct machine *machine, struct cpu *cpu)
78  {  {
79          char tmpstr[1000];          char tmpstr[1000];
80            char base_irq[1000];
81            char end_of_base_irq[50];
82    
83            /*
84             *  First add the interrupt controller. Most processor architectures
85             *  in GXemul have only 1 interrupt pin on the CPU, and it is simply
86             *  called "emul[x].machine[y].cpu[z]".
87             *
88             *  MIPS is an exception, dealt with in a separate setup function.
89             *  ARM and SH are dealt with here.
90             */
91    
92            switch (machine->arch) {
93    
94          snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=none",          case ARCH_ARM:
95              (uint64_t) DEV_CONS_ADDRESS);                  snprintf(end_of_base_irq, sizeof(end_of_base_irq), ".irq");
96                    break;
97    
98            case ARCH_SH:
99                    snprintf(end_of_base_irq, sizeof(end_of_base_irq),
100                        ".irq[0x%x]", SH4_INTEVT_IRQ15);
101                    break;
102    
103            default:
104                    end_of_base_irq[0] = '\0';
105            }
106    
107            snprintf(base_irq, sizeof(base_irq), "%s.cpu[%i]%s",
108                machine->path, machine->bootstrap_cpu, end_of_base_irq);
109    
110            snprintf(tmpstr, sizeof(tmpstr), "irqc addr=0x%"PRIx64" irq=%s",
111                (uint64_t) DEV_IRQC_ADDRESS, base_irq);
112            device_add(machine, tmpstr);
113    
114    
115            /*  Now, add the other devices:  */
116    
117            snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64
118                " irq=%s.irqc.2 in_use=%i",
119                (uint64_t) DEV_CONS_ADDRESS, base_irq, machine->arch != ARCH_SH);
120          machine->main_console_handle = (size_t)device_add(machine, tmpstr);          machine->main_console_handle = (size_t)device_add(machine, tmpstr);
121    
122          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64" irq=%s%sirqc.6",
123              (uint64_t) DEV_MP_ADDRESS);              (uint64_t) DEV_MP_ADDRESS,
124                end_of_base_irq[0]? end_of_base_irq + 1 : "",
125                end_of_base_irq[0]? "." : "");
126          device_add(machine, tmpstr);          device_add(machine, tmpstr);
127    
128          snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64,          snprintf(tmpstr, sizeof(tmpstr), "fbctrl addr=0x%"PRIx64,
# Line 68  static void default_test(struct machine Line 133  static void default_test(struct machine
133              (uint64_t) DEV_DISK_ADDRESS);              (uint64_t) DEV_DISK_ADDRESS);
134          device_add(machine, tmpstr);          device_add(machine, tmpstr);
135    
136          snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=none",          snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=%s.irqc.3",
137              (uint64_t) DEV_ETHER_ADDRESS);              (uint64_t) DEV_ETHER_ADDRESS, base_irq);
138          device_add(machine, tmpstr);          device_add(machine, tmpstr);
139    
140          snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=none",          snprintf(tmpstr, sizeof(tmpstr), "rtc addr=0x%"PRIx64" irq=%s.irqc.4",
141              (uint64_t) DEV_RTC_ADDRESS);              (uint64_t) DEV_RTC_ADDRESS, base_irq);
142          device_add(machine, tmpstr);          device_add(machine, tmpstr);
143  }  }
144    
# Line 81  static void default_test(struct machine Line 146  static void default_test(struct machine
146  MACHINE_SETUP(barealpha)  MACHINE_SETUP(barealpha)
147  {  {
148          machine->machine_name = "Generic \"bare\" Alpha machine";          machine->machine_name = "Generic \"bare\" Alpha machine";
         machine->stable = 1;  
149  }  }
150    
151    
152  MACHINE_SETUP(testalpha)  MACHINE_SETUP(testalpha)
153  {  {
154          machine->machine_name = "Alpha test machine";          machine->machine_name = "Alpha test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for Alpha?  */  
155    
156          default_test(machine, cpu);          default_test(machine, cpu);
157  }  }
# Line 129  MACHINE_REGISTER(testalpha) Line 190  MACHINE_REGISTER(testalpha)
190  MACHINE_SETUP(barearm)  MACHINE_SETUP(barearm)
191  {  {
192          machine->machine_name = "Generic \"bare\" ARM machine";          machine->machine_name = "Generic \"bare\" ARM machine";
         machine->stable = 1;  
193  }  }
194    
195    
196  MACHINE_SETUP(testarm)  MACHINE_SETUP(testarm)
197  {  {
198          machine->machine_name = "ARM test machine";          machine->machine_name = "ARM test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for ARM?  */  
199    
200          default_test(machine, cpu);          default_test(machine, cpu);
201    
# Line 188  MACHINE_REGISTER(testarm) Line 245  MACHINE_REGISTER(testarm)
245  MACHINE_SETUP(barem88k)  MACHINE_SETUP(barem88k)
246  {  {
247          machine->machine_name = "Generic \"bare\" M88K machine";          machine->machine_name = "Generic \"bare\" M88K machine";
         machine->stable = 1;  
248  }  }
249    
250    
251  MACHINE_SETUP(testm88k)  MACHINE_SETUP(testm88k)
252  {  {
253          machine->machine_name = "M88K test machine";          machine->machine_name = "M88K test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for M88K?  */  
254    
255          default_test(machine, cpu);          default_test(machine, cpu);
256  }  }
# Line 236  MACHINE_REGISTER(testm88k) Line 289  MACHINE_REGISTER(testm88k)
289  MACHINE_SETUP(baremips)  MACHINE_SETUP(baremips)
290  {  {
291          machine->machine_name = "Generic \"bare\" MIPS machine";          machine->machine_name = "Generic \"bare\" MIPS machine";
         machine->stable = 1;  
292          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
293  }  }
294    
# Line 261  MACHINE_SETUP(testmips) Line 313  MACHINE_SETUP(testmips)
313          char tmpstr[300];          char tmpstr[300];
314    
315          machine->machine_name = "MIPS test machine";          machine->machine_name = "MIPS test machine";
         machine->stable = 1;  
316          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
317    
318          snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=%s."          snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=%s."
# Line 269  MACHINE_SETUP(testmips) Line 320  MACHINE_SETUP(testmips)
320              machine->bootstrap_cpu);              machine->bootstrap_cpu);
321          machine->main_console_handle = (size_t)device_add(machine, tmpstr);          machine->main_console_handle = (size_t)device_add(machine, tmpstr);
322    
323          snprintf(tmpstr, sizeof(tmpstr), "mp irq=6 addr=0x%"PRIx64,          snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64" irq=6",
324              (uint64_t) DEV_MP_ADDRESS);              (uint64_t) DEV_MP_ADDRESS);
325          device_add(machine, tmpstr);          device_add(machine, tmpstr);
326    
# Line 326  MACHINE_REGISTER(testmips) Line 377  MACHINE_REGISTER(testmips)
377  MACHINE_SETUP(bareppc)  MACHINE_SETUP(bareppc)
378  {  {
379          machine->machine_name = "Generic \"bare\" PPC machine";          machine->machine_name = "Generic \"bare\" PPC machine";
         machine->stable = 1;  
380  }  }
381    
382    
383  MACHINE_SETUP(testppc)  MACHINE_SETUP(testppc)
384  {  {
385          machine->machine_name = "PPC test machine";          machine->machine_name = "PPC test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for PPC?  */  
386    
387          default_test(machine, cpu);          default_test(machine, cpu);
388  }  }
# Line 373  MACHINE_REGISTER(testppc) Line 420  MACHINE_REGISTER(testppc)
420  MACHINE_SETUP(baresh)  MACHINE_SETUP(baresh)
421  {  {
422          machine->machine_name = "Generic \"bare\" SH machine";          machine->machine_name = "Generic \"bare\" SH machine";
         machine->stable = 1;  
423  }  }
424    
425    
426  MACHINE_SETUP(testsh)  MACHINE_SETUP(testsh)
427  {  {
428          machine->machine_name = "SH test machine";          machine->machine_name = "SH test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for SH?  */  
429    
430          default_test(machine, cpu);          default_test(machine, cpu);
431  }  }
# Line 420  MACHINE_REGISTER(testsh) Line 463  MACHINE_REGISTER(testsh)
463  MACHINE_SETUP(baresparc)  MACHINE_SETUP(baresparc)
464  {  {
465          machine->machine_name = "Generic \"bare\" SPARC machine";          machine->machine_name = "Generic \"bare\" SPARC machine";
         machine->stable = 1;  
466  }  }
467    
468    
469  MACHINE_SETUP(testsparc)  MACHINE_SETUP(testsparc)
470  {  {
471          machine->machine_name = "SPARC test machine";          machine->machine_name = "SPARC test machine";
         machine->stable = 1;  
   
         /*  TODO: interrupt for SPARC?  */  
472    
473          default_test(machine, cpu);          default_test(machine, cpu);
474  }  }
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