src/machines/machine_test.c

/*
 *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: machine_test.c,v 1.14 2006/06/24 10:19:19 debug Exp $
 *
 *  Various "test" machines (bare machines with just a CPU, or a bare machine
 *  plus some experimental devices).
 */

#include <stdio.h>
#include <string.h>

#include "cpu.h"
#include "device.h"
#include "devices.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "testmachine/dev_cons.h"
#include "testmachine/dev_disk.h"
#include "testmachine/dev_ether.h"
#include "testmachine/dev_fb.h"
#include "testmachine/dev_mp.h"


static void default_test(struct machine *machine, struct cpu *cpu)
{
        char tmpstr[1000];

        snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=0",
            (uint64_t) DEV_CONS_ADDRESS);
        machine->main_console_handle = (size_t)device_add(machine, tmpstr);

        snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,
            (uint64_t) DEV_MP_ADDRESS);
        device_add(machine, tmpstr);

        dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC,
            640,480, 640,480, 24, "generic"); 

        snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64,
            (uint64_t) DEV_DISK_ADDRESS);
        device_add(machine, tmpstr);

        snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=0",
            (uint64_t) DEV_ETHER_ADDRESS);
        device_add(machine, tmpstr);
}


MACHINE_SETUP(barealpha)
{
        machine->machine_name = "Generic \"bare\" Alpha machine";
        machine->stable = 1;
}


MACHINE_SETUP(testalpha)
{
        machine->machine_name = "Alpha test machine";
        machine->stable = 1;

        /*  TODO: interrupt for Alpha?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(barealpha)
{
        machine->cpu_name = strdup("21264");
}


MACHINE_DEFAULT_CPU(testalpha)
{
        machine->cpu_name = strdup("21264");
}


MACHINE_REGISTER(barealpha)
{
        MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine",
            ARCH_ALPHA, MACHINE_BAREALPHA);

        machine_entry_add_alias(me, "barealpha");
}


MACHINE_REGISTER(testalpha)
{
        MR_DEFAULT(testalpha, "Test-machine for Alpha",
            ARCH_ALPHA, MACHINE_TESTALPHA);

        machine_entry_add_alias(me, "testalpha");
}


MACHINE_SETUP(barearm)
{
        machine->machine_name = "Generic \"bare\" ARM machine";
        machine->stable = 1;
}


MACHINE_SETUP(testarm)
{
        machine->machine_name = "ARM test machine";
        machine->stable = 1;

        /*  TODO: interrupt for ARM?  */

        default_test(machine, cpu);

        /*
         *  Place a tiny stub at end of memory, and set the link register to
         *  point to it. This stub halts the machine (making it easy to try
         *  out simple stand-alone C functions).
         */
        cpu->cd.arm.r[ARM_SP] = machine->physical_ram_in_mb * 1048576 - 4096;
        cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32;
        store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201);
        store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010);
        store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, 0xeafffffe);
}


MACHINE_DEFAULT_CPU(barearm)
{
        machine->cpu_name = strdup("SA1110");
}


MACHINE_DEFAULT_CPU(testarm)
{
        machine->cpu_name = strdup("SA1110");
}


MACHINE_REGISTER(barearm)
{
        MR_DEFAULT(barearm, "Generic \"bare\" ARM machine",
            ARCH_ARM, MACHINE_BAREARM);

        machine_entry_add_alias(me, "barearm");
}


MACHINE_REGISTER(testarm)
{
        MR_DEFAULT(testarm, "Test-machine for ARM", ARCH_ARM, MACHINE_TESTARM);

        machine_entry_add_alias(me, "testarm");
}


MACHINE_SETUP(barehppa)
{
        machine->machine_name = "Generic \"bare\" HPPA machine";
        machine->stable = 1;
}


MACHINE_SETUP(testhppa)
{
        machine->machine_name = "HPPA test machine";
        machine->stable = 1;

        /*  TODO: interrupt for HPPA?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(barehppa)
{
        machine->cpu_name = strdup("HPPA");
}


MACHINE_DEFAULT_CPU(testhppa)
{
        machine->cpu_name = strdup("HPPA");
}


MACHINE_REGISTER(barehppa)
{
        MR_DEFAULT(barehppa, "Generic \"bare\" HPPA machine",
            ARCH_HPPA, MACHINE_BAREHPPA);

        machine_entry_add_alias(me, "barehppa");
}


MACHINE_REGISTER(testhppa)
{
        MR_DEFAULT(testhppa, "Test-machine for HPPA",
            ARCH_HPPA, MACHINE_TESTHPPA);

        machine_entry_add_alias(me, "testhppa");
}


MACHINE_SETUP(barei960)
{
        machine->machine_name = "Generic \"bare\" i960 machine";
        machine->stable = 1;
}


MACHINE_SETUP(testi960)
{
        machine->machine_name = "i960 test machine";
        machine->stable = 1;

        /*  TODO: interrupt for i960?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(barei960)
{
        machine->cpu_name = strdup("i960");
}


MACHINE_DEFAULT_CPU(testi960)
{
        machine->cpu_name = strdup("i960");
}


MACHINE_REGISTER(barei960)
{
        MR_DEFAULT(barei960, "Generic \"bare\" i960 machine",
            ARCH_I960, MACHINE_BAREI960);

        machine_entry_add_alias(me, "barei960");
}


MACHINE_REGISTER(testi960)
{
        MR_DEFAULT(testi960, "Test-machine for i960",
            ARCH_I960, MACHINE_TESTI960);

        machine_entry_add_alias(me, "testi960");
}


MACHINE_SETUP(bareia64)
{
        machine->machine_name = "Generic \"bare\" IA64 machine";
        machine->stable = 1;
}


MACHINE_SETUP(testia64)
{
        machine->machine_name = "IA64 test machine";
        machine->stable = 1;

        /*  TODO: interrupt for IA64?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(bareia64)
{
        machine->cpu_name = strdup("IA64");
}


MACHINE_DEFAULT_CPU(testia64)
{
        machine->cpu_name = strdup("IA64");
}


MACHINE_REGISTER(bareia64)
{
        MR_DEFAULT(bareia64, "Generic \"bare\" IA64 machine",
            ARCH_IA64, MACHINE_BAREIA64);

        machine_entry_add_alias(me, "bareia64");
}


MACHINE_REGISTER(testia64)
{
        MR_DEFAULT(testia64, "Test-machine for IA64",
            ARCH_IA64, MACHINE_TESTIA64);

        machine_entry_add_alias(me, "testia64");
}


MACHINE_SETUP(barem68k)
{
        machine->machine_name = "Generic \"bare\" M68K machine";
        machine->stable = 1;
}


MACHINE_SETUP(testm68k)
{
        machine->machine_name = "M68K test machine";
        machine->stable = 1;

        /*  TODO: interrupt for M68K?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(barem68k)
{
        machine->cpu_name = strdup("68020");
}


MACHINE_DEFAULT_CPU(testm68k)
{
        machine->cpu_name = strdup("68020");
}


MACHINE_REGISTER(barem68k)
{
        MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine",
            ARCH_M68K, MACHINE_BAREM68K);

        machine_entry_add_alias(me, "barem68k");
}


MACHINE_REGISTER(testm68k)
{
        MR_DEFAULT(testm68k, "Test-machine for M68K",
            ARCH_M68K, MACHINE_TESTM68K);

        machine_entry_add_alias(me, "testm68k");
}


MACHINE_SETUP(baremips)
{
        machine->machine_name = "Generic \"bare\" MIPS machine";
        machine->stable = 1;
        cpu->byte_order = EMUL_BIG_ENDIAN;
}


MACHINE_SETUP(testmips)
{
        /*
         *  A MIPS test machine (which happens to work with the
         *  code in my master's thesis).  :-)
         *
         *  IRQ map:
         *      7       CPU counter
         *      6       SMP IPIs
         *      5       not used yet
         *      4       not used yet
         *      3       ethernet  
         *      2       serial console
         */

        char tmpstr[1000];

        machine->machine_name = "MIPS test machine";
        machine->stable = 1;
        cpu->byte_order = EMUL_BIG_ENDIAN;

        snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=2",
            (uint64_t) DEV_CONS_ADDRESS);
        machine->main_console_handle = (size_t)device_add(machine, tmpstr);

        snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,
            (uint64_t) DEV_MP_ADDRESS);
        device_add(machine, tmpstr);

        dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC,
            640,480, 640,480, 24, "testmips generic"); 

        snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64,
            (uint64_t) DEV_DISK_ADDRESS);
        device_add(machine, tmpstr);

        snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=3",
            (uint64_t) DEV_ETHER_ADDRESS);
        device_add(machine, tmpstr);
}


MACHINE_DEFAULT_CPU(baremips)
{
        machine->cpu_name = strdup("5Kc");
}


MACHINE_DEFAULT_CPU(testmips)
{
        machine->cpu_name = strdup("5Kc");
}


MACHINE_REGISTER(baremips)
{
        MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine",
            ARCH_MIPS, MACHINE_BAREMIPS);

        machine_entry_add_alias(me, "baremips");
}


MACHINE_REGISTER(testmips)
{
        MR_DEFAULT(testmips, "Test-machine for MIPS",
            ARCH_MIPS, MACHINE_TESTMIPS);

        machine_entry_add_alias(me, "testmips");
}


MACHINE_SETUP(bareppc)
{
        machine->machine_name = "Generic \"bare\" PPC machine";
        machine->stable = 1;
}


MACHINE_SETUP(testppc)
{
        machine->machine_name = "PPC test machine";
        machine->stable = 1;

        /*  TODO: interrupt for PPC?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(bareppc)
{
        machine->cpu_name = strdup("PPC970");
}


MACHINE_DEFAULT_CPU(testppc)
{
        machine->cpu_name = strdup("PPC970");
}


MACHINE_REGISTER(bareppc)
{
        MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine",
            ARCH_PPC, MACHINE_BAREPPC);

        machine_entry_add_alias(me, "bareppc");
}


MACHINE_REGISTER(testppc)
{
        MR_DEFAULT(testppc, "Test-machine for PPC", ARCH_PPC, MACHINE_TESTPPC);

        machine_entry_add_alias(me, "testppc");
}


MACHINE_SETUP(baresh)
{
        machine->machine_name = "Generic \"bare\" SH machine";
        machine->stable = 1;
}


MACHINE_SETUP(testsh)
{
        machine->machine_name = "SH test machine";
        machine->stable = 1;

        /*  TODO: interrupt for SH?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(baresh)
{
        machine->cpu_name = strdup("SH");
}


MACHINE_DEFAULT_CPU(testsh)
{
        machine->cpu_name = strdup("SH");
}


MACHINE_REGISTER(baresh)
{
        MR_DEFAULT(baresh, "Generic \"bare\" SH machine",
            ARCH_SH, MACHINE_BARESH);

        machine_entry_add_alias(me, "baresh");
}


MACHINE_REGISTER(testsh)
{
        MR_DEFAULT(testsh, "Test-machine for SH", ARCH_SH, MACHINE_TESTSH);

        machine_entry_add_alias(me, "testsh");
}


MACHINE_SETUP(baresparc)
{
        machine->machine_name = "Generic \"bare\" SPARC machine";
        machine->stable = 1;
}


MACHINE_SETUP(testsparc)
{
        machine->machine_name = "SPARC test machine";
        machine->stable = 1;

        /*  TODO: interrupt for SPARC?  */

        default_test(machine, cpu);
}


MACHINE_DEFAULT_CPU(baresparc)
{
        machine->cpu_name = strdup("UltraSPARC");
}


MACHINE_DEFAULT_CPU(testsparc)
{
        machine->cpu_name = strdup("UltraSPARC");
}


MACHINE_REGISTER(baresparc)
{
        MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine",
            ARCH_SPARC, MACHINE_BARESPARC);

        machine_entry_add_alias(me, "baresparc");
}


MACHINE_REGISTER(testsparc)
{
        MR_DEFAULT(testsparc, "Test-machine for SPARC",
            ARCH_SPARC, MACHINE_TESTSPARC);

        machine_entry_add_alias(me, "testsparc");
}

1	dpavlin	22	/*
2			* Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	26	* $Id: machine_test.c,v 1.14 2006/06/24 10:19:19 debug Exp $
29	dpavlin	22	*
30			* Various "test" machines (bare machines with just a CPU, or a bare machine
31			* plus some experimental devices).
32			*/
33
34			#include <stdio.h>
35			#include <string.h>
36
37			#include "cpu.h"
38			#include "device.h"
39			#include "devices.h"
40			#include "machine.h"
41			#include "memory.h"
42			#include "misc.h"
43
44	dpavlin	24	#include "testmachine/dev_cons.h"
45			#include "testmachine/dev_disk.h"
46			#include "testmachine/dev_ether.h"
47			#include "testmachine/dev_fb.h"
48			#include "testmachine/dev_mp.h"
49	dpavlin	22
50	dpavlin	24
51	dpavlin	22	static void default_test(struct machine machine, struct cpu cpu)
52			{
53			char tmpstr[1000];
54	dpavlin	24
55			snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=0",
56			(uint64_t) DEV_CONS_ADDRESS);
57	dpavlin	22	machine->main_console_handle = (size_t)device_add(machine, tmpstr);
58
59	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,
60			(uint64_t) DEV_MP_ADDRESS);
61	dpavlin	22	device_add(machine, tmpstr);
62
63			dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC,
64	dpavlin	24	640,480, 640,480, 24, "generic");
65	dpavlin	22
66	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64,
67			(uint64_t) DEV_DISK_ADDRESS);
68	dpavlin	22	device_add(machine, tmpstr);
69
70	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=0",
71			(uint64_t) DEV_ETHER_ADDRESS);
72	dpavlin	22	device_add(machine, tmpstr);
73			}
74
75
76			MACHINE_SETUP(barealpha)
77			{
78			machine->machine_name = "Generic \"bare\" Alpha machine";
79			machine->stable = 1;
80			}
81
82
83			MACHINE_SETUP(testalpha)
84			{
85			machine->machine_name = "Alpha test machine";
86			machine->stable = 1;
87
88			/* TODO: interrupt for Alpha? */
89
90			default_test(machine, cpu);
91			}
92
93
94			MACHINE_DEFAULT_CPU(barealpha)
95			{
96	dpavlin	24	machine->cpu_name = strdup("21264");
97	dpavlin	22	}
98
99
100			MACHINE_DEFAULT_CPU(testalpha)
101			{
102	dpavlin	24	machine->cpu_name = strdup("21264");
103	dpavlin	22	}
104
105
106			MACHINE_REGISTER(barealpha)
107			{
108			MR_DEFAULT(barealpha, "Generic \"bare\" Alpha machine",
109	dpavlin	26	ARCH_ALPHA, MACHINE_BAREALPHA);
110
111			machine_entry_add_alias(me, "barealpha");
112	dpavlin	22	}
113
114
115			MACHINE_REGISTER(testalpha)
116			{
117			MR_DEFAULT(testalpha, "Test-machine for Alpha",
118	dpavlin	26	ARCH_ALPHA, MACHINE_TESTALPHA);
119
120			machine_entry_add_alias(me, "testalpha");
121	dpavlin	22	}
122
123
124			MACHINE_SETUP(barearm)
125			{
126			machine->machine_name = "Generic \"bare\" ARM machine";
127			machine->stable = 1;
128			}
129
130
131			MACHINE_SETUP(testarm)
132			{
133			machine->machine_name = "ARM test machine";
134			machine->stable = 1;
135
136			/* TODO: interrupt for ARM? */
137
138			default_test(machine, cpu);
139
140			/*
141			* Place a tiny stub at end of memory, and set the link register to
142			* point to it. This stub halts the machine (making it easy to try
143			* out simple stand-alone C functions).
144			*/
145			cpu->cd.arm.r[ARM_SP] = machine->physical_ram_in_mb * 1048576 - 4096;
146			cpu->cd.arm.r[ARM_LR] = cpu->cd.arm.r[ARM_SP] + 32;
147			store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 0, 0xe3a00201);
148			store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 4, 0xe5c00010);
149			store_32bit_word(cpu, cpu->cd.arm.r[ARM_LR] + 8, 0xeafffffe);
150			}
151
152
153			MACHINE_DEFAULT_CPU(barearm)
154			{
155			machine->cpu_name = strdup("SA1110");
156			}
157
158
159			MACHINE_DEFAULT_CPU(testarm)
160			{
161			machine->cpu_name = strdup("SA1110");
162			}
163
164
165			MACHINE_REGISTER(barearm)
166			{
167			MR_DEFAULT(barearm, "Generic \"bare\" ARM machine",
168	dpavlin	26	ARCH_ARM, MACHINE_BAREARM);
169
170			machine_entry_add_alias(me, "barearm");
171	dpavlin	22	}
172
173
174			MACHINE_REGISTER(testarm)
175			{
176	dpavlin	26	MR_DEFAULT(testarm, "Test-machine for ARM", ARCH_ARM, MACHINE_TESTARM);
177
178			machine_entry_add_alias(me, "testarm");
179	dpavlin	22	}
180
181
182
183			MACHINE_SETUP(barehppa)
184			{
185			machine->machine_name = "Generic \"bare\" HPPA machine";
186			machine->stable = 1;
187			}
188
189
190			MACHINE_SETUP(testhppa)
191			{
192			machine->machine_name = "HPPA test machine";
193			machine->stable = 1;
194
195			/* TODO: interrupt for HPPA? */
196
197			default_test(machine, cpu);
198			}
199
200
201			MACHINE_DEFAULT_CPU(barehppa)
202			{
203			machine->cpu_name = strdup("HPPA");
204			}
205
206
207			MACHINE_DEFAULT_CPU(testhppa)
208			{
209			machine->cpu_name = strdup("HPPA");
210			}
211
212
213			MACHINE_REGISTER(barehppa)
214			{
215			MR_DEFAULT(barehppa, "Generic \"bare\" HPPA machine",
216	dpavlin	26	ARCH_HPPA, MACHINE_BAREHPPA);
217
218			machine_entry_add_alias(me, "barehppa");
219	dpavlin	22	}
220
221
222			MACHINE_REGISTER(testhppa)
223			{
224			MR_DEFAULT(testhppa, "Test-machine for HPPA",
225	dpavlin	26	ARCH_HPPA, MACHINE_TESTHPPA);
226
227			machine_entry_add_alias(me, "testhppa");
228	dpavlin	22	}
229
230
231			MACHINE_SETUP(barei960)
232			{
233			machine->machine_name = "Generic \"bare\" i960 machine";
234			machine->stable = 1;
235			}
236
237
238			MACHINE_SETUP(testi960)
239			{
240			machine->machine_name = "i960 test machine";
241			machine->stable = 1;
242
243			/* TODO: interrupt for i960? */
244
245			default_test(machine, cpu);
246			}
247
248
249			MACHINE_DEFAULT_CPU(barei960)
250			{
251			machine->cpu_name = strdup("i960");
252			}
253
254
255			MACHINE_DEFAULT_CPU(testi960)
256			{
257			machine->cpu_name = strdup("i960");
258			}
259
260
261			MACHINE_REGISTER(barei960)
262			{
263			MR_DEFAULT(barei960, "Generic \"bare\" i960 machine",
264	dpavlin	26	ARCH_I960, MACHINE_BAREI960);
265
266			machine_entry_add_alias(me, "barei960");
267	dpavlin	22	}
268
269
270			MACHINE_REGISTER(testi960)
271			{
272			MR_DEFAULT(testi960, "Test-machine for i960",
273	dpavlin	26	ARCH_I960, MACHINE_TESTI960);
274
275			machine_entry_add_alias(me, "testi960");
276	dpavlin	22	}
277
278
279			MACHINE_SETUP(bareia64)
280			{
281			machine->machine_name = "Generic \"bare\" IA64 machine";
282			machine->stable = 1;
283			}
284
285
286			MACHINE_SETUP(testia64)
287			{
288			machine->machine_name = "IA64 test machine";
289			machine->stable = 1;
290
291			/* TODO: interrupt for IA64? */
292
293			default_test(machine, cpu);
294			}
295
296
297			MACHINE_DEFAULT_CPU(bareia64)
298			{
299			machine->cpu_name = strdup("IA64");
300			}
301
302
303			MACHINE_DEFAULT_CPU(testia64)
304			{
305			machine->cpu_name = strdup("IA64");
306			}
307
308
309			MACHINE_REGISTER(bareia64)
310			{
311			MR_DEFAULT(bareia64, "Generic \"bare\" IA64 machine",
312	dpavlin	26	ARCH_IA64, MACHINE_BAREIA64);
313
314			machine_entry_add_alias(me, "bareia64");
315	dpavlin	22	}
316
317
318			MACHINE_REGISTER(testia64)
319			{
320			MR_DEFAULT(testia64, "Test-machine for IA64",
321	dpavlin	26	ARCH_IA64, MACHINE_TESTIA64);
322
323			machine_entry_add_alias(me, "testia64");
324	dpavlin	22	}
325
326
327			MACHINE_SETUP(barem68k)
328			{
329			machine->machine_name = "Generic \"bare\" M68K machine";
330			machine->stable = 1;
331			}
332
333
334			MACHINE_SETUP(testm68k)
335			{
336			machine->machine_name = "M68K test machine";
337			machine->stable = 1;
338
339			/* TODO: interrupt for M68K? */
340
341			default_test(machine, cpu);
342			}
343
344
345			MACHINE_DEFAULT_CPU(barem68k)
346			{
347			machine->cpu_name = strdup("68020");
348			}
349
350
351			MACHINE_DEFAULT_CPU(testm68k)
352			{
353			machine->cpu_name = strdup("68020");
354			}
355
356
357			MACHINE_REGISTER(barem68k)
358			{
359			MR_DEFAULT(barem68k, "Generic \"bare\" M68K machine",
360	dpavlin	26	ARCH_M68K, MACHINE_BAREM68K);
361
362			machine_entry_add_alias(me, "barem68k");
363	dpavlin	22	}
364
365
366			MACHINE_REGISTER(testm68k)
367			{
368			MR_DEFAULT(testm68k, "Test-machine for M68K",
369	dpavlin	26	ARCH_M68K, MACHINE_TESTM68K);
370
371			machine_entry_add_alias(me, "testm68k");
372	dpavlin	22	}
373
374
375			MACHINE_SETUP(baremips)
376			{
377			machine->machine_name = "Generic \"bare\" MIPS machine";
378			machine->stable = 1;
379			cpu->byte_order = EMUL_BIG_ENDIAN;
380			}
381
382
383			MACHINE_SETUP(testmips)
384			{
385			/*
386			* A MIPS test machine (which happens to work with the
387			* code in my master's thesis). :-)
388			*
389			* IRQ map:
390			* 7 CPU counter
391			* 6 SMP IPIs
392			* 5 not used yet
393			* 4 not used yet
394			* 3 ethernet
395			* 2 serial console
396			*/
397
398			char tmpstr[1000];
399
400			machine->machine_name = "MIPS test machine";
401			machine->stable = 1;
402			cpu->byte_order = EMUL_BIG_ENDIAN;
403
404	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "cons addr=0x%"PRIx64" irq=2",
405			(uint64_t) DEV_CONS_ADDRESS);
406	dpavlin	22	machine->main_console_handle = (size_t)device_add(machine, tmpstr);
407
408	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "mp addr=0x%"PRIx64,
409			(uint64_t) DEV_MP_ADDRESS);
410	dpavlin	22	device_add(machine, tmpstr);
411
412			dev_fb_init(machine, machine->memory, DEV_FB_ADDRESS, VFB_GENERIC,
413			640,480, 640,480, 24, "testmips generic");
414
415	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "disk addr=0x%"PRIx64,
416			(uint64_t) DEV_DISK_ADDRESS);
417	dpavlin	22	device_add(machine, tmpstr);
418
419	dpavlin	24	snprintf(tmpstr, sizeof(tmpstr), "ether addr=0x%"PRIx64" irq=3",
420			(uint64_t) DEV_ETHER_ADDRESS);
421	dpavlin	22	device_add(machine, tmpstr);
422			}
423
424
425			MACHINE_DEFAULT_CPU(baremips)
426			{
427	dpavlin	24	machine->cpu_name = strdup("5Kc");
428	dpavlin	22	}
429
430
431			MACHINE_DEFAULT_CPU(testmips)
432			{
433	dpavlin	24	machine->cpu_name = strdup("5Kc");
434	dpavlin	22	}
435
436
437			MACHINE_REGISTER(baremips)
438			{
439			MR_DEFAULT(baremips, "Generic \"bare\" MIPS machine",
440	dpavlin	26	ARCH_MIPS, MACHINE_BAREMIPS);
441
442			machine_entry_add_alias(me, "baremips");
443	dpavlin	22	}
444
445
446			MACHINE_REGISTER(testmips)
447			{
448			MR_DEFAULT(testmips, "Test-machine for MIPS",
449	dpavlin	26	ARCH_MIPS, MACHINE_TESTMIPS);
450
451			machine_entry_add_alias(me, "testmips");
452	dpavlin	22	}
453
454
455			MACHINE_SETUP(bareppc)
456			{
457			machine->machine_name = "Generic \"bare\" PPC machine";
458			machine->stable = 1;
459			}
460
461
462			MACHINE_SETUP(testppc)
463			{
464			machine->machine_name = "PPC test machine";
465			machine->stable = 1;
466
467			/* TODO: interrupt for PPC? */
468
469			default_test(machine, cpu);
470			}
471
472
473			MACHINE_DEFAULT_CPU(bareppc)
474			{
475			machine->cpu_name = strdup("PPC970");
476			}
477
478
479			MACHINE_DEFAULT_CPU(testppc)
480			{
481			machine->cpu_name = strdup("PPC970");
482			}
483
484
485			MACHINE_REGISTER(bareppc)
486			{
487			MR_DEFAULT(bareppc, "Generic \"bare\" PPC machine",
488	dpavlin	26	ARCH_PPC, MACHINE_BAREPPC);
489
490			machine_entry_add_alias(me, "bareppc");
491	dpavlin	22	}
492
493
494			MACHINE_REGISTER(testppc)
495			{
496	dpavlin	26	MR_DEFAULT(testppc, "Test-machine for PPC", ARCH_PPC, MACHINE_TESTPPC);
497
498			machine_entry_add_alias(me, "testppc");
499	dpavlin	22	}
500
501
502			MACHINE_SETUP(baresh)
503			{
504			machine->machine_name = "Generic \"bare\" SH machine";
505			machine->stable = 1;
506			}
507
508
509			MACHINE_SETUP(testsh)
510			{
511			machine->machine_name = "SH test machine";
512			machine->stable = 1;
513
514			/* TODO: interrupt for SH? */
515
516			default_test(machine, cpu);
517			}
518
519
520			MACHINE_DEFAULT_CPU(baresh)
521			{
522			machine->cpu_name = strdup("SH");
523			}
524
525
526			MACHINE_DEFAULT_CPU(testsh)
527			{
528			machine->cpu_name = strdup("SH");
529			}
530
531
532			MACHINE_REGISTER(baresh)
533			{
534			MR_DEFAULT(baresh, "Generic \"bare\" SH machine",
535	dpavlin	26	ARCH_SH, MACHINE_BARESH);
536
537			machine_entry_add_alias(me, "baresh");
538	dpavlin	22	}
539
540
541			MACHINE_REGISTER(testsh)
542			{
543	dpavlin	26	MR_DEFAULT(testsh, "Test-machine for SH", ARCH_SH, MACHINE_TESTSH);
544
545			machine_entry_add_alias(me, "testsh");
546	dpavlin	22	}
547
548
549			MACHINE_SETUP(baresparc)
550			{
551			machine->machine_name = "Generic \"bare\" SPARC machine";
552			machine->stable = 1;
553			}
554
555
556			MACHINE_SETUP(testsparc)
557			{
558			machine->machine_name = "SPARC test machine";
559			machine->stable = 1;
560
561			/* TODO: interrupt for SPARC? */
562
563			default_test(machine, cpu);
564			}
565
566
567			MACHINE_DEFAULT_CPU(baresparc)
568			{
569	dpavlin	24	machine->cpu_name = strdup("UltraSPARC");
570	dpavlin	22	}
571
572
573			MACHINE_DEFAULT_CPU(testsparc)
574			{
575	dpavlin	24	machine->cpu_name = strdup("UltraSPARC");
576	dpavlin	22	}
577
578
579			MACHINE_REGISTER(baresparc)
580			{
581			MR_DEFAULT(baresparc, "Generic \"bare\" SPARC machine",
582	dpavlin	26	ARCH_SPARC, MACHINE_BARESPARC);
583
584			machine_entry_add_alias(me, "baresparc");
585	dpavlin	22	}
586
587
588			MACHINE_REGISTER(testsparc)
589			{
590			MR_DEFAULT(testsparc, "Test-machine for SPARC",
591	dpavlin	26	ARCH_SPARC, MACHINE_TESTSPARC);
592
593			machine_entry_add_alias(me, "testsparc");
594	dpavlin	22	}
595