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++ trunk/HISTORY (local) $Id: HISTORY,v 1.1497 2007/03/18 03:41:36 debug Exp $ 20070224 Minor update to the initialization of the ns16550 in machine_walnut.c, to allow that machine type to boot with the new interrupt system (although it is still a dummy machine). Adding a wdc at 0x14000000 to machine_landisk.c, and fixing the SCIF serial interrupts of the SH4 cpu enough to get NetBSD/landisk booting from a disk image :-) Adding a preliminary install instruction skeleton to guestoses.html. 20070306 Adding SH-IPL+G PROM emulation, and also passing the "end" symbol in r5 on bootup, for Landisk emulation. This is enough to get OpenBSD/landisk to install :) Adding a preliminary install instruction skeleton to the documentation. SuperH emulation is still shaky, though :-/ 20070307 Fixed a strangeness in memory_sh.c (read/write was never returned for any page). (Unknown whether this fixes any actual problems, though.) 20070308 dev_ram.c fix: invalidate code translations on writes to RAM, emulated as separate devices. Linux/dreamcast gets further in the boot process than before, but still bugs out in userland. Fixing bugs in the "stc.l gbr,@-rN" and "ldc.l @rN+,gbr" SuperH instructions (they should NOT check the MD bit), allowing the Linux/dreamcast Live CD to reach userland correctly :-) 20070310 Changing the cpu name "Alpha" in src/useremul.c to "21364" to unbreak userland syscall emulation of FreeBSD/Alpha binaries. 20070314 Applying a patch from Michael Yaroslavtsev which fixes the previous Linux lib64 patch to the configure script. 20070315 Adding a (dummy) sun4v machine type, and SPARC T1 cpu type. 20070316 Creating a new directory, src/disk, and moving diskimage.c to it. Separating out bootblock loading stuff from emul.c into new files in src/disk. Adding some more SPARC registers. 20070318 Preparing/testing for a minirelease, 0.4.4.1. ============== RELEASE 0.4.4.1 ==============
++ trunk/HISTORY (local) $Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $ 20061029 Changing usleep(1) calls in the debugger to usleep(10000) 20061107 Adding a new disk image option (-d o...) which sets the ISO9660 filesystem base offset; also making some other hacks to allow NetBSD/dreamcast and homebrew demos/games to boot directly from a filesystem image. Moving Dreamcast-specific stuff in the documentation to its own page (dreamcast.html). Adding a border to the Dreamcast PVR framebuffer. 20061108 Adding a -T command line option (again?), for halting the emulator on unimplemented memory accesses. 20061109 Continuing on various SH4 and Dreamcast related things. The emulator should now halt on more unimplemented device accesses, instead of just printing a warning, forcing me to actually implement missing stuff :) 20061111 Continuing on SH4 and Dreamcast stuff. Adding a bogus Landisk (SH4) machine mode. 20061112 Implementing some parts of the Dreamcast GDROM device. With some ugly hacks, NetBSD can (barely) mount an ISO image. 20061113 NetBSD/dreamcast now starts booting from the Live CD image, but crashes randomly quite early on in the boot process. 20061122 Beginning on a skeleton interrupt.h and interrupt.c for the new interrupt subsystem. 20061124 Continuing on the new interrupt system; taking the first steps to attempt to connect CPUs (SuperH and MIPS) and devices (dev_cons and SH4 timer interrupts) to it. Many things will probably break from now on. 20061125 Converting dev_ns16550, dev_8253 to the new interrupt system. Attempting to begin to convert the ISA bus. 20061130 Incorporating a patch from Brian Foley for the configure script, which checks for X11 libs in /usr/X11R6/lib64 (which is used on some Linux systems). 20061227 Adding a note in the man page about booting from Dreamcast CDROM images (i.e. that no external kernel is needed). 20061229 Continuing on the interrupt system rewrite: beginning to convert more devices, adding abort() calls for legacy interrupt system calls so that everything now _has_ to be rewritten! Almost all machine modes are now completely broken. 20061230 More progress on removing old interrupt code, mostly related to the ISA bus + devices, the LCA bus (on AlphaBook1), and the Footbridge bus (for CATS). And some minor PCI stuff. Connecting the ARM cpu to the new interrupt system. The CATS, NetWinder, and QEMU_MIPS machine modes now work with the new interrupt system :) 20061231 Connecting PowerPC CPUs to the new interrupt system. Making PReP machines (IBM 6050) work again. Beginning to convert the GT PCI controller (for e.g. Malta and Cobalt emulation). Some things work, but not everything. Updating Copyright notices for 2007. 20070101 Converting dev_kn02 from legacy style to devinit; the 3max machine mode now works with the new interrupt system :-] 20070105 Beginning to convert the SGI O2 machine to the new interrupt system; finally converting O2 (IP32) devices to devinit, etc. 20070106 Continuing on the interrupt system redesign/rewrite; KN01 (PMAX), KN230, and Dreamcast ASIC interrupts should work again, moving out stuff from machine.h and devices.h into the corresponding devices, beginning the rewrite of i80321 interrupts, etc. 20070107 Beginning on the rewrite of Eagle interrupt stuff (PReP, etc). 20070117 Beginning the rewrite of Algor (V3) interrupts (finally changing dev_v3 into devinit style). 20070118 Removing the "bus" registry concept from machine.h, because it was practically meaningless. Continuing on the rewrite of Algor V3 ISA interrupts. 20070121 More work on Algor interrupts; they are now working again, well enough to run NetBSD/algor. :-) 20070122 Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips can be installed using the new interrupt system :-) 20070123 Making the testmips mode work with the new interrupt system. 20070127 Beginning to convert DEC5800 devices to devinit, and to the new interrupt system. Converting Playstation 2 devices to devinit, and converting the interrupt system. Also fixing a severe bug: the interrupt mask register on Playstation 2 is bitwise _toggled_ on writes. 20070128 Removing the dummy NetGear machine mode and the 8250 device (which was only used by the NetGear machine). Beginning to convert the MacPPC GC (Grand Central) interrupt controller to the new interrupt system. Converting Jazz interrupts (PICA61 etc.) to the new interrupt system. NetBSD/arc can be installed again :-) Fixing the JAZZ timer (hardcoding it at 100 Hz, works with NetBSD and it is better than a completely dummy timer as it was before). Converting dev_mp to the new interrupt system, although I haven't had time to actually test it yet. Completely removing src/machines/interrupts.c, cpu_interrupt and cpu_interrupt_ack in src/cpu.c, and src/include/machine_interrupts.h! Adding fatal error messages + abort() in the few places that are left to fix. Converting dev_z8530 to the new interrupt system. FINALLY removing the md_int struct completely from the machine struct. SH4 fixes (adding a PADDR invalidation in the ITLB replacement code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs all the way to the login prompt, and can be interacted with :-) Converting the CPC700 controller (PCI and interrupt controller for PM/PPC) to the new interrupt system. 20070129 Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/ sgimips' and OpenBSD/sgi's ramdisk kernels can now be interacted with again. 20070130 Moving out the MIPS multi_lw and _sw instruction combinations so that they are auto-generated at compile time instead. 20070131 Adding detection of amd64/x86_64 hosts in the configure script, for doing initial experiments (again :-) with native code generation. Adding a -k command line option to set the size of the dyntrans cache, and a -B command line option to disable native code generation, even if GXemul was compiled with support for native code generation for the specific host CPU architecture. 20070201 Experimenting with a skeleton for native code generation. Changing the default behaviour, so that native code generation is now disabled by default, and has to be enabled by using -b on the command line. 20070202 Continuing the native code generation experiments. Making PCI interrupts work for Footbridge again. 20070203 More native code generation experiments. Removing most of the native code generation experimental code, it does not make sense to include any quick hacks like this. Minor cleanup/removal of some more legacy MIPS interrupt code. 20070204 Making i80321 interrupts work again (for NetBSD/evbarm etc.), and fixing the timer at 100 Hz. 20070206 Experimenting with removing the wdc interrupt slowness hack. 20070207 Lowering the number of dyntrans TLB entries for MIPS from 192 to 128, resulting in a minor speed improvement. Minor optimization to the code invalidation routine in cpu_dyntrans.c. 20070208 Increasing (experimentally) the nr of dyntrans instructions per loop from 60 to 120. 20070210 Commenting out (experimentally) the dyntrans_device_danger detection in memory_rw.c. Changing the testmips and baremips machines to use a revision 2 MIPS64 CPU by default, instead of revision 1. Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC files, the PC bios emulation, and the Olivetti M700 (ARC) and db64360 emulation modes. 20070211 Adding an "mp" demo to the demos directory, which tests the SMP functionality of the testmips machine. Fixing PReP interrupts some more. NetBSD/prep now boots again. 20070216 Adding a "nop workaround" for booting Mach/PMAX to the documentation; thanks to Artur Bujdoso for the values. Converting more of the MacPPC interrupt stuff to the new system. Beginning to convert BeBox interrupts to the new system. PPC603e should NOT have the PPC_NO_DEC flag! Removing it. Correcting BeBox clock speed (it was set to 100 in the NetBSD bootinfo block, but should be 33000000/4), allowing NetBSD to start without using the (incorrect) PPC_NO_DEC hack. 20070217 Implementing (slow) AltiVec vector loads and stores, allowing NetBSD/macppc to finally boot using the GENERIC kernel :-) Updating the documentation with install instructions for NetBSD/macppc. 20070218-19 Regression testing for the release. ============== RELEASE 0.4.4 ==============
++ trunk/HISTORY (local) $Id: HISTORY,v 1.1264 2006/06/25 11:08:04 debug Exp $ 20060624 Replacing the error-prone machine type initialization stuff with something more reasonable. Finally removing the old "cpu_run" kludge; moving around stuff in machine.c and emul.c to better suit the dyntrans system. Various minor dyntrans cleanups (renaming translate_address to translate_v2p, and experimenting with template physpages). 20060625 Removing the speed hack which separated the vph entries into two halves (code vs data); things seem a lot more stable now. Minor performance hack: R2000/R3000 cache isolation now only clears address translations when going into isolation, not when going out of it. Fixing the MIPS interrupt problems by letting mtc0 immediately cause interrupts. ============== RELEASE 0.4.0.1 ==============
++ trunk/HISTORY (local) $Id: HISTORY,v 1.1256 2006/06/23 20:43:44 debug Exp $ 20060219 Various minor updates. Removing the old MIPS16 skeleton code, because it will need to be rewritten for dyntrans anyway. 20060220-22 Removing the non-working dyntrans backend support. Continuing on the 64-bit dyntrans virtual memory generalization. 20060223 More work on the 64-bit vm generalization. 20060225 Beginning on MIPS dyntrans load/store instructions. Minor PPC updates (64-bit load/store, etc). Fixes for the variable-instruction-length framework, some minor AVR updates (a simple Hello World program works!). Beginning on a skeleton for automatically generating documen- tation (for devices etc.). 20060226 PPC updates (adding some more 64-bit instructions, etc). AVR updates (more instructions). FINALLY found and fixed the zs bug, making NetBSD/macppc accept the serial console. 20060301 Adding more AVR instructions. 20060304 Continuing on AVR-related stuff. Beginning on a framework for cycle-accurate device emulation. Adding an experimental "PAL TV" device (just a dummy so far). 20060305 Adding more AVR instructions. Adding a dummy epcom serial controller (for TS7200 emulation). 20060310 Removing the emul() command from configuration files, so only net() and machine() are supported. Minor progress on the MIPS dyntrans rewrite. 20060311 Continuing on the MIPS dyntrans rewrite (adding more instructions, etc). 20060315 Adding more instructions (sllv, srav, srlv, bgtz[l], blez[l], beql, bnel, slti[u], various loads and stores). 20060316 Removing the ALWAYS_SIGNEXTEND_32 option, since it was rarely used. Adding more MIPS dyntrans instructions, and fixing bugs. 20060318 Implementing fast loads/stores for MIPS dyntrans (big/little endian, 32-bit and 64-bit modes). 20060320 Making MIPS dyntrans the default configure option; use "--enable-oldmips" to use the old bintrans system. Adding MIPS dyntrans dmult[u]; minor updates. 20060322 Continuing... adding some more instructions. Adding a simple skeleton for demangling C++ "_ZN" symbols. 20060323 Moving src/debugger.c into a new directory (src/debugger/). 20060324 Fixing the hack used to load PPC ELFs (useful for relocated Linux/ppc kernels), and adding a dummy G3 machine mode. 20060325-26 Beginning to experiment with GDB remote serial protocol connections; adding a -G command line option for selecting which TCP port to listen to. 20060330 Beginning a major cleanup to replace things like "0x%016llx" with more correct "0x%016"PRIx64, etc. Continuing on the GDB remote serial protocol support. 20060331 More cleanup, and some minor GDB remote progress. 20060402 Adding a hack to the configure script, to allow compilation on systems that lack PRIx64 etc. 20060406 Removing the temporary FreeBSD/arm hack in dev_ns16550.c and replacing it with a better fix from Olivier Houchard. 20060407 A remote debugger (gdb or ddd) can now start and stop the emulator using the GDB remote serial protocol, and registers and memory can be read. MIPS only for now. 20060408 More GDB progress: single-stepping also works, and also adding support for ARM, PowerPC, and Alpha targets. Continuing on the delay-slot-across-page-boundary issue. 20060412 Minor update: beginning to add support for the SPARC target to the remote GDB functionality. 20060414 Various MIPS updates: adding more instructions for dyntrans (eret, add), and making some exceptions work. Fixing a bug in dmult[u]. Implementing the first SPARC instructions (sethi, or). 20060415 Adding "magic trap" instructions so that PROM calls can be software emulated in MIPS dyntrans. Adding more MIPS dyntrans instructions (ddiv, dadd) and fixing another bug in dmult. 20060416 More MIPS dyntrans progress: adding [d]addi, movn, movz, dsllv, rfi, an ugly hack for supporting R2000/R3000 style faked caches, preliminary interrupt support, and various other updates and bugfixes. 20060417 Adding more SPARC instructions (add, sub, sll[x], sra[x], srl[x]), and useful SPARC header definitions. Adding the first (trivial) x86/AMD64 dyntrans instructions (nop, cli/sti, stc/clc, std/cld, simple mov, inc ax). Various other x86 updates related to variable instruction length stuff. Adding unaligned loads/stores to the MIPS dyntrans mode (but still using the pre-dyntrans (slow) imlementation). 20060419 Fixing a MIPS dyntrans exception-in-delay-slot bug. Removing the old "show opcode statistics" functionality, since it wasn't really useful and isn't implemented for dyntrans. Single-stepping (or running with instruction trace) now looks ok with dyntrans with delay-slot architectures. 20060420 Minor hacks (removing the -B command line option when compiled for non-bintrans, and some other very minor updates). Adding (slow) MIPS dyntrans load-linked/store-conditional. 20060422 Applying fixes for bugs discovered by Nils Weller's nwcc (static DEC memmap => now per machine, and adding an extern keyword in cpu_arm_instr.c). Finally found one of the MIPS dyntrans bugs that I've been looking for (copy/paste spelling error BIG vs LITTLE endian in cpu_mips_instr_loadstore.c for 16-bit fast stores). FINALLY found the major MIPS dyntrans bug: slti vs sltiu signed/unsigned code in cpu_mips_instr.c. :-) Adding more MIPS dyntrans instructions (lwc1, swc1, bgezal[l], ctc1, tlt[u], tge[u], tne, beginning on rdhwr). NetBSD/hpcmips can now reach userland when using dyntrans :-) Adding some more x86 dyntrans instructions. Finally removed the old Alpha-specific virtual memory code, and replaced it with the generic 64-bit version. Beginning to add disassembly support for SPECIAL3 MIPS opcodes. 20060423 Continuing on the delay-slot-across-page-boundary issue; adding an end_of_page2 ic slot (like I had planned before, but had removed for some reason). Adding a quick-and-dirty fallback to legacy coprocessor 1 code (i.e. skipping dyntrans implementation for now). NetBSD/hpcmips and NetBSD/pmax (when running on an emulated R4400) can now be installed and run. :-) (Many bugs left to fix, though.) Adding more MIPS dyntrans instructions: madd[u], msub[u]. Cleaning up the SPECIAL2 vs R5900/TX79/C790 "MMI" opcode maps somewhat (disassembly and dyntrans instruction decoding). 20060424 Adding an isa_revision field to mips_cpu_types.h, and making sure that SPECIAL3 opcodes cause Reserved Instruction exceptions on MIPS32/64 revisions lower than 2. Adding the SPARC 'ba', 'call', 'jmpl/retl', 'and', and 'xor' instructions. 20060425 Removing the -m command line option ("run at most x instructions") and -T ("single_step_on_bad_addr"), because they never worked correctly with dyntrans anyway. Freshening up the man page. 20060428 Adding more MIPS dyntrans instructions: bltzal[l], idle. Enabling MIPS dyntrans compare interrupts. 20060429 FINALLY found the weird dyntrans bug, causing NetBSD etc. to behave strangely: some floating point code (conditional coprocessor branches) could not be reused from the old non-dyntrans code. The "quick-and-dirty fallback" only appeared to work. Fixing by implementing bc1* for MIPS dyntrans. More MIPS instructions: [d]sub, sdc1, ldc1, dmtc1, dmfc1, cfc0. Freshening up MIPS floating point disassembly appearance. 20060430 Continuing on C790/R5900/TX79 disassembly; implementing 128-bit "por" and "pextlw". 20060504 Disabling -u (userland emulation) unless compiled as unstable development version. Beginning on freshening up the testmachine include files, to make it easier to reuse those files (placing them in src/include/testmachine/), and beginning on a set of "demos" or "tutorials" for the testmachine functionality. Minor updates to the MIPS GDB remote protocol stub. Refreshing doc/experiments.html and gdb_remote.html. Enabling Alpha emulation in the stable release configuration, even though no guest OSes for Alpha can run yet. 20060505 Adding a generic 'settings' object, which will contain references to settable variables (which will later be possible to access using the debugger). 20060506 Updating dev_disk and corresponding demo/documentation (and switching from SCSI to IDE disk types, so it actually works with current test machines :-). 20060510 Adding a -D_LARGEFILE_SOURCE hack for 64-bit Linux hosts, so that fseeko() doesn't give a warning. Updating the section about how dyntrans works (the "runnable IR") in doc/intro.html. Instruction updates (some x64=1 checks, some more R5900 dyntrans stuff: better mul/mult separation from MIPS32/64, adding ei and di). Updating MIPS cpuregs.h to a newer one (from NetBSD). Adding more MIPS dyntrans instructions: deret, ehb. 20060514 Adding disassembly and beginning implementation of SPARC wr and wrpr instructions. 20060515 Adding a SUN SPARC machine mode, with dummy SS20 and Ultra1 machines. Adding the 32-bit "rd psr" instruction. 20060517 Disassembly support for the general SPARC rd instruction. Partial implementation of the cmp (subcc) instruction. Some other minor updates (making sure that R5900 processors start up with the EIE bit enabled, otherwise Linux/playstation2 receives no interrupts). 20060519 Minor MIPS updates/cleanups. 20060521 Moving the MeshCube machine into evbmips; this seems to work reasonably well with a snapshot of a NetBSD MeshCube kernel. Cleanup/fix of MIPS config0 register initialization. 20060529 Minor MIPS fixes, including a sign-extension fix to the unaligned load/store code, which makes NetBSD/pmax on R3000 work better with dyntrans. (Ultrix and Linux/DECstation still don't work, though.) 20060530 Minor updates to the Alpha machine mode: adding an AlphaBook mode, an LCA bus (forwarding accesses to an ISA bus), etc. 20060531 Applying a bugfix for the MIPS dyntrans sc[d] instruction from Ondrej Palkovsky. (Many thanks.) 20060601 Minifix to allow ARM immediate msr instruction to not give an error for some valid values. More Alpha updates. 20060602 Some minor Alpha updates. 20060603 Adding the Alpha cmpbge instruction. NetBSD/alpha prints its first boot messages :-) on an emulated Alphabook 1. 20060612 Minor updates; adding a dev_ether.h include file for the testmachine ether device. Continuing the hunt for the dyntrans bug which makes Linux and Ultrix on DECstation behave strangely... FINALLY found it! It seems to be related to invalidation of the translation cache, on tlbw{r,i}. There also seems to be some remaining interrupt-related problems. 20060614 Correcting the implementation of ldc1/sdc1 for MIPS dyntrans (so that it uses 16 32-bit registers if the FR bit in the status register is not set). 20060616 REMOVING BINTRANS COMPLETELY! Removing the old MIPS interpretation mode. Removing the MFHILO_DELAY and instruction delay stuff, because they wouldn't work with dyntrans anyway. 20060617 Some documentation updates (adding "NetBSD-archive" to some URLs, and new Debian/DECstation installation screenshots). Removing the "tracenull" and "enable-caches" configure options. Improving MIPS dyntrans performance somewhat (only invalidate translations if necessary, on writes to the entryhi register, instead of doing it for all cop0 writes). 20060618 More cleanup after the removal of the old MIPS emulation. Trying to fix the MIPS dyntrans performance bugs/bottlenecks; only semi-successful so far (for R3000). 20060620 Minor update to allow clean compilation again on Tru64/Alpha. 20060622 MIPS cleanup and fixes (removing the pc_last stuff, which doesn't make sense with dyntrans anyway, and fixing a cross- page-delay-slot-with-exception case in end_of_page). Removing the old max_random_cycles_per_chunk stuff, and the concept of cycles vs instructions for MIPS emulation. FINALLY found and fixed the bug which caused NetBSD/pmax clocks to behave strangely (it was a load to the zero register, which was treated as a NOP; now it is treated as a load to a dummy scratch register). 20060623 Increasing the dyntrans chunk size back to N_SAFE_DYNTRANS_LIMIT, instead of N_SAFE_DYNTRANS_LIMIT/2. Preparing for a quick release, even though there are known bugs, and performance for non-R3000 MIPS emulation is very poor. :-/ Reverting to half the dyntrans chunk size again, because NetBSD/cats seemed less stable with full size chunks. :( NetBSD/sgimips 3.0 can now run :-) (With release 0.3.8, only NetBSD/sgimips 2.1 worked, not 3.0.) ============== RELEASE 0.4.0 ==============
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