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++ trunk/HISTORY (local) $Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $ 20060626 Continuing on SPARC emulation (beginning on the 'save' instruction, register windows, etc). 20060629 Planning statistics gathering (new -s command line option), and renaming speed_tricks to allow_instruction_combinations. 20060630 Some minor manual page updates. Various cleanups. Implementing the -s command line option. 20060701 FINALLY found the bug which prevented Linux and Ultrix from running without the ugly hack in the R2000/R3000 cache isol code; it was the phystranslation hint array which was buggy. Removing the phystranslation hint code completely, for now. 20060702 Minor dyntrans cleanups; invalidation of physpages now only invalidate those parts of a page that have actually been translated. (32 parts per page.) Some MIPS non-R3000 speed fixes. Experimenting with MIPS instruction combination for some addiu+bne+sw loops, and sw+sw+sw. Adding support (again) for larger-than-4KB pages in MIPS tlbw*. Continuing on SPARC emulation: adding load/store instructions. 20060704 Fixing a virtual vs physical page shift bug in the new tlbw* implementation. Problem noticed by Jakub Jermar. (Many thanks.) Moving rfe and eret to cpu_mips_instr.c, since that is the only place that uses them nowadays. 20060705 Removing the BSD license from the "testmachine" include files, placing them in the public domain instead; this enables the testmachine stuff to be used from projects which are incompatible with the BSD license for some reason. 20060707 Adding instruction combinations for the R2000/R3000 L1 I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu, various branches followed by addiu or nop, and jr ra followed by addiu. The time it takes to perform a full NetBSD/pmax R3000 install on the laptop has dropped from 573 seconds to 539. :-) 20060708 Adding a framebuffer controller device (dev_fbctrl), which so far can be used to change the fb resolution during runtime, but in the future will also be useful for accelerated block fill/ copy, and possibly also simplified character output. Adding an instruction combination for NetBSD/pmax' strlen. 20060709 Minor fixes: reading raw files in src/file.c wasn't memblock aligned, removing buggy multi_sw MIPS instruction combination, etc. 20060711 Adding a machine_qemu.c, which contains a "qemu_mips" machine. (It mimics QEMU's MIPS machine mode, so that a test kernel made for QEMU_MIPS also can run in GXemul... at least to some extent.) Adding a short section about how to run this mode to doc/guestoses.html. 20060714 Misc. minor code cleanups. 20060715 Applying a patch which adds getchar() to promemul/yamon.c (from Oleksandr Tymoshenko). Adding yamon.h from NetBSD, and rewriting yamon.c to use it (instead of ugly hardcoded numbers) + some cleanup. 20060716 Found and fixed the bug which broke single-stepping of 64-bit programs between 0.4.0 and 0.4.0.1 (caused by too quick refactoring and no testing). Hopefully this fix will not break too many other things. 20060718 Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS. Re-adding the sw+sw+sw instr comb (the problem was that I had ignored endian issues); however, it doesn't seem to give any big performance gain. 20060720 Adding a dummy Transputer mode (T414, T800 etc) skeleton (only the 'j' and 'ldc' instructions are implemented so far). :-} 20060721 Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus misc. other updates to get Linux 2.6 for evbmips/malta working (thanks to Alec Voropay for the details). FINALLY found and fixed the bug which made tlbw* for non-R3000 buggy; it was a reference count problem in the dyntrans core. 20060722 Testing stuff; things seem stable enough for a new release. ============== RELEASE 0.4.1 ==============
| 1 | /* |
| 2 | * Copyright (C) 2006 Anders Gavare. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * 1. Redistributions of source code must retain the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer. |
| 9 | * 2. Redistributions in binary form must reproduce the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer in the |
| 11 | * documentation and/or other materials provided with the distribution. |
| 12 | * 3. The name of the author may not be used to endorse or promote products |
| 13 | * derived from this software without specific prior written permission. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 16 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 17 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 18 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 19 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 20 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 21 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 22 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 23 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 24 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 25 | * SUCH DAMAGE. |
| 26 | * |
| 27 | * |
| 28 | * $Id: machine_qemu.c,v 1.2 2006/07/11 17:24:17 debug Exp $ |
| 29 | * |
| 30 | * This file contains semi-bogus machine descriptions for experimental |
| 31 | * machines, mimicing those emulated by Fabrice Bellard's QEMU. |
| 32 | * |
| 33 | * See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.1.tar.gz |
| 34 | * (available from http://fabrice.bellard.free.fr/qemu/download.html). |
| 35 | */ |
| 36 | |
| 37 | #include <stdio.h> |
| 38 | #include <string.h> |
| 39 | |
| 40 | #include "bus_isa.h" |
| 41 | #include "cpu.h" |
| 42 | #include "device.h" |
| 43 | #include "devices.h" |
| 44 | #include "machine.h" |
| 45 | #include "machine_interrupts.h" |
| 46 | #include "memory.h" |
| 47 | #include "misc.h" |
| 48 | |
| 49 | |
| 50 | MACHINE_SETUP(qemu_mips) |
| 51 | { |
| 52 | machine->machine_name = "QEMU MIPS"; |
| 53 | cpu->byte_order = EMUL_BIG_ENDIAN; |
| 54 | |
| 55 | /* An ISA bus at 0x14000000... */ |
| 56 | bus_isa_init(machine, 0, 0x14000000ULL, 0x18000000ULL, 8, 24); |
| 57 | |
| 58 | /* ... and an ISA interrupt controller, connected to MIPS irq 2: */ |
| 59 | machine->md_interrupt = isa8_interrupt; |
| 60 | machine->isa_pic_data.native_irq = 2; |
| 61 | |
| 62 | if (!machine->prom_emulation) |
| 63 | return; |
| 64 | |
| 65 | /* |
| 66 | * Registers at startup do not seem to be defined in QEMU, but |
| 67 | * bootargs and memory size are placed just below 16 MB. |
| 68 | * |
| 69 | * Remember to start the emulator with options, e.g.: |
| 70 | * |
| 71 | * -o "console=ttyS0 root=/dev/ram rd_start=0x80800000 |
| 72 | * rd_size=10000000 init=/bin/sh" |
| 73 | */ |
| 74 | |
| 75 | store_string(cpu, (int32_t)(0x80000000 + 16*1048576 - 256), |
| 76 | machine->boot_string_argument); |
| 77 | store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 260), |
| 78 | 0x12345678); |
| 79 | store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 264), |
| 80 | machine->physical_ram_in_mb * 1048576); |
| 81 | } |
| 82 | |
| 83 | |
| 84 | MACHINE_DEFAULT_CPU(qemu_mips) |
| 85 | { |
| 86 | /* QEMU emulates a MIPS32 rev 1, so 4Kc will do just fine. */ |
| 87 | machine->cpu_name = strdup("4Kc"); |
| 88 | } |
| 89 | |
| 90 | |
| 91 | MACHINE_DEFAULT_RAM(qemu_mips) |
| 92 | { |
| 93 | machine->physical_ram_in_mb = 64; |
| 94 | } |
| 95 | |
| 96 | |
| 97 | MACHINE_REGISTER(qemu_mips) |
| 98 | { |
| 99 | MR_DEFAULT(qemu_mips, "QEMU MIPS", ARCH_MIPS, MACHINE_QEMU_MIPS); |
| 100 | me->set_default_ram = machine_default_ram_qemu_mips; |
| 101 | machine_entry_add_alias(me, "qemu_mips"); |
| 102 | } |
| 103 |
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