25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: machine_qemu.c,v 1.2 2006/07/11 17:24:17 debug Exp $ |
* $Id: machine_qemu.c,v 1.4 2006/08/12 19:31:36 debug Exp $ |
29 |
* |
* |
30 |
* This file contains semi-bogus machine descriptions for experimental |
* This file contains semi-bogus machine descriptions for experimental |
31 |
* machines, mimicing those emulated by Fabrice Bellard's QEMU. |
* machines, mimicing those emulated by Fabrice Bellard's QEMU. |
52 |
machine->machine_name = "QEMU MIPS"; |
machine->machine_name = "QEMU MIPS"; |
53 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
54 |
|
|
55 |
/* An ISA bus at 0x14000000... */ |
/* An ISA bus, I/O ports at 0x14000000, memory at 0x10000000... */ |
56 |
bus_isa_init(machine, 0, 0x14000000ULL, 0x18000000ULL, 8, 24); |
bus_isa_init(machine, BUS_ISA_IDE0 | BUS_ISA_IDE1, |
57 |
|
0x14000000ULL, 0x10000000ULL, 8, 24); |
58 |
|
|
59 |
/* ... and an ISA interrupt controller, connected to MIPS irq 2: */ |
/* ... and an ISA interrupt controller, connected to MIPS irq 2: */ |
60 |
machine->md_interrupt = isa8_interrupt; |
machine->md_interrupt = isa8_interrupt; |