/[gxemul]/trunk/src/machines/machine_qemu.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 32 by dpavlin, Mon Oct 8 16:20:58 2007 UTC revision 44 by dpavlin, Mon Oct 8 16:22:56 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2006-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_qemu.c,v 1.5 2006/09/04 02:32:00 debug Exp $   *  $Id: machine_qemu.c,v 1.14 2007/06/20 18:59:16 debug Exp $
29   *   *
30   *  This file contains semi-bogus machine descriptions for experimental   *  COMMENT: Machine mimicing QEMU's default MIPS emulation mode
  *  machines, mimicing those emulated by Fabrice Bellard's QEMU.  
31   *   *
32   *  See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.1.tar.gz   *  See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.2.tar.gz
  *  (available from http://fabrice.bellard.free.fr/qemu/download.html).  
33   */   */
34    
35  #include <stdio.h>  #include <stdio.h>
36    #include <stdlib.h>
37  #include <string.h>  #include <string.h>
38    
39  #include "bus_isa.h"  #include "bus_isa.h"
# Line 42  Line 41 
41  #include "device.h"  #include "device.h"
42  #include "devices.h"  #include "devices.h"
43  #include "machine.h"  #include "machine.h"
 #include "machine_interrupts.h"  
44  #include "memory.h"  #include "memory.h"
45  #include "misc.h"  #include "misc.h"
46    
47    
 /*****************************************************************************/  
   
   
 MACHINE_SETUP(qemu_arm)  
 {  
         /*  
          *  The ARM machine in QEMU isn't really a bogus machine, I think.  
          *  It is supposed to emulate a specific ARM board. But for now,  
          *  treat it as "QEMU ARM".  
          */  
   
         machine->machine_name = "QEMU ARM";  
         cpu->byte_order = EMUL_LITTLE_ENDIAN;  
   
         device_add(machine, "ns16550 addr=0x16000000");  
   
         if (!machine->prom_emulation)  
                 return;  
   
         /*  
          *  QEMU's ARM emulation mode uses the following hardcoded addresses:  
          *  
          *      0x00000100 = kernel boot arguments  
          *      0x00010000 = kernel load address  
          *      0x00800000 = initrd load address  
          *  
          *  QEMU's arm_boot.c puts these values at 0x100:  
          *  
          *  TODO: Yuck. Don't hardcode these.  
          */  
   
         store_32bit_word(cpu, 0x100, 5);  
         store_32bit_word(cpu, 0x104, 0x54410001);  
         store_32bit_word(cpu, 0x108, 1);  
         store_32bit_word(cpu, 0x10c, 0x1000);  
         store_32bit_word(cpu, 0x110, 0);  
         store_32bit_word(cpu, 0x114, 4);  
         store_32bit_word(cpu, 0x118, 0x54410002);  
         store_32bit_word(cpu, 0x11c, machine->physical_ram_in_mb * 1048576);  
         store_32bit_word(cpu, 0x120, 0);  
         /*  TODO: 0x54410009 for the kernel command line args  */  
   
         /*  
          *  board ids:  
          *      0x25e for "AB", 0x183 for "PB".  
          */  
   
         cpu->cd.arm.r[0] = 0x5e;        /*  low byte of board id  */  
         cpu->cd.arm.r[1] = 0x02;        /*  high byte of board id  */  
         cpu->cd.arm.r[5] = 0x100;       /*  address of boot args  */  
         cpu->cd.arm.r[6] = 0x10000;     /*  address of loaded kernel  */  
 }  
   
   
 MACHINE_DEFAULT_CPU(qemu_arm)  
 {  
         /*  TODO: ARM926EJ-S  */  
         machine->cpu_name = strdup("ARM922T");  
 }  
   
   
 MACHINE_DEFAULT_RAM(qemu_arm)  
 {  
         machine->physical_ram_in_mb = 64;  
 }  
   
   
 MACHINE_REGISTER(qemu_arm)  
 {  
         MR_DEFAULT(qemu_arm, "QEMU ARM", ARCH_ARM, MACHINE_QEMU_ARM);  
         me->set_default_ram = machine_default_ram_qemu_arm;  
         machine_entry_add_alias(me, "qemu_arm");  
 }  
   
   
 /*****************************************************************************/  
   
   
48  MACHINE_SETUP(qemu_mips)  MACHINE_SETUP(qemu_mips)
49  {  {
50            char tmpstr[300];
51    
52          machine->machine_name = "QEMU MIPS";          machine->machine_name = "QEMU MIPS";
53          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
54    
55          /*  An ISA bus, I/O ports at 0x14000000, memory at 0x10000000...  */          /*
56          bus_isa_init(machine, BUS_ISA_IDE0 | BUS_ISA_IDE1,           *  An ISA bus, I/O ports at 0x14000000, memory at 0x10000000,
57              0x14000000ULL, 0x10000000ULL, 8, 24);           *  connected to MIPS irq 2:
58             */
59          /*  ... and an ISA interrupt controller, connected to MIPS irq 2:  */          snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
60          machine->md_interrupt = isa8_interrupt;              machine->path, machine->bootstrap_cpu);
61          machine->isa_pic_data.native_irq = 2;          bus_isa_init(machine, tmpstr, BUS_ISA_IDE0 | BUS_ISA_IDE1,
62                0x14000000ULL, 0x10000000ULL);
63    
64          if (!machine->prom_emulation)          if (!machine->prom_emulation)
65                  return;                  return;
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