/[gxemul]/trunk/src/machines/machine_qemu.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 32 by dpavlin, Mon Oct 8 16:20:58 2007 UTC revision 34 by dpavlin, Mon Oct 8 16:21:17 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2006-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_qemu.c,v 1.5 2006/09/04 02:32:00 debug Exp $   *  $Id: machine_qemu.c,v 1.12 2007/01/21 21:02:57 debug Exp $
29   *   *
30   *  This file contains semi-bogus machine descriptions for experimental   *  This file contains semi-bogus machine descriptions for experimental
31   *  machines, mimicing those emulated by Fabrice Bellard's QEMU.   *  machines, mimicing those emulated by Fabrice Bellard's QEMU.
# Line 35  Line 35 
35   */   */
36    
37  #include <stdio.h>  #include <stdio.h>
38    #include <stdlib.h>
39  #include <string.h>  #include <string.h>
40    
41  #include "bus_isa.h"  #include "bus_isa.h"
# Line 42  Line 43 
43  #include "device.h"  #include "device.h"
44  #include "devices.h"  #include "devices.h"
45  #include "machine.h"  #include "machine.h"
 #include "machine_interrupts.h"  
46  #include "memory.h"  #include "memory.h"
47  #include "misc.h"  #include "misc.h"
48    
# Line 127  MACHINE_REGISTER(qemu_arm) Line 127  MACHINE_REGISTER(qemu_arm)
127    
128  MACHINE_SETUP(qemu_mips)  MACHINE_SETUP(qemu_mips)
129  {  {
130            char tmpstr[300];
131    
132          machine->machine_name = "QEMU MIPS";          machine->machine_name = "QEMU MIPS";
133          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
134    
135          /*  An ISA bus, I/O ports at 0x14000000, memory at 0x10000000...  */          /*
136          bus_isa_init(machine, BUS_ISA_IDE0 | BUS_ISA_IDE1,           *  An ISA bus, I/O ports at 0x14000000, memory at 0x10000000,
137              0x14000000ULL, 0x10000000ULL, 8, 24);           *  connected to MIPS irq 2:
138             */
139          /*  ... and an ISA interrupt controller, connected to MIPS irq 2:  */          snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
140          machine->md_interrupt = isa8_interrupt;              machine->path, machine->bootstrap_cpu);
141          machine->isa_pic_data.native_irq = 2;          bus_isa_init(machine, tmpstr, BUS_ISA_IDE0 | BUS_ISA_IDE1,
142                0x14000000ULL, 0x10000000ULL);
143    
144          if (!machine->prom_emulation)          if (!machine->prom_emulation)
145                  return;                  return;
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