/[gxemul]/trunk/src/machines/machine_qemu.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC revision 44 by dpavlin, Mon Oct 8 16:22:56 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2006-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_qemu.c,v 1.2 2006/07/11 17:24:17 debug Exp $   *  $Id: machine_qemu.c,v 1.14 2007/06/20 18:59:16 debug Exp $
29   *   *
30   *  This file contains semi-bogus machine descriptions for experimental   *  COMMENT: Machine mimicing QEMU's default MIPS emulation mode
  *  machines, mimicing those emulated by Fabrice Bellard's QEMU.  
31   *   *
32   *  See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.1.tar.gz   *  See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.2.tar.gz
  *  (available from http://fabrice.bellard.free.fr/qemu/download.html).  
33   */   */
34    
35  #include <stdio.h>  #include <stdio.h>
36    #include <stdlib.h>
37  #include <string.h>  #include <string.h>
38    
39  #include "bus_isa.h"  #include "bus_isa.h"
# Line 42  Line 41 
41  #include "device.h"  #include "device.h"
42  #include "devices.h"  #include "devices.h"
43  #include "machine.h"  #include "machine.h"
 #include "machine_interrupts.h"  
44  #include "memory.h"  #include "memory.h"
45  #include "misc.h"  #include "misc.h"
46    
47    
48  MACHINE_SETUP(qemu_mips)  MACHINE_SETUP(qemu_mips)
49  {  {
50            char tmpstr[300];
51    
52          machine->machine_name = "QEMU MIPS";          machine->machine_name = "QEMU MIPS";
53          cpu->byte_order = EMUL_BIG_ENDIAN;          cpu->byte_order = EMUL_BIG_ENDIAN;
54    
55          /*  An ISA bus at 0x14000000...  */          /*
56          bus_isa_init(machine, 0, 0x14000000ULL, 0x18000000ULL, 8, 24);           *  An ISA bus, I/O ports at 0x14000000, memory at 0x10000000,
57             *  connected to MIPS irq 2:
58          /*  ... and an ISA interrupt controller, connected to MIPS irq 2:  */           */
59          machine->md_interrupt = isa8_interrupt;          snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
60          machine->isa_pic_data.native_irq = 2;              machine->path, machine->bootstrap_cpu);
61            bus_isa_init(machine, tmpstr, BUS_ISA_IDE0 | BUS_ISA_IDE1,
62                0x14000000ULL, 0x10000000ULL);
63    
64          if (!machine->prom_emulation)          if (!machine->prom_emulation)
65                  return;                  return;
# Line 89  MACHINE_DEFAULT_CPU(qemu_mips) Line 91  MACHINE_DEFAULT_CPU(qemu_mips)
91    
92    
93  MACHINE_DEFAULT_RAM(qemu_mips)  MACHINE_DEFAULT_RAM(qemu_mips)
94  {        {
95          machine->physical_ram_in_mb = 64;          machine->physical_ram_in_mb = 64;
96  }  }
97    
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