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dpavlin |
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/* |
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* Copyright (C) 2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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dpavlin |
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* $Id: machine_qemu.c,v 1.4 2006/08/12 19:31:36 debug Exp $ |
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dpavlin |
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* |
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* This file contains semi-bogus machine descriptions for experimental |
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* machines, mimicing those emulated by Fabrice Bellard's QEMU. |
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* |
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* See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.1.tar.gz |
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* (available from http://fabrice.bellard.free.fr/qemu/download.html). |
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*/ |
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#include <stdio.h> |
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#include <string.h> |
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#include "bus_isa.h" |
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#include "cpu.h" |
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#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "machine_interrupts.h" |
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#include "memory.h" |
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#include "misc.h" |
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MACHINE_SETUP(qemu_mips) |
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{ |
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machine->machine_name = "QEMU MIPS"; |
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cpu->byte_order = EMUL_BIG_ENDIAN; |
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dpavlin |
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/* An ISA bus, I/O ports at 0x14000000, memory at 0x10000000... */ |
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bus_isa_init(machine, BUS_ISA_IDE0 | BUS_ISA_IDE1, |
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0x14000000ULL, 0x10000000ULL, 8, 24); |
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dpavlin |
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/* ... and an ISA interrupt controller, connected to MIPS irq 2: */ |
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machine->md_interrupt = isa8_interrupt; |
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machine->isa_pic_data.native_irq = 2; |
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if (!machine->prom_emulation) |
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return; |
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/* |
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* Registers at startup do not seem to be defined in QEMU, but |
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* bootargs and memory size are placed just below 16 MB. |
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* |
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* Remember to start the emulator with options, e.g.: |
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* |
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* -o "console=ttyS0 root=/dev/ram rd_start=0x80800000 |
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* rd_size=10000000 init=/bin/sh" |
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*/ |
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store_string(cpu, (int32_t)(0x80000000 + 16*1048576 - 256), |
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machine->boot_string_argument); |
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store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 260), |
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0x12345678); |
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store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 264), |
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machine->physical_ram_in_mb * 1048576); |
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} |
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MACHINE_DEFAULT_CPU(qemu_mips) |
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{ |
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/* QEMU emulates a MIPS32 rev 1, so 4Kc will do just fine. */ |
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machine->cpu_name = strdup("4Kc"); |
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} |
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MACHINE_DEFAULT_RAM(qemu_mips) |
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{ |
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machine->physical_ram_in_mb = 64; |
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} |
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MACHINE_REGISTER(qemu_mips) |
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{ |
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MR_DEFAULT(qemu_mips, "QEMU MIPS", ARCH_MIPS, MACHINE_QEMU_MIPS); |
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me->set_default_ram = machine_default_ram_qemu_mips; |
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machine_entry_add_alias(me, "qemu_mips"); |
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} |
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