/[gxemul]/trunk/src/machines/machine_hpcmips.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Contents of /trunk/src/machines/machine_hpcmips.c

Parent Directory Parent Directory | Revision Log Revision Log

Revision 34 - (show annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 15842 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============
1 /*
2 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: machine_hpcmips.c,v 1.6 2007/01/21 21:02:57 debug Exp $
29 */
30
31 #include <stdio.h>
32 #include <stdlib.h>
33 #include <string.h>
34
35 #include "cpu.h"
36 #include "device.h"
37 #include "devices.h"
38 #include "machine.h"
39 #include "memory.h"
40 #include "misc.h"
41
42 #include "hpc_bootinfo.h"
43 #include "vripreg.h"
44
45
46 MACHINE_SETUP(hpcmips)
47 {
48 char tmpstr[1000];
49 struct hpc_bootinfo hpc_bootinfo;
50 int hpc_platid_flags = 0, hpc_platid_cpu_submodel = 0,
51 hpc_platid_cpu_model = 0, hpc_platid_cpu_series = 0,
52 hpc_platid_cpu_arch = 0,
53 hpc_platid_submodel = 0, hpc_platid_model = 0,
54 hpc_platid_series = 0, hpc_platid_vendor = 0;
55 uint64_t hpc_fb_addr = 0;
56 int hpc_fb_bits = 0, hpc_fb_encoding = 0;
57 int hpc_fb_xsize = 0;
58 int hpc_fb_ysize = 0;
59 int hpc_fb_xsize_mem = 0;
60 int hpc_fb_ysize_mem = 0;
61
62 cpu->byte_order = EMUL_LITTLE_ENDIAN;
63 memset(&hpc_bootinfo, 0, sizeof(hpc_bootinfo));
64
65 /*
66 * NOTE: See http://forums.projectmayo.com/viewtopic.php?topic=2743&
67 * forum=23 for info on framebuffer addresses.
68 */
69
70 switch (machine->machine_subtype) {
71
72 case MACHINE_HPCMIPS_CASIO_BE300:
73 /* 166MHz VR4131 */
74 machine->machine_name = "Casio Cassiopeia BE-300";
75 hpc_fb_addr = 0x0a200000;
76 hpc_fb_xsize = 240;
77 hpc_fb_ysize = 320;
78 hpc_fb_xsize_mem = 256;
79 hpc_fb_ysize_mem = 320;
80 hpc_fb_bits = 15;
81 hpc_fb_encoding = BIFB_D16_0000;
82
83 /* TODO: irq? */
84 snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x"
85 "0a008680 addr_mult=4 in_use=%i", machine->use_x11? 0 : 1);
86 machine->main_console_handle = (size_t)
87 device_add(machine, tmpstr);
88
89 dev_vr41xx_init(machine, machine->memory, 4131);
90
91 hpc_platid_cpu_arch = 1; /* MIPS */
92 hpc_platid_cpu_series = 1; /* VR */
93 hpc_platid_cpu_model = 1; /* VR41XX */
94 hpc_platid_cpu_submodel = 6; /* VR4131 */
95 hpc_platid_vendor = 3; /* Casio */
96 hpc_platid_series = 1; /* CASSIOPEIAE */
97 hpc_platid_model = 2; /* EXXX */
98 hpc_platid_submodel = 3; /* E500 */
99 /* TODO: Don't use model number for E500, it's a BE300! */
100 break;
101
102 case MACHINE_HPCMIPS_CASIO_E105:
103 /* 131MHz VR4121 */
104 machine->machine_name = "Casio Cassiopeia E-105";
105 hpc_fb_addr = 0x0a200000; /* TODO? */
106 hpc_fb_xsize = 240;
107 hpc_fb_ysize = 320;
108 hpc_fb_xsize_mem = 256;
109 hpc_fb_ysize_mem = 320;
110 hpc_fb_bits = 16;
111 hpc_fb_encoding = BIFB_D16_0000;
112
113 /* TODO: irq? */
114 snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=0 addr=0x"
115 "0a008680 addr_mult=4 in_use=%i", machine->use_x11? 0 : 1);
116 machine->main_console_handle = (size_t)
117 device_add(machine, tmpstr);
118
119 dev_vr41xx_init(machine, machine->memory, 4121);
120
121 hpc_platid_cpu_arch = 1; /* MIPS */
122 hpc_platid_cpu_series = 1; /* VR */
123 hpc_platid_cpu_model = 1; /* VR41XX */
124 hpc_platid_cpu_submodel = 3; /* VR4121 */
125 hpc_platid_vendor = 3; /* Casio */
126 hpc_platid_series = 1; /* CASSIOPEIAE */
127 hpc_platid_model = 2; /* EXXX */
128 hpc_platid_submodel = 2; /* E105 */
129 break;
130
131 case MACHINE_HPCMIPS_NEC_MOBILEPRO_770:
132 /* 131 MHz VR4121 */
133 machine->machine_name = "NEC MobilePro 770";
134 machine->stable = 1;
135 hpc_fb_addr = 0xa000000;
136 hpc_fb_xsize = 640;
137 hpc_fb_ysize = 240;
138 hpc_fb_xsize_mem = 800;
139 hpc_fb_ysize_mem = 240;
140 hpc_fb_bits = 16;
141 hpc_fb_encoding = BIFB_D16_0000;
142
143 dev_vr41xx_init(machine, machine->memory, 4121);
144
145 hpc_platid_cpu_arch = 1; /* MIPS */
146 hpc_platid_cpu_series = 1; /* VR */
147 hpc_platid_cpu_model = 1; /* VR41XX */
148 hpc_platid_cpu_submodel = 3; /* VR4121 */
149 hpc_platid_vendor = 1; /* NEC */
150 hpc_platid_series = 2; /* NEC MCR */
151 hpc_platid_model = 2; /* MCR 5XX */
152 hpc_platid_submodel = 4; /* MCR 520A */
153 break;
154
155 case MACHINE_HPCMIPS_NEC_MOBILEPRO_780:
156 /* 166 (or 168) MHz VR4121 */
157 machine->machine_name = "NEC MobilePro 780";
158 machine->stable = 1;
159 hpc_fb_addr = 0xa180100;
160 hpc_fb_xsize = 640;
161 hpc_fb_ysize = 240;
162 hpc_fb_xsize_mem = 640;
163 hpc_fb_ysize_mem = 240;
164 hpc_fb_bits = 16;
165 hpc_fb_encoding = BIFB_D16_0000;
166
167 dev_vr41xx_init(machine, machine->memory, 4121);
168
169 hpc_platid_cpu_arch = 1; /* MIPS */
170 hpc_platid_cpu_series = 1; /* VR */
171 hpc_platid_cpu_model = 1; /* VR41XX */
172 hpc_platid_cpu_submodel = 3; /* VR4121 */
173 hpc_platid_vendor = 1; /* NEC */
174 hpc_platid_series = 2; /* NEC MCR */
175 hpc_platid_model = 2; /* MCR 5XX */
176 hpc_platid_submodel = 8; /* MCR 530A */
177 break;
178
179 case MACHINE_HPCMIPS_NEC_MOBILEPRO_800:
180 /* 131 MHz VR4121 */
181 machine->machine_name = "NEC MobilePro 800";
182 machine->stable = 1;
183 hpc_fb_addr = 0xa000000;
184 hpc_fb_xsize = 800;
185 hpc_fb_ysize = 600;
186 hpc_fb_xsize_mem = 800;
187 hpc_fb_ysize_mem = 600;
188 hpc_fb_bits = 16;
189 hpc_fb_encoding = BIFB_D16_0000;
190
191 dev_vr41xx_init(machine, machine->memory, 4121);
192
193 hpc_platid_cpu_arch = 1; /* MIPS */
194 hpc_platid_cpu_series = 1; /* VR */
195 hpc_platid_cpu_model = 1; /* VR41XX */
196 hpc_platid_cpu_submodel = 3; /* VR4121 */
197 hpc_platid_vendor = 1; /* NEC */
198 hpc_platid_series = 2; /* NEC MCR */
199 hpc_platid_model = 3; /* MCR 7XX */
200 hpc_platid_submodel = 2; /* MCR 700A */
201 break;
202
203 case MACHINE_HPCMIPS_NEC_MOBILEPRO_880:
204 /* 168 MHz VR4121 */
205 machine->machine_name = "NEC MobilePro 880";
206 machine->stable = 1;
207 hpc_fb_addr = 0xa0ea600;
208 hpc_fb_xsize = 800;
209 hpc_fb_ysize = 600;
210 hpc_fb_xsize_mem = 800;
211 hpc_fb_ysize_mem = 600;
212 hpc_fb_bits = 16;
213 hpc_fb_encoding = BIFB_D16_0000;
214
215 dev_vr41xx_init(machine, machine->memory, 4121);
216
217 hpc_platid_cpu_arch = 1; /* MIPS */
218 hpc_platid_cpu_series = 1; /* VR */
219 hpc_platid_cpu_model = 1; /* VR41XX */
220 hpc_platid_cpu_submodel = 3; /* VR4121 */
221 hpc_platid_vendor = 1; /* NEC */
222 hpc_platid_series = 2; /* NEC MCR */
223 hpc_platid_model = 3; /* MCR 7XX */
224 hpc_platid_submodel = 4; /* MCR 730A */
225 break;
226
227 case MACHINE_HPCMIPS_AGENDA_VR3:
228 /* 66 MHz VR4181 */
229 machine->machine_name = "Agenda VR3";
230 /* TODO: */
231 hpc_fb_addr = 0x1000;
232 hpc_fb_xsize = 160;
233 hpc_fb_ysize = 240;
234 hpc_fb_xsize_mem = 160;
235 hpc_fb_ysize_mem = 240;
236 hpc_fb_bits = 4;
237 hpc_fb_encoding = BIFB_D4_M2L_F;
238
239 dev_vr41xx_init(machine, machine->memory, 4181);
240
241 /* TODO: Hm... irq 17 according to linux, but
242 VRIP_INTR_SIU (=9) here? */
243 {
244 int x;
245 snprintf(tmpstr, sizeof(tmpstr),
246 "ns16550 irq=%i addr=0x0c000010", 8+VRIP_INTR_SIU);
247 x = (size_t)device_add(machine, tmpstr);
248
249 if (!machine->use_x11)
250 machine->main_console_handle = x;
251 }
252
253 hpc_platid_cpu_arch = 1; /* MIPS */
254 hpc_platid_cpu_series = 1; /* VR */
255 hpc_platid_cpu_model = 1; /* VR41XX */
256 hpc_platid_cpu_submodel = 4; /* VR4181 */
257 hpc_platid_vendor = 15; /* Agenda */
258 hpc_platid_series = 1; /* VR */
259 hpc_platid_model = 1; /* VR3 */
260 hpc_platid_submodel = 0; /* - */
261
262 dev_ram_init(machine, 0x0f000000, 0x01000000,
263 DEV_RAM_MIRROR | DEV_RAM_MIGHT_POINT_TO_DEVICES, 0x0);
264 break;
265
266 case MACHINE_HPCMIPS_IBM_WORKPAD_Z50:
267 /* 131 MHz VR4121 */
268 machine->machine_name = "IBM Workpad Z50";
269 /* TODO: */
270 hpc_fb_addr = 0xa000000;
271 hpc_fb_xsize = 640;
272 hpc_fb_ysize = 480;
273 hpc_fb_xsize_mem = 640;
274 hpc_fb_ysize_mem = 480;
275 hpc_fb_bits = 16;
276 hpc_fb_encoding = BIFB_D16_0000;
277
278 dev_vr41xx_init(machine, machine->memory, 4121);
279
280 hpc_platid_cpu_arch = 1; /* MIPS */
281 hpc_platid_cpu_series = 1; /* VR */
282 hpc_platid_cpu_model = 1; /* VR41XX */
283 hpc_platid_cpu_submodel = 3; /* VR4121 */
284 hpc_platid_vendor = 9; /* IBM */
285 hpc_platid_series = 1; /* WorkPad */
286 hpc_platid_model = 1; /* Z50 */
287 hpc_platid_submodel = 0; /* 0 */
288 break;
289
290 default:printf("Unimplemented hpcmips machine number.\n");
291 exit(1);
292 }
293
294 store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu,
295 (hpc_platid_cpu_arch << 26) + (hpc_platid_cpu_series << 20)
296 + (hpc_platid_cpu_model << 14) + (hpc_platid_cpu_submodel << 8)
297 + hpc_platid_flags);
298 store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.
299 platid_machine, (hpc_platid_vendor << 22) + (hpc_platid_series<<16)
300 + (hpc_platid_model << 8) + hpc_platid_submodel);
301
302 if (hpc_fb_addr != 0) {
303 dev_fb_init(machine, machine->memory, hpc_fb_addr, VFB_HPC,
304 hpc_fb_xsize, hpc_fb_ysize,
305 hpc_fb_xsize_mem, hpc_fb_ysize_mem,
306 hpc_fb_bits, machine->machine_name);
307
308 /* NetBSD/hpcmips uses framebuffer at physical
309 address 0x8.......: */
310 dev_ram_init(machine, 0x80000000, 0x20000000,
311 DEV_RAM_MIRROR | DEV_RAM_MIGHT_POINT_TO_DEVICES, 0x0);
312 }
313
314 if (!machine->prom_emulation)
315 return;
316
317
318 /* NetBSD/hpcmips and possibly others expects the following: */
319
320 cpu->cd.mips.gpr[MIPS_GPR_A0] = 1; /* argc */
321 cpu->cd.mips.gpr[MIPS_GPR_A1] = machine->physical_ram_in_mb * 1048576
322 + 0xffffffff80000000ULL - 512; /* argv */
323 cpu->cd.mips.gpr[MIPS_GPR_A2] = machine->physical_ram_in_mb * 1048576
324 + 0xffffffff80000000ULL - 256; /* ptr to hpc_bootinfo */
325
326 machine->bootstr = machine->boot_kernel_filename;
327 store_32bit_word(cpu, 0x80000000ULL + (machine->physical_ram_in_mb <<
328 20) - 512, 0x80000000ULL + (machine->physical_ram_in_mb << 20)
329 - 512 + 16);
330 store_32bit_word(cpu, 0x80000000ULL + (machine->physical_ram_in_mb <<
331 20) - 512 + 4, 0);
332 store_string(cpu, 0x80000000ULL + (machine->physical_ram_in_mb <<
333 20) - 512 + 16, machine->bootstr);
334
335 /* Special case for the Agenda VR3: */
336 if (machine->machine_subtype == MACHINE_HPCMIPS_AGENDA_VR3) {
337 const int tmplen = 1000;
338 char *tmp = malloc(tmplen);
339
340 cpu->cd.mips.gpr[MIPS_GPR_A0] = 2; /* argc */
341
342 store_32bit_word(cpu, 0x80000000 + machine->physical_ram_in_mb
343 * 1048576-512 + 4, 0x80000000 + machine->physical_ram_in_mb
344 * 1048576 - 512 + 64);
345 store_32bit_word(cpu, 0x80000000 + machine->physical_ram_in_mb
346 * 1048576 - 512 + 8, 0);
347
348 snprintf(tmp, tmplen, "root=/dev/rom video=vr4181fb:xres:160,y"
349 "res:240,bpp:4,gray,hpck:3084,inv ether=0,0x03fe0300,eth0");
350 tmp[tmplen-1] = '\0';
351
352 if (!machine->use_x11)
353 snprintf(tmp+strlen(tmp), tmplen-strlen(tmp),
354 " console=ttyS0,115200");
355 tmp[tmplen-1] = '\0';
356
357 if (machine->boot_string_argument[0])
358 snprintf(tmp+strlen(tmp), tmplen-strlen(tmp), " %s",
359 machine->boot_string_argument);
360 tmp[tmplen-1] = '\0';
361
362 store_string(cpu, 0x80000000 + machine->physical_ram_in_mb
363 * 1048576 - 512 + 64, tmp);
364
365 machine->bootarg = tmp;
366 } else if (machine->boot_string_argument[0]) {
367 cpu->cd.mips.gpr[MIPS_GPR_A0] ++; /* argc */
368
369 store_32bit_word(cpu, 0x80000000 + machine->physical_ram_in_mb
370 * 1048576-512 + 4, 0x80000000 + machine->physical_ram_in_mb
371 * 1048576 - 512 + 64);
372 store_32bit_word(cpu, 0x80000000 + machine->physical_ram_in_mb
373 * 1048576 - 512 + 8, 0);
374
375 store_string(cpu, 0x80000000 + machine->physical_ram_in_mb *
376 1048576 - 512 + 64, machine->boot_string_argument);
377
378 machine->bootarg = machine->boot_string_argument;
379 }
380
381 store_16bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.length,
382 sizeof(hpc_bootinfo));
383 store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.magic,
384 HPC_BOOTINFO_MAGIC);
385 store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.fb_addr,
386 0x80000000 + hpc_fb_addr);
387 store_16bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.
388 fb_line_bytes, hpc_fb_xsize_mem * (((hpc_fb_bits-1)|7)+1) / 8);
389 store_16bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.fb_width,
390 hpc_fb_xsize);
391 store_16bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.fb_height,
392 hpc_fb_ysize);
393 store_16bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.fb_type,
394 hpc_fb_encoding);
395 store_16bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.bi_cnuse,
396 BI_CNUSE_BUILTIN); /* _BUILTIN or _SERIAL */
397
398 /* printf("hpc_bootinfo.platid_cpu = 0x%08x\n",
399 hpc_bootinfo.platid_cpu);
400 printf("hpc_bootinfo.platid_machine = 0x%08x\n",
401 hpc_bootinfo.platid_machine); */
402 store_32bit_word_in_host(cpu,(unsigned char *)&hpc_bootinfo.timezone,0);
403 store_buf(cpu, 0x80000000 + machine->physical_ram_in_mb *
404 1048576 - 256, (char *)&hpc_bootinfo, sizeof(hpc_bootinfo));
405 }
406
407
408 MACHINE_DEFAULT_CPU(hpcmips)
409 {
410 switch (machine->machine_subtype) {
411 case MACHINE_HPCMIPS_CASIO_BE300:
412 machine->cpu_name = strdup("VR4131");
413 break;
414 case MACHINE_HPCMIPS_CASIO_E105:
415 machine->cpu_name = strdup("VR4121");
416 break;
417 case MACHINE_HPCMIPS_NEC_MOBILEPRO_770:
418 case MACHINE_HPCMIPS_NEC_MOBILEPRO_780:
419 case MACHINE_HPCMIPS_NEC_MOBILEPRO_800:
420 case MACHINE_HPCMIPS_NEC_MOBILEPRO_880:
421 machine->cpu_name = strdup("VR4121");
422 break;
423 case MACHINE_HPCMIPS_AGENDA_VR3:
424 machine->cpu_name = strdup("VR4181");
425 break;
426 case MACHINE_HPCMIPS_IBM_WORKPAD_Z50:
427 machine->cpu_name = strdup("VR4121");
428 break;
429 default:printf("Unimplemented HPCMIPS model?\n");
430 exit(1);
431 }
432 }
433
434
435 MACHINE_DEFAULT_RAM(hpcmips)
436 {
437 /* Most have 32 MB by default. */
438 machine->physical_ram_in_mb = 32;
439
440 switch (machine->machine_subtype) {
441 case MACHINE_HPCMIPS_CASIO_BE300:
442 machine->physical_ram_in_mb = 16;
443 break;
444 case MACHINE_HPCMIPS_CASIO_E105:
445 machine->physical_ram_in_mb = 32;
446 break;
447 case MACHINE_HPCMIPS_AGENDA_VR3:
448 machine->physical_ram_in_mb = 16;
449 break;
450 }
451 }
452
453
454 MACHINE_REGISTER(hpcmips)
455 {
456 MR_DEFAULT(hpcmips, "Handhelp MIPS (HPCmips)",
457 ARCH_MIPS, MACHINE_HPCMIPS);
458
459 machine_entry_add_alias(me, "hpcmips");
460
461 machine_entry_add_subtype(me, "Casio Cassiopeia BE-300",
462 MACHINE_HPCMIPS_CASIO_BE300, "be-300", "be300", NULL);
463
464 machine_entry_add_subtype(me, "Casio Cassiopeia E-105",
465 MACHINE_HPCMIPS_CASIO_E105, "e-105", "e105", NULL);
466
467 machine_entry_add_subtype(me, "Agenda VR3", MACHINE_HPCMIPS_AGENDA_VR3,
468 "agenda", "vr3", NULL);
469
470 machine_entry_add_subtype(me, "IBM WorkPad Z50",
471 MACHINE_HPCMIPS_IBM_WORKPAD_Z50, "workpad", "z50", NULL);
472
473 machine_entry_add_subtype(me, "NEC MobilePro 770",
474 MACHINE_HPCMIPS_NEC_MOBILEPRO_770, "mobilepro770", NULL);
475
476 machine_entry_add_subtype(me, "NEC MobilePro 780",
477 MACHINE_HPCMIPS_NEC_MOBILEPRO_780, "mobilepro780", NULL);
478
479 machine_entry_add_subtype(me, "NEC MobilePro 800",
480 MACHINE_HPCMIPS_NEC_MOBILEPRO_800, "mobilepro800", NULL);
481
482 machine_entry_add_subtype(me, "NEC MobilePro 880",
483 MACHINE_HPCMIPS_NEC_MOBILEPRO_880, "mobilepro880", NULL);
484
485 me->set_default_ram = machine_default_ram_hpcmips;
486 }
487
  ViewVC Help
Powered by ViewVC 1.1.26