/[gxemul]/trunk/src/machines/machine_evbmips.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/machines/machine_evbmips.c

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Revision 38 - (show annotations)
Mon Oct 8 16:21:53 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 6214 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1515 2007/04/14 05:39:46 debug Exp $
20070324	Adding a "--debug" option to the configure script, to disable
		optimizations in unstable development builds.
		Moving out SCSI-specific stuff from diskimage.c into a new
		diskimage_scsicmd.c.
		Applying Hĺvard Eidnes' patch for SCSICDROM_READ_DISKINFO and
		SCSICDROM_READ_TRACKINFO. (Not really tested yet.)
		Implementing disk image "overlays" (to allow simple roll-back
		to previous disk state). Adding a 'V' disk flag for this, and
		updating the man page and misc.html.
20070325	Stability fix to cpu_dyntrans.c, when multiple physical pages
		share the same initial table entry. (The ppp == NULL check
		should be physpage_ofs == 0.) Bug found by analysing GXemul
		against a version patched for Godson.
		Fixing a second occurance of the same problem (also in
		cpu_dyntrans.c).
		Fixing a MAJOR physical page leak in cpu_dyntrans.c; pages
		weren't _added_ to the set of translated pages, they _replaced_
		all previous pages. It's amazing that this bug has been able
		to live for this long. (Triggered when emulating >128MB RAM.)
20070326	Removing the GDB debugging stub support; it was too hackish
		and ugly.
20070328	Moving around some native code generation skeleton code.
20070329	The -lm check in the configure script now also checks for sin()
		in addition to sqrt(). (Thanks to Nigel Horne for noticing that
		sqrt was not enough on Fedora Core 6.) (Not verified yet.)
20070330	Fixing an indexing bug in dev_sh4.c, found by using gcc version
		4.3.0 20070323.
20070331	Some more experimentation with native code generation.
20070404	Attempting to fix some more SH4 SCIF interrupt bugs; rewriting
		the SH interrupt assertion/deassertion code somewhat.
20070410	Splitting src/file.c into separate files in src/file/.
		Cleanup: Removing the dummy TS7200, Walnut, PB1000, and
		Meshcube emulation modes, and dev_epcom and dev_au1x00.
		Removing the experimental CHIP8/RCA180x code; it wasn't really
		working much lately, anyway. It was fun while it lasted.
		Also removing the experimental Transputer CPU support.
20070412	Moving the section about how the dynamic translation system
		works from intro.html to a separate translation.html file.
		Minor SH fixes; attempting to get OpenBSD/landisk to run
		without randomly bugging out, but no success yet.
20070413	SH SCI (serial bit interface) should now work together with a
		(new) RS5C313 clock device (for Landisk emulation).
20070414	Moving Redhat/MIPS down from supported to experimental, in
		guestoses.html.
		Preparing for a new release; doing some regression testing etc.

==============  RELEASE 0.4.5  ==============


1 /*
2 * Copyright (C) 2005-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: machine_evbmips.c,v 1.20 2007/04/10 16:51:35 debug Exp $
29 */
30
31 #include <stdio.h>
32 #include <stdlib.h>
33 #include <string.h>
34
35 #include "bus_isa.h"
36 #include "bus_pci.h"
37 #include "cpu.h"
38 #include "device.h"
39 #include "devices.h"
40 #include "machine.h"
41 #include "memory.h"
42 #include "misc.h"
43
44 #include "maltareg.h"
45
46
47 MACHINE_SETUP(evbmips)
48 {
49 char tmpstr[1000], tmpstr2[1000];
50 struct pci_data *pci_data;
51 int i;
52
53 /* See http://www.netbsd.org/Ports/evbmips/ for more info. */
54
55 switch (machine->machine_subtype) {
56 case MACHINE_EVBMIPS_MALTA:
57 case MACHINE_EVBMIPS_MALTA_BE:
58 if (machine->emulated_hz == 0)
59 machine->emulated_hz = 33000000;
60 cpu->byte_order = EMUL_LITTLE_ENDIAN;
61 machine->machine_name = "MALTA (evbmips, little endian)";
62 machine->stable = 1;
63
64 if (machine->machine_subtype == MACHINE_EVBMIPS_MALTA_BE) {
65 machine->machine_name = "MALTA (evbmips, big endian)";
66 cpu->byte_order = EMUL_BIG_ENDIAN;
67 }
68
69 /* ISA bus at MIPS irq 2: */
70 snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
71 machine->path, machine->bootstrap_cpu);
72 bus_isa_init(machine, tmpstr, 0, 0x18000000, 0x10000000);
73
74 snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%s.cpu[%i].4 "
75 "addr=0x%x name2=tty2 in_use=0", machine->path,
76 machine->bootstrap_cpu, MALTA_CBUSUART);
77 device_add(machine, tmpstr);
78
79 /* Add a GT controller; timer interrupts at ISA irq 9: */
80 snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2.isa.9",
81 machine->path, machine->bootstrap_cpu);
82 snprintf(tmpstr2, sizeof(tmpstr2), "%s.cpu[%i].2",
83 machine->path, machine->bootstrap_cpu);
84 pci_data = dev_gt_init(machine, machine->memory, 0x1be00000,
85 tmpstr, tmpstr2, 120);
86
87 if (machine->use_x11) {
88 if (strlen(machine->boot_string_argument) < 3) {
89 fatal("WARNING: remember to use -o 'console="
90 "tty0' if you are emulating Linux. (Not"
91 " needed for NetBSD.)\n");
92 }
93 bus_pci_add(machine, pci_data, machine->memory,
94 0, 8, 0, "s3_virge");
95 }
96
97 bus_pci_add(machine, pci_data, machine->memory,
98 0, 9, 0, "piix4_isa");
99 bus_pci_add(machine, pci_data, machine->memory,
100 0, 9, 1, "piix4_ide");
101
102 /* pcn: Not yet, since it is just a bogus device, so far. */
103 /* bus_pci_add(machine, pci_data, machine->memory,
104 0, 11, 0, "pcn"); */
105
106 device_add(machine, "malta_lcd addr=0x1f000400");
107 break;
108
109 default:fatal("Unimplemented EVBMIPS model.\n");
110 exit(1);
111 }
112
113 if (!machine->prom_emulation)
114 return;
115
116
117 /* NetBSD/evbmips wants these: (at least for Malta) */
118
119 /* a0 = argc */
120 cpu->cd.mips.gpr[MIPS_GPR_A0] = 2;
121
122 /* a1 = argv */
123 cpu->cd.mips.gpr[MIPS_GPR_A1] = (int32_t)0x9fc01000;
124 store_32bit_word(cpu, (int32_t)0x9fc01000, 0x9fc01040);
125 store_32bit_word(cpu, (int32_t)0x9fc01004, 0x9fc01200);
126 store_32bit_word(cpu, (int32_t)0x9fc01008, 0);
127
128 machine->bootstr = strdup(machine->boot_kernel_filename);
129 machine->bootarg = strdup(machine->boot_string_argument);
130 store_string(cpu, (int32_t)0x9fc01040, machine->bootstr);
131 store_string(cpu, (int32_t)0x9fc01200, machine->bootarg);
132
133 /* a2 = (yamon_env_var *)envp */
134 cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;
135
136 yamon_machine_setup(machine, cpu->cd.mips.gpr[MIPS_GPR_A2]);
137
138 /* a3 = memsize */
139 cpu->cd.mips.gpr[MIPS_GPR_A3] = machine->physical_ram_in_mb * 1048576;
140 /* Hm. Linux ignores a3. */
141
142 /*
143 * TODO:
144 * Core ID numbers.
145 * How much of this is not valid for PBxxxx?
146 *
147 * See maltareg.h for more info.
148 */
149 store_32bit_word(cpu, (int32_t)(0x80000000 + MALTA_REVISION),
150 (1 << 10) + 0x26);
151
152 /* Call vectors at 0x9fc005xx: */
153 for (i=0; i<0x100; i+=4)
154 store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00500 + i,
155 (int64_t)(int32_t)0x9fc00800 + i);
156
157 /* "Magic trap" PROM instructions at 0x9fc008xx: */
158 for (i=0; i<0x100; i+=4)
159 store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00800 + i,
160 0x00c0de0c);
161 }
162
163
164 MACHINE_DEFAULT_CPU(evbmips)
165 {
166 switch (machine->machine_subtype) {
167
168 case MACHINE_EVBMIPS_MALTA:
169 case MACHINE_EVBMIPS_MALTA_BE:
170 machine->cpu_name = strdup("5Kc");
171 break;
172
173 default:fatal("Unimplemented evbmips subtype.\n");
174 exit(1);
175 }
176 }
177
178
179 MACHINE_DEFAULT_RAM(evbmips)
180 {
181 /* MeshCube is always (?) 64 MB, and the others work fine
182 with 64 MB too. */
183 machine->physical_ram_in_mb = 64;
184 }
185
186
187 MACHINE_REGISTER(evbmips)
188 {
189 MR_DEFAULT(evbmips, "MIPS evaluation boards (evbmips)",
190 ARCH_MIPS, MACHINE_EVBMIPS);
191
192 machine_entry_add_alias(me, "evbmips");
193
194 machine_entry_add_subtype(me, "Malta", MACHINE_EVBMIPS_MALTA,
195 "malta", NULL);
196
197 machine_entry_add_subtype(me, "Malta (Big-Endian)",
198 MACHINE_EVBMIPS_MALTA_BE, "maltabe", NULL);
199
200 me->set_default_ram = machine_default_ram_evbmips;
201 }
202

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