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/* |
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* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: machine_evbmips.c,v 1.30 2007/06/17 02:17:45 debug Exp $ |
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* |
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* COMMENT: MIPS evaluation boards (e.g. Malta) |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "bus_isa.h" |
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#include "bus_pci.h" |
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#include "cpu.h" |
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#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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#include "maltareg.h" |
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|
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|
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MACHINE_SETUP(evbmips) |
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{ |
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char tmpstr[1000], tmpstr2[1000]; |
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struct pci_data *pci_data; |
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int i; |
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|
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/* See http://www.netbsd.org/ports/evbmips/ for more info. */ |
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|
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switch (machine->machine_subtype) { |
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|
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case MACHINE_EVBMIPS_MALTA: |
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case MACHINE_EVBMIPS_MALTA_BE: |
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if (machine->emulated_hz == 0) |
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machine->emulated_hz = 33000000; |
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cpu->byte_order = EMUL_LITTLE_ENDIAN; |
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machine->machine_name = "MALTA (evbmips, little endian)"; |
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|
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if (machine->machine_subtype == MACHINE_EVBMIPS_MALTA_BE) { |
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machine->machine_name = "MALTA (evbmips, big endian)"; |
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cpu->byte_order = EMUL_BIG_ENDIAN; |
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} |
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|
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/* ISA bus at MIPS irq 2: */ |
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snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2", |
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machine->path, machine->bootstrap_cpu); |
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bus_isa_init(machine, tmpstr, 0, 0x18000000, 0x10000000); |
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|
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snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%s.cpu[%i].4 " |
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"addr=0x%x name2=tty2 in_use=0", machine->path, |
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machine->bootstrap_cpu, MALTA_CBUSUART); |
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device_add(machine, tmpstr); |
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|
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/* Add a GT controller; timer interrupts at ISA irq 9: */ |
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snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2.isa.9", |
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machine->path, machine->bootstrap_cpu); |
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snprintf(tmpstr2, sizeof(tmpstr2), "%s.cpu[%i].2", |
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machine->path, machine->bootstrap_cpu); |
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pci_data = dev_gt_init(machine, machine->memory, 0x1be00000, |
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tmpstr, tmpstr2, 120); |
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|
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if (machine->x11_md.in_use) { |
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if (strlen(machine->boot_string_argument) < 3) { |
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fatal("WARNING: remember to use -o 'console=" |
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"tty0' if you are emulating Linux. (Not" |
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" needed for NetBSD.)\n"); |
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} |
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bus_pci_add(machine, pci_data, machine->memory, |
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0, 8, 0, "s3_virge"); |
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} |
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|
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bus_pci_add(machine, pci_data, machine->memory, |
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0, 9, 0, "piix4_isa"); |
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bus_pci_add(machine, pci_data, machine->memory, |
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0, 9, 1, "piix4_ide"); |
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|
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/* pcn: Not yet, since it is just a bogus device, so far. */ |
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/* bus_pci_add(machine, pci_data, machine->memory, |
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0, 11, 0, "pcn"); */ |
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|
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device_add(machine, "malta_lcd addr=0x1f000400"); |
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break; |
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|
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default:fatal("Unimplemented EVBMIPS model.\n"); |
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exit(1); |
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} |
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|
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if (!machine->prom_emulation) |
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return; |
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|
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|
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/* NetBSD/evbmips wants these: (at least for Malta) */ |
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|
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/* a0 = argc */ |
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cpu->cd.mips.gpr[MIPS_GPR_A0] = 2; |
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|
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/* a1 = argv */ |
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cpu->cd.mips.gpr[MIPS_GPR_A1] = (int32_t)0x9fc01000; |
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store_32bit_word(cpu, (int32_t)0x9fc01000, 0x9fc01040); |
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store_32bit_word(cpu, (int32_t)0x9fc01004, 0x9fc01200); |
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store_32bit_word(cpu, (int32_t)0x9fc01008, 0); |
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|
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machine->bootstr = strdup(machine->boot_kernel_filename); |
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machine->bootarg = strdup(machine->boot_string_argument); |
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store_string(cpu, (int32_t)0x9fc01040, machine->bootstr); |
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store_string(cpu, (int32_t)0x9fc01200, machine->bootarg); |
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|
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/* a2 = (yamon_env_var *)envp */ |
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cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800; |
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|
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yamon_machine_setup(machine, cpu->cd.mips.gpr[MIPS_GPR_A2]); |
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|
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/* a3 = memsize */ |
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cpu->cd.mips.gpr[MIPS_GPR_A3] = machine->physical_ram_in_mb * 1048576; |
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/* Hm. Linux ignores a3. */ |
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|
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/* Set the Core ID. See maltareg.h for more info. */ |
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store_32bit_word(cpu, (int32_t)(0x80000000 + MALTA_REVISION), |
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(1 << 10) + 0x26); |
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|
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/* Call vectors at 0x9fc005xx: */ |
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for (i=0; i<0x100; i+=4) |
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store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00500 + i, |
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(int64_t)(int32_t)0x9fc00800 + i); |
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|
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/* "Magic trap" PROM instructions at 0x9fc008xx: */ |
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for (i=0; i<0x100; i+=4) |
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store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00800 + i, |
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0x00c0de0c); |
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} |
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|
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|
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MACHINE_DEFAULT_CPU(evbmips) |
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{ |
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switch (machine->machine_subtype) { |
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|
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case MACHINE_EVBMIPS_MALTA: |
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case MACHINE_EVBMIPS_MALTA_BE: |
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/* 5Kc = MIPS64 rev 1, 5KE = MIPS64 rev 2 */ |
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machine->cpu_name = strdup("5Kc"); |
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break; |
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|
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default:fatal("Unimplemented evbmips subtype.\n"); |
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exit(1); |
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} |
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} |
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|
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|
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MACHINE_DEFAULT_RAM(evbmips) |
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{ |
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machine->physical_ram_in_mb = 128; |
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} |
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|
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|
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MACHINE_REGISTER(evbmips) |
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{ |
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MR_DEFAULT(evbmips, "MIPS evaluation boards (evbmips)", |
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ARCH_MIPS, MACHINE_EVBMIPS); |
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|
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machine_entry_add_alias(me, "evbmips"); |
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|
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machine_entry_add_subtype(me, "Malta", MACHINE_EVBMIPS_MALTA, |
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"malta", NULL); |
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|
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machine_entry_add_subtype(me, "Malta (Big-Endian)", |
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MACHINE_EVBMIPS_MALTA_BE, "maltabe", NULL); |
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|
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me->set_default_ram = machine_default_ram_evbmips; |
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} |
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