/[gxemul]/trunk/src/machines/machine_evbmips.c
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revision 26 by dpavlin, Mon Oct 8 16:20:10 2007 UTC revision 34 by dpavlin, Mon Oct 8 16:21:17 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_evbmips.c,v 1.7 2006/06/24 10:19:19 debug Exp $   *  $Id: machine_evbmips.c,v 1.19 2007/01/28 00:41:17 debug Exp $
29   */   */
30    
31  #include <stdio.h>  #include <stdio.h>
# Line 38  Line 38 
38  #include "device.h"  #include "device.h"
39  #include "devices.h"  #include "devices.h"
40  #include "machine.h"  #include "machine.h"
 #include "machine_interrupts.h"  
41  #include "memory.h"  #include "memory.h"
42  #include "misc.h"  #include "misc.h"
43    
# Line 47  Line 46 
46    
47  MACHINE_SETUP(evbmips)  MACHINE_SETUP(evbmips)
48  {  {
49          char tmpstr[1000];          char tmpstr[1000], tmpstr2[1000];
         char tmps[50];  
         uint64_t env, tmpptr;  
50          struct pci_data *pci_data;          struct pci_data *pci_data;
51          int i;          int i;
52    
# Line 58  MACHINE_SETUP(evbmips) Line 55  MACHINE_SETUP(evbmips)
55          switch (machine->machine_subtype) {          switch (machine->machine_subtype) {
56          case MACHINE_EVBMIPS_MALTA:          case MACHINE_EVBMIPS_MALTA:
57          case MACHINE_EVBMIPS_MALTA_BE:          case MACHINE_EVBMIPS_MALTA_BE:
58                    if (machine->emulated_hz == 0)
59                            machine->emulated_hz = 33000000;
60                  cpu->byte_order = EMUL_LITTLE_ENDIAN;                  cpu->byte_order = EMUL_LITTLE_ENDIAN;
61                  machine->machine_name = "MALTA (evbmips, little endian)";                  machine->machine_name = "MALTA (evbmips, little endian)";
62                  machine->stable = 1;                  machine->stable = 1;
# Line 67  MACHINE_SETUP(evbmips) Line 66  MACHINE_SETUP(evbmips)
66                          cpu->byte_order = EMUL_BIG_ENDIAN;                          cpu->byte_order = EMUL_BIG_ENDIAN;
67                  }                  }
68    
69                  machine->md_interrupt = isa8_interrupt;                  /*  ISA bus at MIPS irq 2:  */
70                  machine->isa_pic_data.native_irq = 2;                  snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
71                        machine->path, machine->bootstrap_cpu);
72                  bus_isa_init(machine, 0, 0x18000000, 0x10000000, 8, 24);                  bus_isa_init(machine, tmpstr, 0, 0x18000000, 0x10000000);
73    
74                  snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=4 addr=0x%x"                  snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%s.cpu[%i].4 "
75                      " name2=tty2 in_use=0", MALTA_CBUSUART);                      "addr=0x%x name2=tty2 in_use=0", machine->path,
76                        machine->bootstrap_cpu, MALTA_CBUSUART);
77                  device_add(machine, tmpstr);                  device_add(machine, tmpstr);
78    
79                    /*  Add a GT controller; timer interrupts at ISA irq 9:  */
80                    snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2.isa.9",
81                        machine->path, machine->bootstrap_cpu);
82                    snprintf(tmpstr2, sizeof(tmpstr2), "%s.cpu[%i].2",
83                        machine->path, machine->bootstrap_cpu);
84                  pci_data = dev_gt_init(machine, machine->memory, 0x1be00000,                  pci_data = dev_gt_init(machine, machine->memory, 0x1be00000,
85                      8+9, 8+9, 120);                      tmpstr, tmpstr2, 120);
86    
87                  if (machine->use_x11) {                  if (machine->use_x11) {
88                          if (strlen(machine->boot_string_argument) < 3) {                          if (strlen(machine->boot_string_argument) < 3) {
# Line 94  MACHINE_SETUP(evbmips) Line 99  MACHINE_SETUP(evbmips)
99                  bus_pci_add(machine, pci_data, machine->memory,                  bus_pci_add(machine, pci_data, machine->memory,
100                      0, 9, 1, "piix4_ide");                      0, 9, 1, "piix4_ide");
101    
102                    /*  pcn: Not yet, since it is just a bogus device, so far.  */
103                    /*  bus_pci_add(machine, pci_data, machine->memory,
104                        0, 11, 0, "pcn");  */
105    
106                  device_add(machine, "malta_lcd addr=0x1f000400");                  device_add(machine, "malta_lcd addr=0x1f000400");
107                  break;                  break;
108    
# Line 111  MACHINE_SETUP(evbmips) Line 120  MACHINE_SETUP(evbmips)
120                              "meaningless. Continuing anyway.\n");                              "meaningless. Continuing anyway.\n");
121    
122                  /*  First of all, the MeshCube has an Au1500 in it:  */                  /*  First of all, the MeshCube has an Au1500 in it:  */
123                  machine->md_interrupt = au1x00_interrupt;                  device_add(machine, "au1x00");
                 machine->md_int.au1x00_ic_data = dev_au1x00_init(machine,  
                     machine->memory);  
124    
125                  /*                  /*
126                   *  TODO:  Which non-Au1500 devices, and at what addresses?                   *  TODO:  Which non-Au1500 devices, and at what addresses?
# Line 137  MACHINE_SETUP(evbmips) Line 144  MACHINE_SETUP(evbmips)
144                  machine->machine_name = "PB1000 (evbmips)";                  machine->machine_name = "PB1000 (evbmips)";
145                  cpu->byte_order = EMUL_BIG_ENDIAN;                  cpu->byte_order = EMUL_BIG_ENDIAN;
146    
147                  machine->md_interrupt = au1x00_interrupt;                  device_add(machine, "au1x00");
148                  machine->md_int.au1x00_ic_data = dev_au1x00_init(machine,  
                     machine->memory);  
149                  /*  TODO  */                  /*  TODO  */
150                  break;                  break;
151    
# Line 170  MACHINE_SETUP(evbmips) Line 176  MACHINE_SETUP(evbmips)
176          /*  a2 = (yamon_env_var *)envp  */          /*  a2 = (yamon_env_var *)envp  */
177          cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;          cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;
178    
179          env = cpu->cd.mips.gpr[MIPS_GPR_A2];          yamon_machine_setup(machine, cpu->cd.mips.gpr[MIPS_GPR_A2]);
         tmpptr = 0xffffffff9fc01c00ULL;  
   
         snprintf(tmps, sizeof(tmps), "0x%08x", machine->physical_ram_in_mb<<20);  
         add_environment_string_dual(cpu, &env, &tmpptr, "memsize", tmps);  
   
         add_environment_string_dual(cpu, &env, &tmpptr, "yamonrev", "02.06");  
   
         /*  End of env:  */  
         tmpptr = 0;  
         add_environment_string_dual(cpu,  
                     &env, &tmpptr, NULL, NULL);  
180    
181          /*  a3 = memsize  */          /*  a3 = memsize  */
182          cpu->cd.mips.gpr[MIPS_GPR_A3] = machine->physical_ram_in_mb * 1048576;          cpu->cd.mips.gpr[MIPS_GPR_A3] = machine->physical_ram_in_mb * 1048576;
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