/[gxemul]/trunk/src/machines/machine_evbmips.c
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Annotation of /trunk/src/machines/machine_evbmips.c

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Revision 30 - (hide annotations)
Mon Oct 8 16:20:40 2007 UTC (16 years, 7 months ago) by dpavlin
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File size: 7776 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1325 2006/08/15 15:38:37 debug Exp $
20060723	More Transputer instructions (pfix, nfix, opr, mint, ldl, ldlp,
		eqc, rev, ajw, stl, stlf, sthf, sub, ldnl, ldnlp, ldpi, move,
		wcnt, add, bcnt).
		Adding more SPARC instructions (andcc, addcc, bl, rdpr).
		Progress on the igsfb framebuffer used by NetBSD/netwinder.
		Enabling 8-bit fills in dev_fb.
		NetBSD/netwinder 3.0.1 can now run from a disk image :-)
20060724	Cleanup/performance fix for 64-bit virtual translation table
		updates (by removing the "timestamp" stuff). A full NetBSD/pmax
		3.0.1 install for R4400 has dropped from 667 seconds to 584 :)
		Fixing the igsfb "almost vga" color (it is 24-bit, not 18-bit).
		Adding some MIPS instruction combinations (3*lw, and 3*addu).
		The 8048 keyboard now turns off interrupt enable between the
		KBR_ACK and the KBR_RSTDONE, to work better with Linux 2.6.
		Not causing PPC DEC interrupts if PPC_NO_DEC is set for a
		specific CPU; NetBSD/bebox gets slightly further than before.
		Adding some more SPARC instructions: branches, udiv.
20060725	Refreshing dev_pckbc.c a little.
		Cleanups for the SH emulation mode, and adding the first
		"compact" (16-bit) instructions: various simple movs, nop,
		shll, stc, or, ldc.
20060726	Adding dummy "pcn" (AMD PCnet NIC) PCI glue.
20060727	Various cleanups; removing stuff from cpu.h, such as
		running_translated (not really meaningful anymore), and
		page flags (breaking into the debugger clears all translations
		anyway).
		Minor MIPS instruction combination updates.
20060807	Expanding the 3*sw and 3*lw MIPS instruction combinations to
		work with 2* and 4* too, resulting in a minor performance gain.
		Implementing a usleep hack for the RM52xx/MIPS32/MIPS64 "wait"
		instruction (when emulating 1 cpu).
20060808	Experimenting with some more MIPS instruction combinations.
		Implementing support for showing a (hardcoded 12x22) text
		cursor in igsfb.
20060809	Simplifying the NetBSD/evbmips (Malta) install instructions
		somewhat (by using a NetBSD/pmax ramdisk install kernel).
20060812	Experimenting more with the MIPS 'wait' instruction.
		PCI configuration register writes can now be handled, which
		allow PCI IDE controllers to work with NetBSD/Malta 3.0.1 and
		NetBSD/cobalt 3.0.1. (Previously only NetBSD 2.1 worked.)
20060813	Updating dev_gt.c based on numbers from Alec Voropay, to enable
		Linux 2.6 to use PCI on Malta.
		Continuing on Algor interrupt stuff.
20060814	Adding support for routing ISA interrupts to two different
		interrupts, making it possible to run NetBSD/algor :-)
20060814-15	Testing for the release.

==============  RELEASE 0.4.2  ==============


1 dpavlin 22 /*
2     * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 30 * $Id: machine_evbmips.c,v 1.8 2006/07/26 08:02:31 debug Exp $
29 dpavlin 22 */
30    
31     #include <stdio.h>
32     #include <stdlib.h>
33     #include <string.h>
34    
35     #include "bus_isa.h"
36     #include "bus_pci.h"
37     #include "cpu.h"
38     #include "device.h"
39     #include "devices.h"
40     #include "machine.h"
41     #include "machine_interrupts.h"
42     #include "memory.h"
43     #include "misc.h"
44    
45     #include "maltareg.h"
46    
47    
48     MACHINE_SETUP(evbmips)
49     {
50     char tmpstr[1000];
51     char tmps[50];
52     uint64_t env, tmpptr;
53     struct pci_data *pci_data;
54     int i;
55    
56     /* See http://www.netbsd.org/Ports/evbmips/ for more info. */
57    
58     switch (machine->machine_subtype) {
59     case MACHINE_EVBMIPS_MALTA:
60     case MACHINE_EVBMIPS_MALTA_BE:
61     cpu->byte_order = EMUL_LITTLE_ENDIAN;
62     machine->machine_name = "MALTA (evbmips, little endian)";
63     machine->stable = 1;
64    
65     if (machine->machine_subtype == MACHINE_EVBMIPS_MALTA_BE) {
66     machine->machine_name = "MALTA (evbmips, big endian)";
67     cpu->byte_order = EMUL_BIG_ENDIAN;
68     }
69    
70     machine->md_interrupt = isa8_interrupt;
71     machine->isa_pic_data.native_irq = 2;
72    
73     bus_isa_init(machine, 0, 0x18000000, 0x10000000, 8, 24);
74    
75     snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=4 addr=0x%x"
76     " name2=tty2 in_use=0", MALTA_CBUSUART);
77     device_add(machine, tmpstr);
78    
79     pci_data = dev_gt_init(machine, machine->memory, 0x1be00000,
80     8+9, 8+9, 120);
81    
82     if (machine->use_x11) {
83     if (strlen(machine->boot_string_argument) < 3) {
84     fatal("WARNING: remember to use -o 'console="
85     "tty0' if you are emulating Linux. (Not"
86     " needed for NetBSD.)\n");
87     }
88     bus_pci_add(machine, pci_data, machine->memory,
89     0, 8, 0, "s3_virge");
90     }
91    
92     bus_pci_add(machine, pci_data, machine->memory,
93     0, 9, 0, "piix4_isa");
94     bus_pci_add(machine, pci_data, machine->memory,
95     0, 9, 1, "piix4_ide");
96    
97 dpavlin 30 bus_pci_add(machine, pci_data, machine->memory,
98     0, 11, 0, "pcn");
99    
100 dpavlin 22 device_add(machine, "malta_lcd addr=0x1f000400");
101     break;
102    
103 dpavlin 24 case MACHINE_EVBMIPS_MESHCUBE:
104     machine->machine_name = "Meshcube";
105    
106     /* See: http://mail-index.netbsd.org/port-evbmips/2006/
107     02/23/0000.html */
108    
109     if (machine->physical_ram_in_mb != 64)
110     fprintf(stderr, "WARNING! MeshCubes are supposed to "
111     "have exactly 64 MB RAM. Continuing anyway.\n");
112     if (machine->use_x11)
113     fprintf(stderr, "WARNING! MeshCube with -X is "
114     "meaningless. Continuing anyway.\n");
115    
116     /* First of all, the MeshCube has an Au1500 in it: */
117     machine->md_interrupt = au1x00_interrupt;
118     machine->md_int.au1x00_ic_data = dev_au1x00_init(machine,
119     machine->memory);
120    
121     /*
122     * TODO: Which non-Au1500 devices, and at what addresses?
123     *
124     * "4G Systems MTX-1 Board" at ?
125     * 1017fffc, 14005004, 11700000, 11700008, 11900014,
126     * 1190002c, 11900100, 11900108, 1190010c,
127     * 10400040 - 10400074,
128     * 14001000 (possibly LCD?)
129     * 11100028 (possibly ttySx?)
130     *
131     * "usb_ohci=base:0x10100000,len:0x100000,irq:26"
132     */
133    
134     /* Linux reads this during startup... */
135     device_add(machine, "random addr=0x1017fffc len=4");
136    
137     break;
138    
139 dpavlin 22 case MACHINE_EVBMIPS_PB1000:
140     machine->machine_name = "PB1000 (evbmips)";
141     cpu->byte_order = EMUL_BIG_ENDIAN;
142    
143     machine->md_interrupt = au1x00_interrupt;
144     machine->md_int.au1x00_ic_data = dev_au1x00_init(machine,
145     machine->memory);
146     /* TODO */
147     break;
148    
149     default:fatal("Unimplemented EVBMIPS model.\n");
150     exit(1);
151     }
152    
153     if (!machine->prom_emulation)
154     return;
155    
156    
157     /* NetBSD/evbmips wants these: (at least for Malta) */
158    
159     /* a0 = argc */
160     cpu->cd.mips.gpr[MIPS_GPR_A0] = 2;
161    
162     /* a1 = argv */
163     cpu->cd.mips.gpr[MIPS_GPR_A1] = (int32_t)0x9fc01000;
164     store_32bit_word(cpu, (int32_t)0x9fc01000, 0x9fc01040);
165     store_32bit_word(cpu, (int32_t)0x9fc01004, 0x9fc01200);
166     store_32bit_word(cpu, (int32_t)0x9fc01008, 0);
167    
168     machine->bootstr = strdup(machine->boot_kernel_filename);
169     machine->bootarg = strdup(machine->boot_string_argument);
170     store_string(cpu, (int32_t)0x9fc01040, machine->bootstr);
171     store_string(cpu, (int32_t)0x9fc01200, machine->bootarg);
172    
173     /* a2 = (yamon_env_var *)envp */
174     cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;
175    
176     env = cpu->cd.mips.gpr[MIPS_GPR_A2];
177     tmpptr = 0xffffffff9fc01c00ULL;
178    
179     snprintf(tmps, sizeof(tmps), "0x%08x", machine->physical_ram_in_mb<<20);
180     add_environment_string_dual(cpu, &env, &tmpptr, "memsize", tmps);
181    
182     add_environment_string_dual(cpu, &env, &tmpptr, "yamonrev", "02.06");
183    
184     /* End of env: */
185     tmpptr = 0;
186     add_environment_string_dual(cpu,
187     &env, &tmpptr, NULL, NULL);
188    
189     /* a3 = memsize */
190     cpu->cd.mips.gpr[MIPS_GPR_A3] = machine->physical_ram_in_mb * 1048576;
191     /* Hm. Linux ignores a3. */
192    
193     /*
194     * TODO:
195     * Core ID numbers.
196     * How much of this is not valid for PBxxxx?
197     *
198     * See maltareg.h for more info.
199     */
200     store_32bit_word(cpu, (int32_t)(0x80000000 + MALTA_REVISION),
201     (1 << 10) + 0x26);
202    
203     /* Call vectors at 0x9fc005xx: */
204     for (i=0; i<0x100; i+=4)
205     store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00500 + i,
206     (int64_t)(int32_t)0x9fc00800 + i);
207 dpavlin 24
208     /* "Magic trap" PROM instructions at 0x9fc008xx: */
209     for (i=0; i<0x100; i+=4)
210     store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00800 + i,
211     0x00c0de0c);
212 dpavlin 22 }
213    
214    
215     MACHINE_DEFAULT_CPU(evbmips)
216     {
217     switch (machine->machine_subtype) {
218     case MACHINE_EVBMIPS_MALTA:
219     case MACHINE_EVBMIPS_MALTA_BE:
220     machine->cpu_name = strdup("5Kc");
221     break;
222 dpavlin 24 case MACHINE_EVBMIPS_MESHCUBE:
223     machine->cpu_name = strdup("AU1500");
224     break;
225 dpavlin 22 case MACHINE_EVBMIPS_PB1000:
226     machine->cpu_name = strdup("AU1000");
227     break;
228     default:fatal("Unimplemented evbmips subtype.\n");
229     exit(1);
230     }
231     }
232    
233    
234     MACHINE_DEFAULT_RAM(evbmips)
235     {
236 dpavlin 24 /* MeshCube is always (?) 64 MB, and the others work fine
237     with 64 MB too. */
238 dpavlin 22 machine->physical_ram_in_mb = 64;
239     }
240    
241    
242     MACHINE_REGISTER(evbmips)
243     {
244 dpavlin 26 MR_DEFAULT(evbmips, "MIPS evaluation boards (evbmips)",
245     ARCH_MIPS, MACHINE_EVBMIPS);
246 dpavlin 24
247 dpavlin 26 machine_entry_add_alias(me, "evbmips");
248 dpavlin 24
249 dpavlin 26 machine_entry_add_subtype(me, "Malta", MACHINE_EVBMIPS_MALTA,
250     "malta", NULL);
251 dpavlin 24
252 dpavlin 26 machine_entry_add_subtype(me, "Malta (Big-Endian)",
253     MACHINE_EVBMIPS_MALTA_BE, "maltabe", NULL);
254 dpavlin 24
255 dpavlin 26 machine_entry_add_subtype(me, "MeshCube", MACHINE_EVBMIPS_MESHCUBE,
256     "meshcube", NULL);
257 dpavlin 24
258 dpavlin 26 machine_entry_add_subtype(me, "PB1000", MACHINE_EVBMIPS_PB1000,
259     "pb1000", NULL);
260 dpavlin 24
261 dpavlin 22 me->set_default_ram = machine_default_ram_evbmips;
262     }
263    

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