/[gxemul]/trunk/src/machines/machine_alpha.c
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Annotation of /trunk/src/machines/machine_alpha.c

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Revision 34 - (hide annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 8269 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============


1 dpavlin 22 /*
2 dpavlin 34 * Copyright (C) 2005-2007 Anders Gavare. All rights reserved.
3 dpavlin 22 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 34 * $Id: machine_alpha.c,v 1.12 2006/12/30 13:31:01 debug Exp $
29 dpavlin 22 */
30    
31     #include <stdio.h>
32     #include <string.h>
33     #include <stdlib.h>
34    
35     #include "cpu.h"
36     #include "device.h"
37     #include "devices.h"
38     #include "machine.h"
39     #include "memory.h"
40     #include "misc.h"
41    
42 dpavlin 24 #include "alpha_autoconf.h"
43 dpavlin 22 #include "alpha_rpb.h"
44    
45    
46     MACHINE_SETUP(alpha)
47     {
48     struct rpb rpb;
49     struct crb crb;
50     struct ctb ctb;
51 dpavlin 24 struct mddt mddt;
52 dpavlin 32 struct pcs *pcs = malloc(sizeof(struct pcs) * machine->ncpus);
53     int i;
54 dpavlin 22
55     switch (machine->machine_subtype) {
56 dpavlin 24
57     case ST_ALPHABOOK1:
58     machine->machine_name = "AlphaBook 1";
59 dpavlin 32 if (machine->emulated_hz == 0)
60     machine->emulated_hz = 233000000;
61 dpavlin 24 device_add(machine, "lca");
62     break;
63    
64     case ST_DEC_4100:
65     machine->machine_name = "AlphaServer 4100";
66     break;
67    
68 dpavlin 22 case ST_DEC_3000_300:
69     machine->machine_name = "DEC 3000/300";
70     machine->main_console_handle = (size_t)device_add(machine,
71     "z8530 addr=0x1b0200000 irq=0 addr_mult=4");
72     break;
73 dpavlin 24
74 dpavlin 22 case ST_EB164:
75     machine->machine_name = "EB164";
76     break;
77 dpavlin 24
78 dpavlin 22 default:fatal("Unimplemented Alpha machine type %i\n",
79     machine->machine_subtype);
80     exit(1);
81     }
82    
83     if (!machine->prom_emulation)
84     return;
85    
86 dpavlin 24 /* These are used by NetBSD/alpha: */
87 dpavlin 22 /* a0 = First free Page Frame Number */
88     /* a1 = PFN of current Level 1 page table */
89     /* a2 = Bootinfo magic */
90     /* a3 = Bootinfo pointer */
91     /* a4 = Bootinfo version */
92     cpu->cd.alpha.r[ALPHA_A0] = 16*1024*1024 / 8192;
93 dpavlin 24 cpu->cd.alpha.r[ALPHA_A1] = 0; /* TODO */
94 dpavlin 32 cpu->cd.alpha.r[ALPHA_A2] = 0; /* Note: NOT ALPHA_BOOTINFO_MAGIC */
95 dpavlin 24 cpu->cd.alpha.r[ALPHA_A3] = 0; /* TODO */
96     cpu->cd.alpha.r[ALPHA_A4] = 1;
97 dpavlin 22
98 dpavlin 24 /*
99     * HWRPB: Hardware Restart Parameter Block
100     *
101     * TODO: Almost everything.
102     */
103 dpavlin 22 memset(&rpb, 0, sizeof(struct rpb));
104     store_64bit_word_in_host(cpu, (unsigned char *)
105 dpavlin 32 &(rpb.rpb_phys), 0x14000);
106 dpavlin 22 strlcpy((char *)&(rpb.rpb_magic), "HWRPB", 8);
107     store_64bit_word_in_host(cpu, (unsigned char *)
108     &(rpb.rpb_size), sizeof(struct rpb));
109     store_64bit_word_in_host(cpu, (unsigned char *)
110     &(rpb.rpb_page_size), 8192);
111 dpavlin 32 strlcpy((char *)&(rpb.rpb_ssn), "123456789", 10);
112 dpavlin 22 store_64bit_word_in_host(cpu, (unsigned char *)
113     &(rpb.rpb_type), machine->machine_subtype);
114     store_64bit_word_in_host(cpu, (unsigned char *)
115 dpavlin 32 &(rpb.rpb_cc_freq), machine->emulated_hz);
116 dpavlin 22 store_64bit_word_in_host(cpu, (unsigned char *)
117 dpavlin 32 &(rpb.rpb_intr_freq), 1024 << 12);
118     store_64bit_word_in_host(cpu, (unsigned char *)
119     &(rpb.rpb_pcs_cnt), machine->ncpus);
120     store_64bit_word_in_host(cpu, (unsigned char *)
121     &(rpb.rpb_pcs_size), sizeof(struct pcs));
122     store_64bit_word_in_host(cpu, (unsigned char *)
123     &(rpb.rpb_pcs_off), PCS_ADDR - HWRPB_ADDR);
124     store_64bit_word_in_host(cpu, (unsigned char *)
125 dpavlin 22 &(rpb.rpb_ctb_off), CTB_ADDR - HWRPB_ADDR);
126     store_64bit_word_in_host(cpu, (unsigned char *)
127     &(rpb.rpb_crb_off), CRB_ADDR - HWRPB_ADDR);
128 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
129     &(rpb.rpb_memdat_off), MEMDAT_ADDR - HWRPB_ADDR);
130 dpavlin 22
131     /* CTB: Console Terminal Block */
132     memset(&ctb, 0, sizeof(struct ctb));
133     store_64bit_word_in_host(cpu, (unsigned char *)
134     &(ctb.ctb_term_type), machine->use_x11?
135     CTB_GRAPHICS : CTB_PRINTERPORT);
136    
137     /* CRB: Console Routine Block */
138     memset(&crb, 0, sizeof(struct crb));
139     store_64bit_word_in_host(cpu, (unsigned char *)
140     &(crb.crb_v_dispatch), CRB_ADDR - 0x100);
141 dpavlin 32 store_64bit_word(cpu, CRB_ADDR - 0x100 + 8, PROM_ENTRY_PADDR);
142 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
143     &(crb.crb_v_fixup), CRB_ADDR - 0x80);
144 dpavlin 32 store_64bit_word(cpu, CRB_ADDR - 0x80 + 8, PROM_ENTRY_PADDR + 0x800);
145 dpavlin 22
146 dpavlin 32 /* PCS: Processor ID etc. */
147     for (i=0; i<machine->ncpus; i++) {
148     memset(&pcs[i], 0, sizeof(struct pcs));
149     store_64bit_word_in_host(cpu, (unsigned char *)
150     &(pcs[i].pcs_flags), PCS_RC | PCS_PA | PCS_PP |
151     PCS_CV | PCS_PV | PCS_PMV | PCS_PL);
152     store_64bit_word_in_host(cpu, (unsigned char *)
153     &(pcs[i].pcs_proc_type),
154     machine->cpus[i]->cd.alpha.cpu_type.pcs_type);
155     }
156    
157 dpavlin 22 /*
158 dpavlin 24 * MDDT: Memory Data Descriptor Table. For now, it is a simple
159     * two-entry table with half of the available RAM in each entry.
160     * (The values are in number of 8K pages.)
161     * The first 16 MB are not included (the kernel lives there).
162     * The last 1 MB is not included either, it is reserved for bootup
163     * and similar.
164     */
165     memset(&mddt, 0, sizeof(struct mddt));
166 dpavlin 32 memset(&mddt.mddt_clusters[0], 0, sizeof(struct mddt_cluster));
167     memset(&mddt.mddt_clusters[1], 0, sizeof(struct mddt_cluster));
168 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
169     &(mddt.mddt_cluster_cnt), 2);
170     store_64bit_word_in_host(cpu, (unsigned char *)
171 dpavlin 32 &(mddt.mddt_clusters[0].mddt_pfn), 16 * 128);
172 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
173     &(mddt.mddt_clusters[0].mddt_pg_cnt),
174 dpavlin 32 (machine->physical_ram_in_mb/2 - 16) * 128);
175 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
176 dpavlin 32 &(mddt.mddt_clusters[1].mddt_pfn),
177     machine->physical_ram_in_mb/2 * 128);
178 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
179 dpavlin 32 &(mddt.mddt_clusters[1].mddt_pg_cnt),
180     (machine->physical_ram_in_mb/2) * 128);
181 dpavlin 24
182     /*
183 dpavlin 32 * Place a special "hack" palcode call at PROM_ENTRY_PADDR and
184     * PROM_ENTRY_PADDR + 0x800:
185 dpavlin 22 * (Hopefully nothing else will be there.)
186     */
187 dpavlin 32 store_32bit_word(cpu, PROM_ENTRY_PADDR, 0x3fffffe);
188     store_32bit_word(cpu, PROM_ENTRY_PADDR + 0x800, 0x3fffffd);
189 dpavlin 22
190     store_buf(cpu, HWRPB_ADDR, (char *)&rpb, sizeof(struct rpb));
191     store_buf(cpu, CTB_ADDR, (char *)&ctb, sizeof(struct ctb));
192     store_buf(cpu, CRB_ADDR, (char *)&crb, sizeof(struct crb));
193 dpavlin 24 store_buf(cpu, MEMDAT_ADDR, (char *)&mddt, sizeof(struct mddt));
194 dpavlin 32 store_buf(cpu, PCS_ADDR, (char *)pcs, sizeof(struct pcs) *
195     machine->ncpus);
196    
197     free(pcs);
198 dpavlin 22 }
199    
200    
201     MACHINE_DEFAULT_CPU(alpha)
202     {
203 dpavlin 24 switch (machine->machine_subtype) {
204    
205     case ST_ALPHABOOK1:
206     machine->cpu_name = strdup("21066");
207     break;
208    
209     case ST_DEC_4100:
210     machine->cpu_name = strdup("21164A-2");
211     break;
212    
213     case ST_DEC_3000_300:
214     machine->cpu_name = strdup("21064");
215     break;
216    
217     case ST_EB164:
218     machine->cpu_name = strdup("21164PC");
219     break;
220    
221     default:fatal("Unimplemented Alpha machine type %i\n",
222     machine->machine_subtype);
223     exit(1);
224     }
225 dpavlin 22 }
226    
227    
228     MACHINE_DEFAULT_RAM(alpha)
229     {
230 dpavlin 32 machine->physical_ram_in_mb = 128;
231 dpavlin 22 }
232    
233    
234     MACHINE_REGISTER(alpha)
235     {
236 dpavlin 26 MR_DEFAULT(alpha, "Alpha", ARCH_ALPHA, MACHINE_ALPHA);
237 dpavlin 24
238 dpavlin 26 machine_entry_add_alias(me, "alpha");
239 dpavlin 24
240 dpavlin 26 machine_entry_add_subtype(me, "AlphaBook 1", ST_ALPHABOOK1,
241     "alphabook1", NULL);
242 dpavlin 24
243 dpavlin 26 machine_entry_add_subtype(me, "AlphaServer 4100", ST_DEC_4100,
244     "alphaserver4100", NULL);
245 dpavlin 24
246 dpavlin 26 machine_entry_add_subtype(me, "DEC 3000/300", ST_DEC_3000_300,
247     "3000/300", NULL);
248 dpavlin 24
249 dpavlin 26 machine_entry_add_subtype(me, "EB164", ST_EB164,
250     "eb164", NULL);
251    
252 dpavlin 22 me->set_default_ram = machine_default_ram_alpha;
253     }
254    

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