/[gxemul]/trunk/src/machines/machine_alpha.c
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Annotation of /trunk/src/machines/machine_alpha.c

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Revision 26 - (hide annotations)
Mon Oct 8 16:20:10 2007 UTC (16 years, 7 months ago) by dpavlin
File MIME type: text/plain
File size: 6960 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1264 2006/06/25 11:08:04 debug Exp $
20060624	Replacing the error-prone machine type initialization stuff
		with something more reasonable.
		Finally removing the old "cpu_run" kludge; moving around stuff
		in machine.c and emul.c to better suit the dyntrans system.
		Various minor dyntrans cleanups (renaming translate_address to
		translate_v2p, and experimenting with template physpages).
20060625	Removing the speed hack which separated the vph entries into
		two halves (code vs data); things seem a lot more stable now.
		Minor performance hack: R2000/R3000 cache isolation now only
		clears address translations when going into isolation, not
		when going out of it.
		Fixing the MIPS interrupt problems by letting mtc0 immediately
		cause interrupts.

==============  RELEASE 0.4.0.1  ==============


1 dpavlin 22 /*
2     * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 26 * $Id: machine_alpha.c,v 1.7 2006/06/24 10:19:19 debug Exp $
29 dpavlin 22 */
30    
31     #include <stdio.h>
32     #include <string.h>
33     #include <stdlib.h>
34    
35     #include "cpu.h"
36     #include "device.h"
37     #include "devices.h"
38     #include "machine.h"
39     #include "memory.h"
40     #include "misc.h"
41    
42 dpavlin 24 #include "alpha_autoconf.h"
43 dpavlin 22 #include "alpha_rpb.h"
44    
45    
46     MACHINE_SETUP(alpha)
47     {
48     struct rpb rpb;
49     struct crb crb;
50     struct ctb ctb;
51 dpavlin 24 struct mddt mddt;
52 dpavlin 22
53     switch (machine->machine_subtype) {
54 dpavlin 24
55     case ST_ALPHABOOK1:
56     machine->machine_name = "AlphaBook 1";
57     device_add(machine, "lca");
58     break;
59    
60     case ST_DEC_4100:
61     machine->machine_name = "AlphaServer 4100";
62     break;
63    
64 dpavlin 22 case ST_DEC_3000_300:
65     machine->machine_name = "DEC 3000/300";
66     machine->main_console_handle = (size_t)device_add(machine,
67     "z8530 addr=0x1b0200000 irq=0 addr_mult=4");
68     break;
69 dpavlin 24
70 dpavlin 22 case ST_EB164:
71     machine->machine_name = "EB164";
72     break;
73 dpavlin 24
74 dpavlin 22 default:fatal("Unimplemented Alpha machine type %i\n",
75     machine->machine_subtype);
76     exit(1);
77     }
78    
79     if (!machine->prom_emulation)
80     return;
81    
82 dpavlin 24 /* These are used by NetBSD/alpha: */
83 dpavlin 22 /* a0 = First free Page Frame Number */
84     /* a1 = PFN of current Level 1 page table */
85     /* a2 = Bootinfo magic */
86     /* a3 = Bootinfo pointer */
87     /* a4 = Bootinfo version */
88     cpu->cd.alpha.r[ALPHA_A0] = 16*1024*1024 / 8192;
89 dpavlin 24 cpu->cd.alpha.r[ALPHA_A1] = 0; /* TODO */
90     cpu->cd.alpha.r[ALPHA_A2] = ALPHA_BOOTINFO_MAGIC;
91     cpu->cd.alpha.r[ALPHA_A3] = 0; /* TODO */
92     cpu->cd.alpha.r[ALPHA_A4] = 1;
93 dpavlin 22
94 dpavlin 24 /*
95     * HWRPB: Hardware Restart Parameter Block
96     *
97     * TODO: Almost everything.
98     */
99 dpavlin 22 memset(&rpb, 0, sizeof(struct rpb));
100     store_64bit_word_in_host(cpu, (unsigned char *)
101     &(rpb.rpb_phys), HWRPB_ADDR);
102     strlcpy((char *)&(rpb.rpb_magic), "HWRPB", 8);
103     store_64bit_word_in_host(cpu, (unsigned char *)
104     &(rpb.rpb_size), sizeof(struct rpb));
105     store_64bit_word_in_host(cpu, (unsigned char *)
106     &(rpb.rpb_page_size), 8192);
107     store_64bit_word_in_host(cpu, (unsigned char *)
108     &(rpb.rpb_type), machine->machine_subtype);
109     store_64bit_word_in_host(cpu, (unsigned char *)
110     &(rpb.rpb_cc_freq), 100000000);
111     store_64bit_word_in_host(cpu, (unsigned char *)
112     &(rpb.rpb_ctb_off), CTB_ADDR - HWRPB_ADDR);
113     store_64bit_word_in_host(cpu, (unsigned char *)
114     &(rpb.rpb_crb_off), CRB_ADDR - HWRPB_ADDR);
115 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
116     &(rpb.rpb_memdat_off), MEMDAT_ADDR - HWRPB_ADDR);
117 dpavlin 22
118     /* CTB: Console Terminal Block */
119     memset(&ctb, 0, sizeof(struct ctb));
120     store_64bit_word_in_host(cpu, (unsigned char *)
121     &(ctb.ctb_term_type), machine->use_x11?
122     CTB_GRAPHICS : CTB_PRINTERPORT);
123    
124     /* CRB: Console Routine Block */
125     memset(&crb, 0, sizeof(struct crb));
126     store_64bit_word_in_host(cpu, (unsigned char *)
127     &(crb.crb_v_dispatch), CRB_ADDR - 0x100);
128     store_64bit_word(cpu, CRB_ADDR - 0x100 + 8, 0x10000);
129 dpavlin 24 store_64bit_word_in_host(cpu, (unsigned char *)
130     &(crb.crb_v_fixup), CRB_ADDR - 0x80);
131     store_64bit_word(cpu, CRB_ADDR - 0x80 + 8, 0x10800);
132 dpavlin 22
133     /*
134 dpavlin 24 * MDDT: Memory Data Descriptor Table. For now, it is a simple
135     * two-entry table with half of the available RAM in each entry.
136     * (The values are in number of 8K pages.)
137     * The first 16 MB are not included (the kernel lives there).
138     * The last 1 MB is not included either, it is reserved for bootup
139     * and similar.
140     */
141     memset(&mddt, 0, sizeof(struct mddt));
142     store_64bit_word_in_host(cpu, (unsigned char *)
143     &(mddt.mddt_cluster_cnt), 2);
144     store_64bit_word_in_host(cpu, (unsigned char *)
145     &(mddt.mddt_clusters[0].mddt_pfn), 128 * 16);
146     store_64bit_word_in_host(cpu, (unsigned char *)
147     &(mddt.mddt_clusters[0].mddt_pg_cnt),
148     (machine->physical_ram_in_mb - 16) * 128);
149     store_64bit_word_in_host(cpu, (unsigned char *)
150     &(mddt.mddt_clusters[1].mddt_pfn), machine->physical_ram_in_mb*128);
151     store_64bit_word_in_host(cpu, (unsigned char *)
152     &(mddt.mddt_clusters[1].mddt_pg_cnt), (machine->physical_ram_in_mb
153     - 1) * 128);
154    
155     /*
156     * Place a special "hack" palcode call at 0x10000 and 0x10800:
157 dpavlin 22 * (Hopefully nothing else will be there.)
158     */
159     store_32bit_word(cpu, 0x10000, 0x3fffffe);
160 dpavlin 24 store_32bit_word(cpu, 0x10800, 0x3fffffd);
161 dpavlin 22
162     store_buf(cpu, HWRPB_ADDR, (char *)&rpb, sizeof(struct rpb));
163     store_buf(cpu, CTB_ADDR, (char *)&ctb, sizeof(struct ctb));
164     store_buf(cpu, CRB_ADDR, (char *)&crb, sizeof(struct crb));
165 dpavlin 24 store_buf(cpu, MEMDAT_ADDR, (char *)&mddt, sizeof(struct mddt));
166 dpavlin 22 }
167    
168    
169     MACHINE_DEFAULT_CPU(alpha)
170     {
171 dpavlin 24 switch (machine->machine_subtype) {
172    
173     case ST_ALPHABOOK1:
174     machine->cpu_name = strdup("21066");
175     break;
176    
177     case ST_DEC_4100:
178     machine->cpu_name = strdup("21164A-2");
179     break;
180    
181     case ST_DEC_3000_300:
182     machine->cpu_name = strdup("21064");
183     break;
184    
185     case ST_EB164:
186     machine->cpu_name = strdup("21164PC");
187     break;
188    
189     default:fatal("Unimplemented Alpha machine type %i\n",
190     machine->machine_subtype);
191     exit(1);
192     }
193 dpavlin 22 }
194    
195    
196     MACHINE_DEFAULT_RAM(alpha)
197     {
198     machine->physical_ram_in_mb = 64;
199     }
200    
201    
202     MACHINE_REGISTER(alpha)
203     {
204 dpavlin 26 MR_DEFAULT(alpha, "Alpha", ARCH_ALPHA, MACHINE_ALPHA);
205 dpavlin 24
206 dpavlin 26 machine_entry_add_alias(me, "alpha");
207 dpavlin 24
208 dpavlin 26 machine_entry_add_subtype(me, "AlphaBook 1", ST_ALPHABOOK1,
209     "alphabook1", NULL);
210 dpavlin 24
211 dpavlin 26 machine_entry_add_subtype(me, "AlphaServer 4100", ST_DEC_4100,
212     "alphaserver4100", NULL);
213 dpavlin 24
214 dpavlin 26 machine_entry_add_subtype(me, "DEC 3000/300", ST_DEC_3000_300,
215     "3000/300", NULL);
216 dpavlin 24
217 dpavlin 26 machine_entry_add_subtype(me, "EB164", ST_EB164,
218     "eb164", NULL);
219    
220 dpavlin 22 me->set_default_ram = machine_default_ram_alpha;
221     }
222    

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