/[gxemul]/trunk/src/machines/machine_algor.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Diff of /trunk/src/machines/machine_algor.c

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

revision 30 by dpavlin, Mon Oct 8 16:20:40 2007 UTC revision 34 by dpavlin, Mon Oct 8 16:21:17 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: machine_algor.c,v 1.8 2006/08/14 18:03:12 debug Exp $   *  $Id: machine_algor.c,v 1.19 2007/01/21 21:02:57 debug Exp $
29   */   */
30    
31  #include <stdio.h>  #include <stdio.h>
# Line 38  Line 38 
38  #include "device.h"  #include "device.h"
39  #include "devices.h"  #include "devices.h"
40  #include "machine.h"  #include "machine.h"
 #include "machine_interrupts.h"  
41  #include "memory.h"  #include "memory.h"
42  #include "misc.h"  #include "misc.h"
43    
44    
45  MACHINE_SETUP(algor)  MACHINE_SETUP(algor)
46  {  {
47            struct pci_data *pci_bus;
48            char tmpstr[300];
49    
50            machine->emulated_hz = 166560000;
51    
52          switch (machine->machine_subtype) {          switch (machine->machine_subtype) {
53          case MACHINE_ALGOR_P4032:          case MACHINE_ALGOR_P4032:
54                  machine->machine_name = "Algor P4032";                  machine->machine_name = "Algor P4032";
# Line 65  MACHINE_SETUP(algor) Line 69  MACHINE_SETUP(algor)
69           *  2 = ISA           *  2 = ISA
70           */           */
71    
72          machine->md_int.v3_data = dev_v3_init(machine, machine->memory);          pci_bus = device_add(machine, "v3");
         machine->md_interrupt = isa8_interrupt;  
         machine->isa_pic_data.native_irq = 2;           /*  Primary: ISA  */  
         machine->isa_pic_data.secondary_mask1 = 0x18;  
         machine->isa_pic_data.native_secondary_irq = 4; /*  Secondary: Local  */  
73    
74          device_add(machine, "algor addr=0x1ff00000");          device_add(machine, "algor addr=0x1ff00000");
75    
76          bus_isa_init(machine, BUS_ISA_FDC, 0x1d000000, 0x10000000, 8, 24);          snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].v3",
77                machine->path, machine->bootstrap_cpu);
78            bus_isa_init(machine, tmpstr, BUS_ISA_EXTERNAL_PIC | BUS_ISA_FDC,
79                0x1d000000, 0x10000000);
80    
81          bus_pci_add(machine, machine->md_int.v3_data->pci_data,          /*  bus_pci_add(machine, pci_bus, machine->memory, 0, 0, 0,
82              machine->memory, 0, 0, 0, "dec21143");              "dec21143");  */
83    
84          if (!machine->prom_emulation)          if (!machine->prom_emulation)
85                  return;                  return;
86    
         /*  Magic "reboot" instruction at 0xbfc00000:  */  
         store_32bit_word(cpu, 0xffffffff9fc00000ULL, 0x00c0de0d);  
   
87          /*  NetBSD/algor wants these:  */          /*  NetBSD/algor wants these:  */
88    
89          /*  a0 = argc  */          /*  a0 = argc  */
# Line 100  MACHINE_SETUP(algor) Line 100  MACHINE_SETUP(algor)
100          store_string(cpu, (int32_t)0x9fc01040, machine->bootstr);          store_string(cpu, (int32_t)0x9fc01040, machine->bootstr);
101          store_string(cpu, (int32_t)0x9fc01200, machine->bootarg);          store_string(cpu, (int32_t)0x9fc01200, machine->bootarg);
102    
103          /*  a2 = (yamon_env_var *)envp  */          /*  a2 = pointer to environment strings  */
104          cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;          cpu->cd.mips.gpr[MIPS_GPR_A2] = (int32_t)0x9fc01800;
105          {          {
106                  char tmps[50];                  char tmps[50];

Legend:
Removed from v.30  
changed lines
  Added in v.34

  ViewVC Help
Powered by ViewVC 1.1.26