25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: machine.c,v 1.420 2005/04/17 00:15:24 debug Exp $ |
* $Id: machine.c,v 1.452 2005/06/02 17:11:34 debug Exp $ |
29 |
* |
* |
30 |
* Emulation of specific machines. |
* Emulation of specific machines. |
31 |
* |
* |
67 |
|
|
68 |
/* For SGI and ARC emulation: */ |
/* For SGI and ARC emulation: */ |
69 |
#include "sgi_arcbios.h" |
#include "sgi_arcbios.h" |
|
#include "arcbios_other.h" |
|
70 |
#include "crimereg.h" |
#include "crimereg.h" |
71 |
|
|
72 |
/* For DECstation emulation: */ |
/* For DECstation emulation: */ |
106 |
struct machine_entry_subtype **subtype; |
struct machine_entry_subtype **subtype; |
107 |
}; |
}; |
108 |
|
|
109 |
|
|
110 |
|
/* See main.c: */ |
111 |
|
extern int quiet_mode; |
112 |
|
|
113 |
|
|
114 |
/* This is initialized by machine_init(): */ |
/* This is initialized by machine_init(): */ |
115 |
static struct machine_entry *first_machine_entry = NULL; |
static struct machine_entry *first_machine_entry = NULL; |
116 |
|
|
199 |
return 1; |
return 1; |
200 |
} |
} |
201 |
|
|
202 |
fatal("unknown subtype '%s' for emulation" |
fatal("Unknown subtype '%s' for emulation" |
203 |
" '%s'\n", ssubtype, stype); |
" '%s'\n", ssubtype, stype); |
204 |
|
if (!ssubtype[0]) |
205 |
|
fatal("(Maybe you forgot the -e" |
206 |
|
" command line option?)\n"); |
207 |
exit(1); |
exit(1); |
208 |
} |
} |
209 |
|
|
210 |
me = me->next; |
me = me->next; |
211 |
} |
} |
212 |
|
|
213 |
fatal("machine_name_to_type(): unknown emulation type '%s' (", stype); |
fatal("\nSorry, emulation \"%s\"", stype); |
214 |
if (ssubtype == NULL) |
if (ssubtype != NULL && ssubtype[0] != '\0') |
215 |
fatal("no subtype)\n"); |
fatal(" (subtype \"%s\")", ssubtype); |
216 |
else |
fatal(" is unknown.\n"); |
|
fatal("subtype '%s')\n", ssubtype); |
|
|
|
|
217 |
fatal("Use the -H command line option to get a list of available" |
fatal("Use the -H command line option to get a list of available" |
218 |
" types and subtypes.\n"); |
" types and subtypes.\n\n"); |
219 |
return 0; |
return 0; |
220 |
} |
} |
221 |
|
|
420 |
*/ |
*/ |
421 |
void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len) |
void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len) |
422 |
{ |
{ |
423 |
|
int psize = 1024; /* 1024 256 64 16 4 1 */ |
424 |
|
|
425 |
if ((addr >> 32) == 0) |
if ((addr >> 32) == 0) |
426 |
addr = (int64_t)(int32_t)addr; |
addr = (int64_t)(int32_t)addr; |
|
if ((addr & 7) == 0 && (((size_t)s) & 7) == 0) { |
|
|
while (len >= 8) { |
|
|
cpu->memory_rw(cpu, cpu->mem, addr, (unsigned char *)s, |
|
|
8, MEM_WRITE, CACHE_DATA); |
|
|
addr += 8; |
|
|
s += 8; |
|
|
len -= 8; |
|
|
} |
|
|
} |
|
427 |
|
|
428 |
if ((addr & 3) == 0 && (((size_t)s) & 3) == 0) { |
while (len != 0) { |
429 |
while (len >= 4) { |
if ((addr & (psize-1)) == 0) { |
430 |
cpu->memory_rw(cpu, cpu->mem, addr, (unsigned char *)s, |
while (len >= psize) { |
431 |
4, MEM_WRITE, CACHE_DATA); |
cpu->memory_rw(cpu, cpu->mem, addr, |
432 |
addr += 4; |
(unsigned char *)s, psize, MEM_WRITE, |
433 |
s += 4; |
CACHE_DATA); |
434 |
len -= 4; |
addr += psize; |
435 |
|
s += psize; |
436 |
|
len -= psize; |
437 |
|
} |
438 |
} |
} |
439 |
|
psize >>= 2; |
440 |
} |
} |
441 |
|
|
442 |
while (len-- != 0) |
while (len-- != 0) |
596 |
|
|
597 |
if (assrt) { |
if (assrt) { |
598 |
/* OR in the irq_nr into the CSR: */ |
/* OR in the irq_nr into the CSR: */ |
599 |
m->kn02_csr->csr[0] |= irq_nr; |
m->md_int.kn02_csr->csr[0] |= irq_nr; |
600 |
} else { |
} else { |
601 |
/* AND out the irq_nr from the CSR: */ |
/* AND out the irq_nr from the CSR: */ |
602 |
m->kn02_csr->csr[0] &= ~irq_nr; |
m->md_int.kn02_csr->csr[0] &= ~irq_nr; |
603 |
} |
} |
604 |
|
|
605 |
current = m->kn02_csr->csr[0] & m->kn02_csr->csr[2]; |
current = m->md_int.kn02_csr->csr[0] & m->md_int.kn02_csr->csr[2]; |
606 |
if (current == 0) |
if (current == 0) |
607 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
608 |
else |
else |
621 |
/* debug("kmin_interrupt(): irq_nr=%i assrt=%i\n", irq_nr, assrt); */ |
/* debug("kmin_interrupt(): irq_nr=%i assrt=%i\n", irq_nr, assrt); */ |
622 |
|
|
623 |
if (assrt) |
if (assrt) |
624 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
625 |
else |
else |
626 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
627 |
|
|
628 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
629 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
630 |
cpu_interrupt(cpu, KMIN_INT_TC3); |
cpu_interrupt(cpu, KMIN_INT_TC3); |
631 |
else |
else |
632 |
cpu_interrupt_ack(cpu, KMIN_INT_TC3); |
cpu_interrupt_ack(cpu, KMIN_INT_TC3); |
642 |
/* debug("kn03_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); */ |
/* debug("kn03_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); */ |
643 |
|
|
644 |
if (assrt) |
if (assrt) |
645 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
646 |
else |
else |
647 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
648 |
|
|
649 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
650 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
651 |
cpu_interrupt(cpu, KN03_INT_ASIC); |
cpu_interrupt(cpu, KN03_INT_ASIC); |
652 |
else |
else |
653 |
cpu_interrupt_ack(cpu, KN03_INT_ASIC); |
cpu_interrupt_ack(cpu, KN03_INT_ASIC); |
664 |
debug("maxine_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
debug("maxine_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
665 |
|
|
666 |
if (assrt) |
if (assrt) |
667 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
668 |
/ 0x10] |= irq_nr; |
/ 0x10] |= irq_nr; |
669 |
else |
else |
670 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
671 |
/ 0x10] &= ~irq_nr; |
/ 0x10] &= ~irq_nr; |
672 |
|
|
673 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
674 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) |
675 |
/ 0x10]) |
/ 0x10]) |
676 |
cpu_interrupt(cpu, XINE_INT_TC3); |
cpu_interrupt(cpu, XINE_INT_TC3); |
677 |
else |
else |
686 |
{ |
{ |
687 |
int r2 = 0; |
int r2 = 0; |
688 |
|
|
689 |
m->kn230_csr->csr |= irq_nr; |
m->md_int.kn230_csr->csr |= irq_nr; |
690 |
|
|
691 |
switch (irq_nr) { |
switch (irq_nr) { |
692 |
case KN230_CSR_INTR_SII: |
case KN230_CSR_INTR_SII: |
704 |
|
|
705 |
if (assrt) { |
if (assrt) { |
706 |
/* OR in the irq_nr mask into the CSR: */ |
/* OR in the irq_nr mask into the CSR: */ |
707 |
m->kn230_csr->csr |= irq_nr; |
m->md_int.kn230_csr->csr |= irq_nr; |
708 |
|
|
709 |
/* Assert MIPS interrupt 2 or 3: */ |
/* Assert MIPS interrupt 2 or 3: */ |
710 |
cpu_interrupt(cpu, r2); |
cpu_interrupt(cpu, r2); |
711 |
} else { |
} else { |
712 |
/* AND out the irq_nr mask from the CSR: */ |
/* AND out the irq_nr mask from the CSR: */ |
713 |
m->kn230_csr->csr &= ~irq_nr; |
m->md_int.kn230_csr->csr &= ~irq_nr; |
714 |
|
|
715 |
/* If the CSR interrupt bits are all zero, |
/* If the CSR interrupt bits are all zero, |
716 |
clear the bit in the cause register as well. */ |
clear the bit in the cause register as well. */ |
717 |
if (r2 == 2) { |
if (r2 == 2) { |
718 |
/* irq 2: */ |
/* irq 2: */ |
719 |
if ((m->kn230_csr->csr & (KN230_CSR_INTR_DZ0 |
if ((m->md_int.kn230_csr->csr & (KN230_CSR_INTR_DZ0 |
720 |
| KN230_CSR_INTR_OPT0 | KN230_CSR_INTR_OPT1)) == 0) |
| KN230_CSR_INTR_OPT0 | KN230_CSR_INTR_OPT1)) == 0) |
721 |
cpu_interrupt_ack(cpu, r2); |
cpu_interrupt_ack(cpu, r2); |
722 |
} else { |
} else { |
723 |
/* irq 3: */ |
/* irq 3: */ |
724 |
if ((m->kn230_csr->csr & (KN230_CSR_INTR_SII | |
if ((m->md_int.kn230_csr->csr & (KN230_CSR_INTR_SII | |
725 |
KN230_CSR_INTR_LANCE)) == 0) |
KN230_CSR_INTR_LANCE)) == 0) |
726 |
cpu_interrupt_ack(cpu, r2); |
cpu_interrupt_ack(cpu, r2); |
727 |
} |
} |
755 |
|
|
756 |
if (isa) { |
if (isa) { |
757 |
if (assrt) |
if (assrt) |
758 |
m->jazz_data->isa_int_asserted |= irq; |
m->md_int.jazz_data->isa_int_asserted |= irq; |
759 |
else |
else |
760 |
m->jazz_data->isa_int_asserted &= ~irq; |
m->md_int.jazz_data->isa_int_asserted &= ~irq; |
761 |
} else { |
} else { |
762 |
if (assrt) |
if (assrt) |
763 |
m->jazz_data->int_asserted |= irq; |
m->md_int.jazz_data->int_asserted |= irq; |
764 |
else |
else |
765 |
m->jazz_data->int_asserted &= ~irq; |
m->md_int.jazz_data->int_asserted &= ~irq; |
766 |
} |
} |
767 |
|
|
768 |
/* debug(" %08x %08x\n", m->jazz_data->int_asserted, |
/* debug(" %08x %08x\n", m->md_int.jazz_data->int_asserted, |
769 |
m->jazz_data->int_enable_mask); */ |
m->md_int.jazz_data->int_enable_mask); */ |
770 |
/* debug(" %08x %08x\n", m->jazz_data->isa_int_asserted, |
/* debug(" %08x %08x\n", m->md_int.jazz_data->isa_int_asserted, |
771 |
m->jazz_data->isa_int_enable_mask); */ |
m->md_int.jazz_data->isa_int_enable_mask); */ |
772 |
|
|
773 |
if (m->jazz_data->int_asserted /* & m->jazz_data->int_enable_mask */ |
if (m->md_int.jazz_data->int_asserted |
774 |
& ~0x8000 ) |
/* & m->md_int.jazz_data->int_enable_mask */ & ~0x8000 ) |
775 |
cpu_interrupt(cpu, 3); |
cpu_interrupt(cpu, 3); |
776 |
else |
else |
777 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
778 |
|
|
779 |
if (m->jazz_data->isa_int_asserted & m->jazz_data->isa_int_enable_mask) |
if (m->md_int.jazz_data->isa_int_asserted & |
780 |
|
m->md_int.jazz_data->isa_int_enable_mask) |
781 |
cpu_interrupt(cpu, 4); |
cpu_interrupt(cpu, 4); |
782 |
else |
else |
783 |
cpu_interrupt_ack(cpu, 4); |
cpu_interrupt_ack(cpu, 4); |
784 |
|
|
785 |
/* TODO: this "15" (0x8000) is the timer... fix this? */ |
/* TODO: this "15" (0x8000) is the timer... fix this? */ |
786 |
if (m->jazz_data->int_asserted & 0x8000) |
if (m->md_int.jazz_data->int_asserted & 0x8000) |
787 |
cpu_interrupt(cpu, 6); |
cpu_interrupt(cpu, 6); |
788 |
else |
else |
789 |
cpu_interrupt_ack(cpu, 6); |
cpu_interrupt_ack(cpu, 6); |
808 |
giu_irq = irq_nr - 32; |
giu_irq = irq_nr - 32; |
809 |
|
|
810 |
if (assrt) |
if (assrt) |
811 |
m->vr41xx_data->giuint |= (1 << giu_irq); |
m->md_int.vr41xx_data->giuint |= (1 << giu_irq); |
812 |
else |
else |
813 |
m->vr41xx_data->giuint &= ~(1 << giu_irq); |
m->md_int.vr41xx_data->giuint &= ~(1 << giu_irq); |
814 |
} |
} |
815 |
|
|
816 |
/* TODO: This is wrong. What about GIU bit 8? */ |
/* TODO: This is wrong. What about GIU bit 8? */ |
818 |
if (irq_nr != 8) { |
if (irq_nr != 8) { |
819 |
/* If any GIU bit is asserted, then assert the main |
/* If any GIU bit is asserted, then assert the main |
820 |
GIU interrupt: */ |
GIU interrupt: */ |
821 |
if (m->vr41xx_data->giuint & m->vr41xx_data->giumask) |
if (m->md_int.vr41xx_data->giuint & |
822 |
|
m->md_int.vr41xx_data->giumask) |
823 |
vr41xx_interrupt(m, cpu, 8 + 8, 1); |
vr41xx_interrupt(m, cpu, 8 + 8, 1); |
824 |
else |
else |
825 |
vr41xx_interrupt(m, cpu, 8 + 8, 0); |
vr41xx_interrupt(m, cpu, 8 + 8, 0); |
830 |
|
|
831 |
if (irq_nr < 16) { |
if (irq_nr < 16) { |
832 |
if (assrt) |
if (assrt) |
833 |
m->vr41xx_data->sysint1 |= (1 << irq_nr); |
m->md_int.vr41xx_data->sysint1 |= (1 << irq_nr); |
834 |
else |
else |
835 |
m->vr41xx_data->sysint1 &= ~(1 << irq_nr); |
m->md_int.vr41xx_data->sysint1 &= ~(1 << irq_nr); |
836 |
} else if (irq_nr < 32) { |
} else if (irq_nr < 32) { |
837 |
irq_nr -= 16; |
irq_nr -= 16; |
838 |
if (assrt) |
if (assrt) |
839 |
m->vr41xx_data->sysint2 |= (1 << irq_nr); |
m->md_int.vr41xx_data->sysint2 |= (1 << irq_nr); |
840 |
else |
else |
841 |
m->vr41xx_data->sysint2 &= ~(1 << irq_nr); |
m->md_int.vr41xx_data->sysint2 &= ~(1 << irq_nr); |
842 |
} |
} |
843 |
|
|
844 |
/* TODO: Which hardware interrupt pin? */ |
/* TODO: Which hardware interrupt pin? */ |
845 |
|
|
846 |
/* debug(" sysint1=%04x mask=%04x, sysint2=%04x mask=%04x\n", |
/* debug(" sysint1=%04x mask=%04x, sysint2=%04x mask=%04x\n", |
847 |
m->vr41xx_data->sysint1, m->vr41xx_data->msysint1, |
m->md_int.vr41xx_data->sysint1, m->md_int.vr41xx_data->msysint1, |
848 |
m->vr41xx_data->sysint2, m->vr41xx_data->msysint2); */ |
m->md_int.vr41xx_data->sysint2, m->md_int.vr41xx_data->msysint2); */ |
849 |
|
|
850 |
if ((m->vr41xx_data->sysint1 & m->vr41xx_data->msysint1) | |
if ((m->md_int.vr41xx_data->sysint1 & m->md_int.vr41xx_data->msysint1) | |
851 |
(m->vr41xx_data->sysint2 & m->vr41xx_data->msysint2)) |
(m->md_int.vr41xx_data->sysint2 & m->md_int.vr41xx_data->msysint2)) |
852 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
853 |
else |
else |
854 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
882 |
} |
} |
883 |
|
|
884 |
if (assrt) |
if (assrt) |
885 |
m->ps2_data->sbus_smflg |= msk; |
m->md_int.ps2_data->sbus_smflg |= msk; |
886 |
else |
else |
887 |
m->ps2_data->sbus_smflg &= ~msk; |
m->md_int.ps2_data->sbus_smflg &= ~msk; |
888 |
|
|
889 |
if (m->ps2_data->sbus_smflg != 0) |
if (m->md_int.ps2_data->sbus_smflg != 0) |
890 |
cpu_interrupt(cpu, 8 + 1); |
cpu_interrupt(cpu, 8 + 1); |
891 |
else |
else |
892 |
cpu_interrupt_ack(cpu, 8 + 1); |
cpu_interrupt_ack(cpu, 8 + 1); |
896 |
if (assrt) { |
if (assrt) { |
897 |
/* OR into the INTR: */ |
/* OR into the INTR: */ |
898 |
if (irq_nr < 16) |
if (irq_nr < 16) |
899 |
m->ps2_data->intr |= (1 << irq_nr); |
m->md_int.ps2_data->intr |= (1 << irq_nr); |
900 |
else |
else |
901 |
m->ps2_data->dmac_reg[0x601] |= (1 << (irq_nr-16)); |
m->md_int.ps2_data->dmac_reg[0x601] |= |
902 |
|
(1 << (irq_nr-16)); |
903 |
} else { |
} else { |
904 |
/* AND out of the INTR: */ |
/* AND out of the INTR: */ |
905 |
if (irq_nr < 16) |
if (irq_nr < 16) |
906 |
m->ps2_data->intr &= ~(1 << irq_nr); |
m->md_int.ps2_data->intr &= ~(1 << irq_nr); |
907 |
else |
else |
908 |
m->ps2_data->dmac_reg[0x601] &= ~(1 << (irq_nr-16)); |
m->md_int.ps2_data->dmac_reg[0x601] &= |
909 |
|
~(1 << (irq_nr-16)); |
910 |
} |
} |
911 |
|
|
912 |
/* TODO: Hm? How about the mask? */ |
/* TODO: Hm? How about the mask? */ |
913 |
if (m->ps2_data->intr /* & m->ps2_data->imask */ ) |
if (m->md_int.ps2_data->intr /* & m->md_int.ps2_data->imask */ ) |
914 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
915 |
else |
else |
916 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
917 |
|
|
918 |
/* TODO: mask? */ |
/* TODO: mask? */ |
919 |
if (m->ps2_data->dmac_reg[0x601] & 0xffff) |
if (m->md_int.ps2_data->dmac_reg[0x601] & 0xffff) |
920 |
cpu_interrupt(cpu, 3); |
cpu_interrupt(cpu, 3); |
921 |
else |
else |
922 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
948 |
int ms = irq_nr / 64; |
int ms = irq_nr / 64; |
949 |
uint32_t new = 1 << ms; |
uint32_t new = 1 << ms; |
950 |
if (assrt) |
if (assrt) |
951 |
m->sgi_ip22_data->reg[4] |= new; |
m->md_int.sgi_ip22_data->reg[4] |= new; |
952 |
else |
else |
953 |
m->sgi_ip22_data->reg[4] &= ~new; |
m->md_int.sgi_ip22_data->reg[4] &= ~new; |
954 |
/* TODO: is this enough? */ |
/* TODO: is this enough? */ |
955 |
irq_nr &= 63; |
irq_nr &= 63; |
956 |
} |
} |
957 |
|
|
958 |
if (irq_nr < 32) { |
if (irq_nr < 32) { |
959 |
if (assrt) |
if (assrt) |
960 |
m->sgi_ip22_data->reg[0] |= newmask; |
m->md_int.sgi_ip22_data->reg[0] |= newmask; |
961 |
else |
else |
962 |
m->sgi_ip22_data->reg[0] &= ~newmask; |
m->md_int.sgi_ip22_data->reg[0] &= ~newmask; |
963 |
} else { |
} else { |
964 |
if (assrt) |
if (assrt) |
965 |
m->sgi_ip22_data->reg[2] |= newmask; |
m->md_int.sgi_ip22_data->reg[2] |= newmask; |
966 |
else |
else |
967 |
m->sgi_ip22_data->reg[2] &= ~newmask; |
m->md_int.sgi_ip22_data->reg[2] &= ~newmask; |
968 |
} |
} |
969 |
|
|
970 |
/* Read stat and mask for local0: */ |
/* Read stat and mask for local0: */ |
971 |
stat = m->sgi_ip22_data->reg[0]; |
stat = m->md_int.sgi_ip22_data->reg[0]; |
972 |
mask = m->sgi_ip22_data->reg[1]; |
mask = m->md_int.sgi_ip22_data->reg[1]; |
973 |
if ((stat & mask) == 0) |
if ((stat & mask) == 0) |
974 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
975 |
else |
else |
976 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
977 |
|
|
978 |
/* Read stat and mask for local1: */ |
/* Read stat and mask for local1: */ |
979 |
stat = m->sgi_ip22_data->reg[2]; |
stat = m->md_int.sgi_ip22_data->reg[2]; |
980 |
mask = m->sgi_ip22_data->reg[3]; |
mask = m->md_int.sgi_ip22_data->reg[3]; |
981 |
if ((stat & mask) == 0) |
if ((stat & mask) == 0) |
982 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
983 |
else |
else |
1009 |
newmask = (int64_t)1 << irq_nr; |
newmask = (int64_t)1 << irq_nr; |
1010 |
|
|
1011 |
if (assrt) |
if (assrt) |
1012 |
m->sgi_ip30_data->isr |= newmask; |
m->md_int.sgi_ip30_data->isr |= newmask; |
1013 |
else |
else |
1014 |
m->sgi_ip30_data->isr &= ~newmask; |
m->md_int.sgi_ip30_data->isr &= ~newmask; |
1015 |
|
|
1016 |
just_assert_and_such: |
just_assert_and_such: |
1017 |
|
|
1021 |
cpu_interrupt_ack(cpu, 5); |
cpu_interrupt_ack(cpu, 5); |
1022 |
cpu_interrupt_ack(cpu, 6); |
cpu_interrupt_ack(cpu, 6); |
1023 |
|
|
1024 |
stat = m->sgi_ip30_data->isr; |
stat = m->md_int.sgi_ip30_data->isr; |
1025 |
mask = m->sgi_ip30_data->imask0; |
mask = m->md_int.sgi_ip30_data->imask0; |
1026 |
|
|
1027 |
if ((stat & mask) & 0x000000000000ffffULL) |
if ((stat & mask) & 0x000000000000ffffULL) |
1028 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1075 |
*/ |
*/ |
1076 |
if (irq_nr & MACE_PERIPH_SERIAL) { |
if (irq_nr & MACE_PERIPH_SERIAL) { |
1077 |
/* Read current MACE interrupt bits: */ |
/* Read current MACE interrupt bits: */ |
1078 |
memcpy(x, m->mace_data->reg + mace_addr, sizeof(uint32_t)); |
memcpy(x, m->md_int.ip32.mace_data->reg + mace_addr, sizeof(uint32_t)); |
1079 |
mace_interrupts = 0; |
mace_interrupts = 0; |
1080 |
for (i=0; i<sizeof(uint32_t); i++) { |
for (i=0; i<sizeof(uint32_t); i++) { |
1081 |
/* SGI is big-endian... */ |
/* SGI is big-endian... */ |
1091 |
/* Write back MACE interrupt bits: */ |
/* Write back MACE interrupt bits: */ |
1092 |
for (i=0; i<4; i++) |
for (i=0; i<4; i++) |
1093 |
x[3-i] = mace_interrupts >> (i*8); |
x[3-i] = mace_interrupts >> (i*8); |
1094 |
memcpy(m->mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
memcpy(m->md_int.ip32.mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
1095 |
|
|
1096 |
irq_nr = MACE_PERIPH_SERIAL; |
irq_nr = MACE_PERIPH_SERIAL; |
1097 |
if (mace_interrupts == 0) |
if (mace_interrupts == 0) |
1103 |
/* Hopefully _MISC and _SERIAL will not be both on at the same time. */ |
/* Hopefully _MISC and _SERIAL will not be both on at the same time. */ |
1104 |
if (irq_nr & MACE_PERIPH_MISC) { |
if (irq_nr & MACE_PERIPH_MISC) { |
1105 |
/* Read current MACE interrupt bits: */ |
/* Read current MACE interrupt bits: */ |
1106 |
memcpy(x, m->mace_data->reg + mace_addr, sizeof(uint32_t)); |
memcpy(x, m->md_int.ip32.mace_data->reg + mace_addr, sizeof(uint32_t)); |
1107 |
mace_interrupts = 0; |
mace_interrupts = 0; |
1108 |
for (i=0; i<sizeof(uint32_t); i++) { |
for (i=0; i<sizeof(uint32_t); i++) { |
1109 |
/* SGI is big-endian... */ |
/* SGI is big-endian... */ |
1119 |
/* Write back MACE interrupt bits: */ |
/* Write back MACE interrupt bits: */ |
1120 |
for (i=0; i<4; i++) |
for (i=0; i<4; i++) |
1121 |
x[3-i] = mace_interrupts >> (i*8); |
x[3-i] = mace_interrupts >> (i*8); |
1122 |
memcpy(m->mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
memcpy(m->md_int.ip32.mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
1123 |
|
|
1124 |
irq_nr = MACE_PERIPH_MISC; |
irq_nr = MACE_PERIPH_MISC; |
1125 |
if (mace_interrupts == 0) |
if (mace_interrupts == 0) |
1129 |
} |
} |
1130 |
|
|
1131 |
/* Read CRIME_INTSTAT: */ |
/* Read CRIME_INTSTAT: */ |
1132 |
memcpy(x, m->crime_data->reg + crime_addr, sizeof(uint64_t)); |
memcpy(x, m->md_int.ip32.crime_data->reg + crime_addr, sizeof(uint64_t)); |
1133 |
crime_interrupts = 0; |
crime_interrupts = 0; |
1134 |
for (i=0; i<8; i++) { |
for (i=0; i<8; i++) { |
1135 |
/* SGI is big-endian... */ |
/* SGI is big-endian... */ |
1145 |
/* Write back CRIME_INTSTAT: */ |
/* Write back CRIME_INTSTAT: */ |
1146 |
for (i=0; i<8; i++) |
for (i=0; i<8; i++) |
1147 |
x[7-i] = crime_interrupts >> (i*8); |
x[7-i] = crime_interrupts >> (i*8); |
1148 |
memcpy(m->crime_data->reg + crime_addr, x, sizeof(uint64_t)); |
memcpy(m->md_int.ip32.crime_data->reg + crime_addr, x, sizeof(uint64_t)); |
1149 |
|
|
1150 |
/* Read CRIME_INTMASK: */ |
/* Read CRIME_INTMASK: */ |
1151 |
memcpy(x, m->crime_data->reg + CRIME_INTMASK, sizeof(uint64_t)); |
memcpy(x, m->md_int.ip32.crime_data->reg + CRIME_INTMASK, sizeof(uint64_t)); |
1152 |
crime_interrupts_mask = 0; |
crime_interrupts_mask = 0; |
1153 |
for (i=0; i<8; i++) { |
for (i=0; i<8; i++) { |
1154 |
crime_interrupts_mask <<= 8; |
crime_interrupts_mask <<= 8; |
1193 |
ms = 1 << (irq_nr & 31); |
ms = 1 << (irq_nr & 31); |
1194 |
|
|
1195 |
if (assrt) |
if (assrt) |
1196 |
m->au1x00_ic_data->request0_int |= ms; |
m->md_int.au1x00_ic_data->request0_int |= ms; |
1197 |
else |
else |
1198 |
m->au1x00_ic_data->request0_int &= ~ms; |
m->md_int.au1x00_ic_data->request0_int &= ~ms; |
1199 |
|
|
1200 |
/* TODO: Controller 1 */ |
/* TODO: Controller 1 */ |
1201 |
} |
} |
1202 |
|
|
1203 |
if ((m->au1x00_ic_data->request0_int & |
if ((m->md_int.au1x00_ic_data->request0_int & |
1204 |
m->au1x00_ic_data->mask) != 0) |
m->md_int.au1x00_ic_data->mask) != 0) |
1205 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1206 |
else |
else |
1207 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
1212 |
} |
} |
1213 |
|
|
1214 |
|
|
1215 |
|
/* |
1216 |
|
* x86 (PC) interrupts: |
1217 |
|
* |
1218 |
|
* (irq_nr = 16 can be used to just reassert/deassert interrupts.) |
1219 |
|
*/ |
1220 |
|
void x86_pc_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
1221 |
|
{ |
1222 |
|
int mask = 1 << (irq_nr & 7); |
1223 |
|
|
1224 |
|
if (irq_nr < 8) { |
1225 |
|
if (assrt) |
1226 |
|
m->md.pc.pic1->irr |= mask; |
1227 |
|
else |
1228 |
|
m->md.pc.pic1->irr &= ~mask; |
1229 |
|
} else if (irq_nr < 16) { |
1230 |
|
if (m->md.pc.pic2 == NULL) { |
1231 |
|
fatal("x86_pc_interrupt(): pic2 used (irq_nr = %i), " |
1232 |
|
"but we are emulating an XT?\n", irq_nr); |
1233 |
|
return; |
1234 |
|
} |
1235 |
|
if (assrt) |
1236 |
|
m->md.pc.pic2->irr |= mask; |
1237 |
|
else |
1238 |
|
m->md.pc.pic2->irr &= ~mask; |
1239 |
|
} |
1240 |
|
|
1241 |
|
if (m->md.pc.pic2 != NULL) { |
1242 |
|
/* Any interrupt assertions on PIC2 go to irq 2 on PIC1 */ |
1243 |
|
/* (TODO: don't hardcode this here) */ |
1244 |
|
if (m->md.pc.pic2->irr & ~m->md.pc.pic2->ier) |
1245 |
|
m->md.pc.pic1->irr |= 0x04; |
1246 |
|
else |
1247 |
|
m->md.pc.pic1->irr &= ~0x04; |
1248 |
|
} |
1249 |
|
|
1250 |
|
/* Now, PIC1: */ |
1251 |
|
if (m->md.pc.pic1->irr & ~m->md.pc.pic1->ier) |
1252 |
|
cpu->cd.x86.interrupt_asserted = 1; |
1253 |
|
else |
1254 |
|
cpu->cd.x86.interrupt_asserted = 0; |
1255 |
|
} |
1256 |
|
|
1257 |
|
|
1258 |
/**************************************************************************** |
/**************************************************************************** |
1259 |
* * |
* * |
1260 |
* Machine dependant Initialization routines * |
* Machine dependant Initialization routines * |
1297 |
int hpcmips_fb_ysize_mem = 0; |
int hpcmips_fb_ysize_mem = 0; |
1298 |
|
|
1299 |
/* ARCBIOS stuff: */ |
/* ARCBIOS stuff: */ |
|
struct arcbios_spb arcbios_spb; |
|
|
struct arcbios_spb_64 arcbios_spb_64; |
|
|
struct arcbios_sysid arcbios_sysid; |
|
|
struct arcbios_dsp_stat arcbios_dsp_stat; |
|
|
uint64_t mem_base, mem_count; |
|
|
uint64_t system = 0; |
|
1300 |
uint64_t sgi_ram_offset = 0; |
uint64_t sgi_ram_offset = 0; |
|
uint64_t arc_reserved; |
|
1301 |
int arc_wordlen = sizeof(uint32_t); |
int arc_wordlen = sizeof(uint32_t); |
|
char *short_machine_name = NULL; |
|
1302 |
char *eaddr_string = "eaddr=10:20:30:40:50:60"; /* nonsense */ |
char *eaddr_string = "eaddr=10:20:30:40:50:60"; /* nonsense */ |
1303 |
unsigned char macaddr[6]; |
unsigned char macaddr[6]; |
1304 |
|
|
1305 |
/* Generic bootstring stuff: */ |
/* Generic bootstring stuff: */ |
1306 |
int bootdev_id = diskimage_bootdev(machine); |
int bootdev_type = 0; |
1307 |
|
int bootdev_id; |
1308 |
char *bootstr = NULL; |
char *bootstr = NULL; |
1309 |
char *bootarg = NULL; |
char *bootarg = NULL; |
1310 |
char *init_bootpath; |
char *init_bootpath; |
1319 |
struct cpu *cpu = machine->cpus[machine->bootstrap_cpu]; |
struct cpu *cpu = machine->cpus[machine->bootstrap_cpu]; |
1320 |
|
|
1321 |
|
|
1322 |
|
bootdev_id = diskimage_bootdev(machine, &bootdev_type); |
1323 |
|
|
1324 |
mem = cpu->mem; |
mem = cpu->mem; |
1325 |
machine->machine_name = NULL; |
machine->machine_name = NULL; |
1326 |
|
|
1504 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
1505 |
KN02_SYS_CLOCK, KN02_INT_CLOCK, MC146818_DEC, 1); |
KN02_SYS_CLOCK, KN02_INT_CLOCK, MC146818_DEC, 1); |
1506 |
|
|
1507 |
machine->kn02_csr = |
machine->md_int.kn02_csr = |
1508 |
dev_kn02_init(cpu, mem, KN02_SYS_CSR); |
dev_kn02_init(cpu, mem, KN02_SYS_CSR); |
1509 |
|
|
1510 |
framebuffer_console_name = "osconsole=0,7"; |
framebuffer_console_name = "osconsole=0,7"; |
1538 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) slot 12 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) slot 12 |
1539 |
* dma for asc0 (0x1c380000) slot 14 |
* dma for asc0 (0x1c380000) slot 14 |
1540 |
*/ |
*/ |
1541 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
1542 |
dev_le_init(machine, mem, 0x1c0c0000, 0, 0, KMIN_INTR_LANCE +8, 4*65536); |
dev_le_init(machine, mem, 0x1c0c0000, 0, 0, KMIN_INTR_LANCE +8, 4*65536); |
1543 |
dev_scc_init(machine, mem, 0x1c100000, KMIN_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
dev_scc_init(machine, mem, 0x1c100000, KMIN_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
1544 |
dev_scc_init(machine, mem, 0x1c180000, KMIN_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
dev_scc_init(machine, mem, 0x1c180000, KMIN_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
1604 |
* mcclock0 at ioasic0 offset 0x200000: mc146818 or compatible (0x1fa00000) |
* mcclock0 at ioasic0 offset 0x200000: mc146818 or compatible (0x1fa00000) |
1605 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1fb00000) |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1fb00000) |
1606 |
*/ |
*/ |
1607 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1f800000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1f800000, 0); |
1608 |
|
|
1609 |
dev_le_init(machine, mem, KN03_SYS_LANCE, 0, 0, KN03_INTR_LANCE +8, 4*65536); |
dev_le_init(machine, mem, KN03_SYS_LANCE, 0, 0, KN03_INTR_LANCE +8, 4*65536); |
1610 |
|
|
1611 |
machine->dec_ioasic_data->dma_func[3] = dev_scc_dma_func; |
machine->md_int.dec_ioasic_data->dma_func[3] = dev_scc_dma_func; |
1612 |
machine->dec_ioasic_data->dma_func_extra[2] = dev_scc_init(machine, mem, KN03_SYS_SCC_0, KN03_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
machine->md_int.dec_ioasic_data->dma_func_extra[2] = dev_scc_init(machine, mem, KN03_SYS_SCC_0, KN03_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
1613 |
machine->dec_ioasic_data->dma_func[2] = dev_scc_dma_func; |
machine->md_int.dec_ioasic_data->dma_func[2] = dev_scc_dma_func; |
1614 |
machine->dec_ioasic_data->dma_func_extra[3] = dev_scc_init(machine, mem, KN03_SYS_SCC_1, KN03_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
machine->md_int.dec_ioasic_data->dma_func_extra[3] = dev_scc_init(machine, mem, KN03_SYS_SCC_1, KN03_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
1615 |
|
|
1616 |
dev_mc146818_init(machine, mem, KN03_SYS_CLOCK, KN03_INT_RTC, MC146818_DEC, 1); |
dev_mc146818_init(machine, mem, KN03_SYS_CLOCK, KN03_INT_RTC, MC146818_DEC, 1); |
1617 |
dev_asc_init(machine, mem, KN03_SYS_SCSI, |
dev_asc_init(machine, mem, KN03_SYS_SCSI, |
1670 |
* Clock uses interrupt 3 (shared with XMI?). |
* Clock uses interrupt 3 (shared with XMI?). |
1671 |
*/ |
*/ |
1672 |
|
|
1673 |
machine->dec5800_csr = dev_dec5800_init(machine, mem, 0x10000000); |
machine->md_int.dec5800_csr = dev_dec5800_init(machine, mem, 0x10000000); |
1674 |
dev_decbi_init(mem, 0x10000000); |
dev_decbi_init(mem, 0x10000000); |
1675 |
dev_ssc_init(machine, mem, 0x10140000, 2, machine->use_x11, &machine->dec5800_csr->csr); |
dev_ssc_init(machine, mem, 0x10140000, 2, machine->use_x11, &machine->md_int.dec5800_csr->csr); |
1676 |
dev_decxmi_init(mem, 0x11800000); |
dev_decxmi_init(mem, 0x11800000); |
1677 |
dev_deccca_init(mem, DEC_DECCCA_BASEADDR); |
dev_deccca_init(mem, DEC_DECCCA_BASEADDR); |
1678 |
|
|
1741 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) |
1742 |
* xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8 built-in framebuffer (0xa000000) |
* xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8 built-in framebuffer (0xa000000) |
1743 |
*/ |
*/ |
1744 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
1745 |
|
|
1746 |
/* TURBOchannel slots (0 and 1): */ |
/* TURBOchannel slots (0 and 1): */ |
1747 |
dev_turbochannel_init(machine, mem, 0, |
dev_turbochannel_init(machine, mem, 0, |
1848 |
|
|
1849 |
snprintf(tmpstr, sizeof(tmpstr) - 1, |
snprintf(tmpstr, sizeof(tmpstr) - 1, |
1850 |
"kn230 addr=0x%llx", (long long)KN230_SYS_ICSR); |
"kn230 addr=0x%llx", (long long)KN230_SYS_ICSR); |
1851 |
machine->kn230_csr = device_add(machine, tmpstr); |
machine->md_int.kn230_csr = device_add(machine, tmpstr); |
1852 |
|
|
1853 |
serial_console_name = "osconsole=0"; |
serial_console_name = "osconsole=0"; |
1854 |
break; |
break; |
1939 |
} else { |
} else { |
1940 |
/* disk boot: */ |
/* disk boot: */ |
1941 |
bootpath[0] = '0' + boot_scsi_boardnumber; |
bootpath[0] = '0' + boot_scsi_boardnumber; |
1942 |
if (diskimage_is_a_tape(machine, bootdev_id)) |
if (diskimage_is_a_tape(machine, bootdev_id, |
1943 |
|
bootdev_type)) |
1944 |
bootpath[2] = 't'; |
bootpath[2] = 't'; |
1945 |
bootpath[4] = '0' + bootdev_id; |
bootpath[4] = '0' + bootdev_id; |
1946 |
} |
} |
2076 |
*/ |
*/ |
2077 |
/* dev_XXX_init(cpu, mem, 0x10000000, machine->emulated_hz); */ |
/* dev_XXX_init(cpu, mem, 0x10000000, machine->emulated_hz); */ |
2078 |
dev_mc146818_init(machine, mem, 0x10000070, 0, MC146818_PC_CMOS, 4); |
dev_mc146818_init(machine, mem, 0x10000070, 0, MC146818_PC_CMOS, 4); |
2079 |
|
|
2080 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
2081 |
0x1c800000, 5, 1, 1, "serial console"); |
0x1c800000, 5, 1, 1, "serial console"); |
2082 |
|
|
2083 |
|
#if 0 |
2084 |
|
dev_ns16550_init(machine, mem, 0x1f000010, 0, 1, 1, |
2085 |
|
"other serial console"); |
2086 |
|
#endif |
2087 |
|
|
2088 |
/* |
/* |
2089 |
* According to NetBSD/cobalt: |
* According to NetBSD/cobalt: |
2090 |
* |
* |
2153 |
machine->main_console_handle = dev_ns16550_init( |
machine->main_console_handle = dev_ns16550_init( |
2154 |
machine, mem, 0xa008680, 0, 4, |
machine, mem, 0xa008680, 0, 4, |
2155 |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
2156 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4131); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4131); |
2157 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2158 |
|
|
2159 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2184 |
machine->main_console_handle = dev_ns16550_init( |
machine->main_console_handle = dev_ns16550_init( |
2185 |
machine, mem, 0xa008680, 0, 4, |
machine, mem, 0xa008680, 0, 4, |
2186 |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
2187 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2188 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2189 |
|
|
2190 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2212 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2213 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2214 |
|
|
2215 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2216 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2217 |
|
|
2218 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2240 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2241 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2242 |
|
|
2243 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2244 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2245 |
|
|
2246 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2268 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2269 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2270 |
|
|
2271 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2272 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2273 |
|
|
2274 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2296 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2297 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2298 |
|
|
2299 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2300 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2301 |
|
|
2302 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2324 |
hpcmips_fb_bits = 4; |
hpcmips_fb_bits = 4; |
2325 |
hpcmips_fb_encoding = BIFB_D4_M2L_F; |
hpcmips_fb_encoding = BIFB_D4_M2L_F; |
2326 |
|
|
2327 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4181); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4181); |
2328 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2329 |
|
|
2330 |
/* TODO: Hm... irq 17 according to linux, but |
/* TODO: Hm... irq 17 according to linux, but |
2365 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2366 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2367 |
|
|
2368 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2369 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2370 |
|
|
2371 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2388 |
|
|
2389 |
if (machine->use_x11) |
if (machine->use_x11) |
2390 |
machine->main_console_handle = |
machine->main_console_handle = |
2391 |
machine->vr41xx_data->kiu_console_handle; |
machine->md_int.vr41xx_data->kiu_console_handle; |
2392 |
|
|
2393 |
/* NetBSD/hpcmips and possibly others expects the following: */ |
/* NetBSD/hpcmips and possibly others expects the following: */ |
2394 |
|
|
2488 |
* ohci0: OHCI version 1.0 |
* ohci0: OHCI version 1.0 |
2489 |
*/ |
*/ |
2490 |
|
|
2491 |
machine->ps2_data = dev_ps2_stuff_init(machine, mem, 0x10000000); |
machine->md_int.ps2_data = dev_ps2_stuff_init(machine, mem, 0x10000000); |
2492 |
device_add(machine, "ps2_gs addr=0x12000000"); |
device_add(machine, "ps2_gs addr=0x12000000"); |
2493 |
device_add(machine, "ps2_ether addr=0x14001000"); |
device_add(machine, "ps2_ether addr=0x14001000"); |
2494 |
dev_ram_init(mem, 0x1c000000, 4 * 1048576, DEV_RAM_RAM, 0); /* TODO: how much? */ |
dev_ram_init(mem, 0x1c000000, 4 * 1048576, DEV_RAM_RAM, 0); /* TODO: how much? */ |
2504 |
|
|
2505 |
/* Set the Harddisk controller present flag, if either |
/* Set the Harddisk controller present flag, if either |
2506 |
disk 0 or 1 is present: */ |
disk 0 or 1 is present: */ |
2507 |
if (diskimage_exist(machine, 0) || diskimage_exist(machine, 1)) { |
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
2508 |
|
diskimage_exist(machine, 1, DISKIMAGE_IDE)) { |
2509 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x0, 0x100); |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x0, 0x100); |
2510 |
dev_ps2_spd_init(machine, mem, 0x14000000); |
dev_ps2_spd_init(machine, mem, 0x14000000); |
2511 |
} |
} |
2567 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
2568 |
exit(1); |
exit(1); |
2569 |
} |
} |
|
short_machine_name = malloc(500); |
|
|
if (short_machine_name == NULL) { |
|
|
fprintf(stderr, "out of memory\n"); |
|
|
exit(1); |
|
|
} |
|
2570 |
|
|
2571 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
2572 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
|
sprintf(short_machine_name, "SGI-IP%i", machine->machine_subtype); |
|
2573 |
sprintf(machine->machine_name, "SGI-IP%i", machine->machine_subtype); |
sprintf(machine->machine_name, "SGI-IP%i", machine->machine_subtype); |
2574 |
|
|
|
/* Super-special case for IP24: */ |
|
|
if (machine->machine_subtype == 24) |
|
|
sprintf(short_machine_name, "SGI-IP22"); |
|
|
|
|
2575 |
sgi_ram_offset = 1048576 * machine->memory_offset_in_mb; |
sgi_ram_offset = 1048576 * machine->memory_offset_in_mb; |
2576 |
|
|
2577 |
/* Special cases for IP20,22,24,26 memory offset: */ |
/* Special cases for IP20,22,24,26 memory offset: */ |
2588 |
} |
} |
2589 |
} else { |
} else { |
2590 |
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
|
sprintf(short_machine_name, "ARC"); |
|
2591 |
sprintf(machine->machine_name, "ARC"); |
sprintf(machine->machine_name, "ARC"); |
2592 |
} |
} |
2593 |
|
|
2643 |
*/ |
*/ |
2644 |
|
|
2645 |
/* int0 at mainbus0 addr 0x1fb801c0 */ |
/* int0 at mainbus0 addr 0x1fb801c0 */ |
2646 |
machine->sgi_ip20_data = dev_sgi_ip20_init(cpu, mem, DEV_SGI_IP20_BASE); |
machine->md_int.sgi_ip20_data = dev_sgi_ip20_init(cpu, mem, DEV_SGI_IP20_BASE); |
2647 |
|
|
2648 |
/* imc0 at mainbus0 addr 0x1fa00000: revision 0: TODO (or in dev_sgi_ip20?) */ |
/* imc0 at mainbus0 addr 0x1fa00000: revision 0: TODO (or in dev_sgi_ip20?) */ |
2649 |
|
|
2679 |
case 24: |
case 24: |
2680 |
if (machine->machine_subtype == 22) { |
if (machine->machine_subtype == 22) { |
2681 |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Full-house)"); |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Full-house)"); |
2682 |
machine->sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9000, 0); |
machine->md_int.sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9000, 0); |
2683 |
} else { |
} else { |
2684 |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Guiness)"); |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Guiness)"); |
2685 |
machine->sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9880, 1); |
machine->md_int.sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9880, 1); |
2686 |
} |
} |
2687 |
|
|
2688 |
/* |
/* |
2725 |
|
|
2726 |
/* Not supported by NetBSD 1.6.2, but by 2.0_BETA: */ |
/* Not supported by NetBSD 1.6.2, but by 2.0_BETA: */ |
2727 |
j = dev_pckbc_init(machine, mem, 0x1fbd9840, PCKBC_8242, |
j = dev_pckbc_init(machine, mem, 0x1fbd9840, PCKBC_8242, |
2728 |
0, 0, machine->use_x11); /* TODO: irq numbers */ |
0, 0, machine->use_x11, 0); /* TODO: irq numbers */ |
2729 |
|
|
2730 |
if (machine->use_x11) |
if (machine->use_x11) |
2731 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
2806 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2807 |
strcat(machine->machine_name, " (Octane)"); |
strcat(machine->machine_name, " (Octane)"); |
2808 |
|
|
2809 |
machine->sgi_ip30_data = dev_sgi_ip30_init(machine, mem, 0x0ff00000); |
machine->md_int.sgi_ip30_data = dev_sgi_ip30_init(machine, mem, 0x0ff00000); |
2810 |
machine->md_interrupt = sgi_ip30_interrupt; |
machine->md_interrupt = sgi_ip30_interrupt; |
2811 |
|
|
2812 |
dev_ram_init(mem, 0xa0000000ULL, |
dev_ram_init(mem, 0xa0000000ULL, |
2849 |
dev_ram_init(mem, 0x20000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x00000000); |
dev_ram_init(mem, 0x20000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x00000000); |
2850 |
dev_ram_init(mem, 0x40000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x10000000); |
dev_ram_init(mem, 0x40000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x10000000); |
2851 |
|
|
2852 |
machine->crime_data = dev_crime_init(machine, mem, 0x14000000, 2, machine->use_x11); /* crime0 */ |
machine->md_int.ip32.crime_data = dev_crime_init(machine, mem, 0x14000000, 2, machine->use_x11); /* crime0 */ |
2853 |
dev_sgi_mte_init(mem, 0x15000000); /* mte ??? memory thing */ |
dev_sgi_mte_init(mem, 0x15000000); /* mte ??? memory thing */ |
2854 |
dev_sgi_gbe_init(machine, mem, 0x16000000); /* gbe? framebuffer? */ |
dev_sgi_gbe_init(machine, mem, 0x16000000); /* gbe? framebuffer? */ |
2855 |
|
|
2876 |
* 1f3a0000 mcclock0 |
* 1f3a0000 mcclock0 |
2877 |
*/ |
*/ |
2878 |
|
|
2879 |
machine->mace_data = dev_mace_init(mem, 0x1f310000, 2); |
machine->md_int.ip32.mace_data = dev_mace_init(mem, 0x1f310000, 2); |
2880 |
machine->md_interrupt = sgi_ip32_interrupt; |
machine->md_interrupt = sgi_ip32_interrupt; |
2881 |
|
|
2882 |
/* |
/* |
2895 |
|
|
2896 |
i = dev_pckbc_init(machine, mem, 0x1f320000, |
i = dev_pckbc_init(machine, mem, 0x1f320000, |
2897 |
PCKBC_8242, 0x200 + MACE_PERIPH_MISC, |
PCKBC_8242, 0x200 + MACE_PERIPH_MISC, |
2898 |
0x800 + MACE_PERIPH_MISC, machine->use_x11); |
0x800 + MACE_PERIPH_MISC, machine->use_x11, 0); |
2899 |
/* keyb+mouse (mace irq numbers) */ |
/* keyb+mouse (mace irq numbers) */ |
2900 |
|
|
2901 |
net_generate_unique_mac(machine, macaddr); |
net_generate_unique_mac(machine, macaddr); |
2937 |
|
|
2938 |
pci_data = dev_macepci_init(mem, 0x1f080000, MACE_PCI_BRIDGE); /* macepci0 */ |
pci_data = dev_macepci_init(mem, 0x1f080000, MACE_PCI_BRIDGE); /* macepci0 */ |
2939 |
/* bus_pci_add(machine, pci_data, mem, 0, 0, 0, pci_ne2000_init, pci_ne2000_rr); TODO */ |
/* bus_pci_add(machine, pci_data, mem, 0, 0, 0, pci_ne2000_init, pci_ne2000_rr); TODO */ |
2940 |
#if 1 |
|
2941 |
bus_pci_add(machine, pci_data, mem, 0, 1, 0, pci_ahc_init, pci_ahc_rr); |
/* TODO: make this nicer */ |
2942 |
#endif |
if (diskimage_exist(machine, 0, DISKIMAGE_SCSI) || |
2943 |
|
diskimage_exist(machine, 1, DISKIMAGE_SCSI) || |
2944 |
|
diskimage_exist(machine, 2, DISKIMAGE_SCSI) || |
2945 |
|
diskimage_exist(machine, 3, DISKIMAGE_SCSI) || |
2946 |
|
diskimage_exist(machine, 4, DISKIMAGE_SCSI) || |
2947 |
|
diskimage_exist(machine, 5, DISKIMAGE_SCSI) || |
2948 |
|
diskimage_exist(machine, 6, DISKIMAGE_SCSI) || |
2949 |
|
diskimage_exist(machine, 7, DISKIMAGE_SCSI)) |
2950 |
|
bus_pci_add(machine, pci_data, mem, 0, 1, 0, pci_ahc_init, pci_ahc_rr); |
2951 |
|
|
2952 |
|
/* TODO: second ahc */ |
2953 |
/* bus_pci_add(machine, pci_data, mem, 0, 2, 0, pci_ahc_init, pci_ahc_rr); */ |
/* bus_pci_add(machine, pci_data, mem, 0, 2, 0, pci_ahc_init, pci_ahc_rr); */ |
2954 |
|
|
2955 |
break; |
break; |
3006 |
|
|
3007 |
device_add(machine, "sn addr=0x80001000 irq=0"); |
device_add(machine, "sn addr=0x80001000 irq=0"); |
3008 |
dev_mc146818_init(machine, mem, 0x80004000ULL, 0, MC146818_ARC_NEC, 1); |
dev_mc146818_init(machine, mem, 0x80004000ULL, 0, MC146818_ARC_NEC, 1); |
3009 |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, PCKBC_8042, 0, 0, machine->use_x11); |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, PCKBC_8042, 0, 0, machine->use_x11, 0); |
3010 |
j = dev_ns16550_init(machine, mem, 0x80006000ULL, |
j = dev_ns16550_init(machine, mem, 0x80006000ULL, |
3011 |
3, 1, machine->use_x11? 0 : 1, "serial 0"); /* com0 */ |
3, 1, machine->use_x11? 0 : 1, "serial 0"); /* com0 */ |
3012 |
dev_ns16550_init(machine, mem, 0x80007000ULL, |
dev_ns16550_init(machine, mem, 0x80007000ULL, |
3115 |
exit(1); |
exit(1); |
3116 |
} |
} |
3117 |
|
|
3118 |
machine->jazz_data = device_add(machine, |
machine->md_int.jazz_data = device_add(machine, |
3119 |
"jazz addr=0x80000000"); |
"jazz addr=0x80000000"); |
3120 |
machine->md_interrupt = jazz_interrupt; |
machine->md_interrupt = jazz_interrupt; |
3121 |
|
|
3122 |
|
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
3123 |
|
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11, 0); |
3124 |
|
|
3125 |
|
j = dev_ns16550_init(machine, mem, |
3126 |
|
0x80006000ULL, 8 + 8, 1, |
3127 |
|
machine->use_x11? 0 : 1, "serial 0"); |
3128 |
|
dev_ns16550_init(machine, mem, |
3129 |
|
0x80007000ULL, 8 + 9, 1, 0, "serial 1"); |
3130 |
|
|
3131 |
|
if (machine->use_x11) |
3132 |
|
machine->main_console_handle = i; |
3133 |
|
else |
3134 |
|
machine->main_console_handle = j; |
3135 |
|
|
3136 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3137 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
3138 |
dev_vga_init(machine, mem, |
if (machine->use_x11) { |
3139 |
0x400b8000ULL, 0x600003c0ULL, |
dev_vga_init(machine, mem, |
3140 |
ARC_CONSOLE_MAX_X, ARC_CONSOLE_MAX_Y, machine->machine_name); |
0x400a0000ULL, 0x600003c0ULL, |
3141 |
arcbios_console_init(cpu, 0x400b8000ULL, |
machine->machine_name); |
3142 |
0x600003c0ULL, ARC_CONSOLE_MAX_X, |
arcbios_console_init(machine, |
3143 |
ARC_CONSOLE_MAX_Y); |
0x400b8000ULL, 0x600003c0ULL); |
3144 |
|
} |
3145 |
break; |
break; |
3146 |
case MACHINE_ARC_JAZZ_MAGNUM: |
case MACHINE_ARC_JAZZ_MAGNUM: |
3147 |
/* PROM mirror? */ |
/* PROM mirror? */ |
3161 |
|
|
3162 |
dev_asc_init(machine, mem, |
dev_asc_init(machine, mem, |
3163 |
0x80002000ULL, 8 + 5, NULL, DEV_ASC_PICA, |
0x80002000ULL, 8 + 5, NULL, DEV_ASC_PICA, |
3164 |
dev_jazz_dma_controller, machine->jazz_data); |
dev_jazz_dma_controller, |
3165 |
|
machine->md_int.jazz_data); |
3166 |
|
|
3167 |
device_add(machine, "fdc addr=0x80003000, irq=0"); |
device_add(machine, "fdc addr=0x80003000, irq=0"); |
3168 |
|
|
3169 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
3170 |
0x80004000ULL, 2, MC146818_ARC_JAZZ, 1); |
0x80004000ULL, 2, MC146818_ARC_JAZZ, 1); |
3171 |
|
|
|
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
|
|
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11); |
|
|
|
|
|
j = dev_ns16550_init(machine, mem, |
|
|
0x80006000ULL, 8 + 8, 1, |
|
|
machine->use_x11? 0 : 1, "serial 0"); |
|
|
dev_ns16550_init(machine, mem, |
|
|
0x80007000ULL, 8 + 9, 1, 0, "serial 1"); |
|
|
|
|
|
if (machine->use_x11) |
|
|
machine->main_console_handle = i; |
|
|
else |
|
|
machine->main_console_handle = j; |
|
|
|
|
3172 |
#if 0 |
#if 0 |
3173 |
Not yet. |
Not yet. |
3174 |
dev_wdc_init(machine, mem, 0x900001f0ULL, 8+16 + 14, 0); |
dev_wdc_init(machine, mem, 0x900001f0ULL, 8+16 + 14, 0); |
3188 |
|
|
3189 |
strcat(machine->machine_name, " (Microsoft Jazz, Olivetti M700)"); |
strcat(machine->machine_name, " (Microsoft Jazz, Olivetti M700)"); |
3190 |
|
|
3191 |
machine->jazz_data = device_add(machine, |
machine->md_int.jazz_data = device_add(machine, |
3192 |
"jazz addr=0x80000000"); |
"jazz addr=0x80000000"); |
3193 |
machine->md_interrupt = jazz_interrupt; |
machine->md_interrupt = jazz_interrupt; |
3194 |
|
|
3198 |
i = 0; /* TODO: Yuck! */ |
i = 0; /* TODO: Yuck! */ |
3199 |
#if 0 |
#if 0 |
3200 |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
3201 |
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11); |
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11, 0); |
3202 |
#endif |
#endif |
3203 |
j = dev_ns16550_init(machine, mem, |
j = dev_ns16550_init(machine, mem, |
3204 |
0x80006000ULL, 8 + 8, 1, |
0x80006000ULL, 8 + 8, 1, |
3226 |
|
|
3227 |
strcat(machine->machine_name, " (Deskstation Tyne)"); |
strcat(machine->machine_name, " (Deskstation Tyne)"); |
3228 |
|
|
|
dev_vga_init(machine, mem, 0x1000b8000ULL, 0x9000003c0ULL, |
|
|
ARC_CONSOLE_MAX_X, ARC_CONSOLE_MAX_Y, machine->machine_name); |
|
|
|
|
|
arcbios_console_init(cpu, 0x1000b8000ULL, |
|
|
0x9000003c0ULL, ARC_CONSOLE_MAX_X, |
|
|
ARC_CONSOLE_MAX_Y); |
|
|
|
|
3229 |
i = dev_ns16550_init(machine, mem, 0x9000003f8ULL, 0, 1, machine->use_x11? 0 : 1, "serial 0"); |
i = dev_ns16550_init(machine, mem, 0x9000003f8ULL, 0, 1, machine->use_x11? 0 : 1, "serial 0"); |
3230 |
dev_ns16550_init(machine, mem, 0x9000002f8ULL, 0, 1, 0, "serial 1"); |
dev_ns16550_init(machine, mem, 0x9000002f8ULL, 0, 1, 0, "serial 1"); |
3231 |
dev_ns16550_init(machine, mem, 0x9000003e8ULL, 0, 1, 0, "serial 2"); |
dev_ns16550_init(machine, mem, 0x9000003e8ULL, 0, 1, 0, "serial 2"); |
3240 |
#endif |
#endif |
3241 |
/* PC kbd */ |
/* PC kbd */ |
3242 |
j = dev_pckbc_init(machine, mem, 0x900000060ULL, |
j = dev_pckbc_init(machine, mem, 0x900000060ULL, |
3243 |
PCKBC_8042, 0, 0, machine->use_x11); |
PCKBC_8042, 0, 0, machine->use_x11, 0); |
3244 |
|
|
3245 |
if (machine->use_x11) |
if (machine->use_x11) |
3246 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
3247 |
else |
else |
3248 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3249 |
|
|
3250 |
|
if (machine->use_x11) { |
3251 |
|
dev_vga_init(machine, mem, 0x1000a0000ULL, |
3252 |
|
0x9000003c0ULL, machine->machine_name); |
3253 |
|
|
3254 |
|
arcbios_console_init(machine, |
3255 |
|
0x1000b8000ULL, 0x9000003c0ULL); |
3256 |
|
} |
3257 |
break; |
break; |
3258 |
|
|
3259 |
default: |
default: |
3263 |
} |
} |
3264 |
} |
} |
3265 |
|
|
|
|
|
|
if (!machine->prom_emulation) |
|
|
goto no_arc_prom_emulation; /* TODO: ugly */ |
|
|
|
|
|
|
|
3266 |
/* |
/* |
3267 |
* This is important: :-) |
* This is important: :-) |
3268 |
* |
* |
3269 |
* TODO: There should not be any use of |
* TODO: There should not be any use of ARCBIOS before this |
3270 |
* ARCBIOS before this statement. |
* point. |
|
*/ |
|
|
if (arc_wordlen == sizeof(uint64_t)) |
|
|
arcbios_set_64bit_mode(1); |
|
|
|
|
|
if (machine->physical_ram_in_mb < 16) |
|
|
fprintf(stderr, "WARNING! The ARC platform specification doesn't allow less than 16 MB of RAM. Continuing anyway.\n"); |
|
|
|
|
|
arcbios_set_default_exception_handler(cpu); |
|
|
|
|
|
memset(&arcbios_sysid, 0, sizeof(arcbios_sysid)); |
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* Vendor ID, max 8 chars: */ |
|
|
strncpy(arcbios_sysid.VendorId, "SGI", 3); |
|
|
switch (machine->machine_subtype) { |
|
|
case 22: |
|
|
strncpy(arcbios_sysid.ProductId, |
|
|
"87654321", 8); /* some kind of ID? */ |
|
|
break; |
|
|
case 32: |
|
|
strncpy(arcbios_sysid.ProductId, "8", 1); |
|
|
/* 6 or 8 (?) */ |
|
|
break; |
|
|
default: |
|
|
snprintf(arcbios_sysid.ProductId, 8, "IP%i", |
|
|
machine->machine_subtype); |
|
|
} |
|
|
} else { |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "RD94", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS DUO", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "blahblah", 8); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R98: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "R98", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS MAG", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS MAG", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_M700: |
|
|
strncpy(arcbios_sysid.VendorId, "OLI00000", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_DESKTECH_TYNE: |
|
|
strncpy(arcbios_sysid.VendorId, "DESKTECH", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
default: |
|
|
fatal("error in machine.c sysid\n"); |
|
|
exit(1); |
|
|
} |
|
|
} |
|
|
store_buf(cpu, SGI_SYSID_ADDR, (char *)&arcbios_sysid, sizeof(arcbios_sysid)); |
|
|
|
|
|
arcbios_get_dsp_stat(cpu, &arcbios_dsp_stat); |
|
|
store_buf(cpu, ARC_DSPSTAT_ADDR, (char *)&arcbios_dsp_stat, sizeof(arcbios_dsp_stat)); |
|
|
|
|
|
/* |
|
|
* The first 12 MBs of RAM are simply reserved... this simplifies things a lot. |
|
|
* If there's more than 512MB of RAM, it has to be split in two, according to |
|
|
* the ARC spec. This code creates a number of chunks of at most 512MB each. |
|
|
* |
|
|
* NOTE: The region of physical address space between 0x10000000 and 0x1fffffff |
|
|
* (256 - 512 MB) is usually occupied by memory mapped devices, so that portion is "lost". |
|
3271 |
*/ |
*/ |
3272 |
|
|
3273 |
arc_reserved = 0x2000; |
if (machine->prom_emulation) |
3274 |
if (machine->machine_type == MACHINE_SGI) |
arcbios_init(machine, arc_wordlen == sizeof(uint64_t), |
3275 |
arc_reserved = 0x4000; |
sgi_ram_offset); |
3276 |
|
else |
3277 |
arcbios_add_memory_descriptor(cpu, 0, arc_reserved, ARCBIOS_MEM_FirmwarePermanent); |
goto no_arc_prom_emulation; /* TODO: ugly */ |
|
arcbios_add_memory_descriptor(cpu, sgi_ram_offset + arc_reserved, 0x60000-arc_reserved, ARCBIOS_MEM_FirmwareTemporary); |
|
|
|
|
|
mem_base = 12; |
|
|
mem_base += sgi_ram_offset / 1048576; |
|
|
|
|
|
while (mem_base < machine->physical_ram_in_mb + sgi_ram_offset/1048576) { |
|
|
mem_count = machine->physical_ram_in_mb + sgi_ram_offset/1048576 |
|
|
- mem_base; |
|
|
|
|
|
/* Skip the 256-512MB region (for devices) */ |
|
|
if (mem_base < 256 && mem_base + mem_count > 256) { |
|
|
mem_count = 256-mem_base; |
|
|
} |
|
|
|
|
|
/* At most 512MB per descriptor (at least the first 512MB |
|
|
must be separated this way, according to the ARC spec) */ |
|
|
if (mem_count > 512) |
|
|
mem_count = 512; |
|
|
|
|
|
arcbios_add_memory_descriptor(cpu, mem_base * 1048576, |
|
|
mem_count * 1048576, ARCBIOS_MEM_FreeMemory); |
|
|
|
|
|
mem_base += mem_count; |
|
|
|
|
|
/* Skip the devices: */ |
|
|
if (mem_base == 256) |
|
|
mem_base = 512; |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* Components: (this is an example of what a system could look like) |
|
|
* |
|
|
* [System] |
|
|
* [CPU] (one for each cpu) |
|
|
* [FPU] (one for each cpu) |
|
|
* [CPU Caches] |
|
|
* [Memory] |
|
|
* [Ethernet] |
|
|
* [Serial] |
|
|
* [SCSI] |
|
|
* [Disk] |
|
|
* |
|
|
* Here's a good list of what hardware is in different IP-models: |
|
|
* http://www.linux-mips.org/archives/linux-mips/2001-03/msg00101.html |
|
|
*/ |
|
|
|
|
|
if (machine->machine_name == NULL) |
|
|
fatal("ERROR: machine_name == NULL\n"); |
|
|
if (short_machine_name == NULL) |
|
|
fatal("ERROR: short_machine_name == NULL\n"); |
|
|
|
|
|
switch (machine->machine_type) { |
|
|
case MACHINE_SGI: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, short_machine_name, 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
default: |
|
|
/* ARC: */ |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-RD94", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R94", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R96", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R98: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R98", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "PICA-61", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "Microsoft-Jazz", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_M700: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "Microsoft-Jazz", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_DESKTECH_TYNE: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "DESKTECH-TYNE", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
default: |
|
|
fatal("Unimplemented ARC machine type %i\n", |
|
|
machine->machine_subtype); |
|
|
exit(1); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* Common stuff for both SGI and ARC: |
|
|
*/ |
|
|
debug("ARC system @ 0x%llx\n", (long long)system); |
|
|
|
|
|
for (i=0; i<machine->ncpus; i++) { |
|
|
uint64_t cpuaddr, fpu=0, picache, pdcache, sdcache=0; |
|
|
int cache_size, cache_line_size; |
|
|
unsigned int jj; |
|
|
char arc_cpu_name[100]; |
|
|
char arc_fpc_name[105]; |
|
|
|
|
|
snprintf(arc_cpu_name, sizeof(arc_cpu_name), |
|
|
"MIPS-%s", machine->cpu_name); |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R96) |
|
|
snprintf(arc_cpu_name, sizeof(arc_cpu_name), |
|
|
"MIPS-%s - Pr 4/5.0, Fp 5/0", |
|
|
machine->cpu_name); |
|
|
|
|
|
arc_cpu_name[sizeof(arc_cpu_name)-1] = 0; |
|
|
for (jj=0; jj<strlen(arc_cpu_name); jj++) |
|
|
if (arc_cpu_name[jj] >= 'a' && arc_cpu_name[jj] <= 'z') |
|
|
arc_cpu_name[jj] += ('A' - 'a'); |
|
|
|
|
|
strcpy(arc_fpc_name, arc_cpu_name); |
|
|
strcat(arc_fpc_name, "FPC"); |
|
|
|
|
|
cpuaddr = arcbios_addchild_manual(cpu, COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_CPU, |
|
|
0, 1, 2, i, 0xffffffff, arc_cpu_name, system, NULL, 0); |
|
|
|
|
|
/* |
|
|
* TODO: This was in the ARC specs, but it isn't |
|
|
* really used by ARC implementations? |
|
|
* At least SGI-IP32 uses it. |
|
|
*/ |
|
|
if (machine->machine_type == MACHINE_SGI) |
|
|
fpu = arcbios_addchild_manual(cpu, COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_FPU, |
|
|
0, 1, 2, 0, 0xffffffff, arc_fpc_name, cpuaddr, NULL, 0); |
|
|
|
|
|
cache_size = DEFAULT_PCACHE_SIZE - 12; |
|
|
if (machine->cache_picache) |
|
|
cache_size = machine->cache_picache - 12; |
|
|
if (cache_size < 0) |
|
|
cache_size = 0; |
|
|
|
|
|
cache_line_size = DEFAULT_PCACHE_LINESIZE; |
|
|
if (machine->cache_picache_linesize) |
|
|
cache_line_size = machine->cache_picache_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
picache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_PrimaryICache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xXXYYZZZZ |
|
|
* XX is refill-size. |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 32 bytes per line, default = 32 KB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
|
|
|
cache_size = DEFAULT_PCACHE_SIZE - 12; |
|
|
if (machine->cache_pdcache) |
|
|
cache_size = machine->cache_pdcache - 12; |
|
|
if (cache_size < 0) |
|
|
cache_size = 0; |
|
|
|
|
|
cache_line_size = DEFAULT_PCACHE_LINESIZE; |
|
|
if (machine->cache_pdcache_linesize) |
|
|
cache_line_size = machine->cache_pdcache_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
pdcache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_PrimaryDCache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xYYZZZZ |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 32 bytes per line, default = 32 KB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
|
|
|
if (machine->cache_secondary >= 12) { |
|
|
cache_size = machine->cache_secondary - 12; |
|
|
|
|
|
cache_line_size = 6; /* 64 bytes default */ |
|
|
if (machine->cache_secondary_linesize) |
|
|
cache_line_size = machine->cache_secondary_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
sdcache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_SecondaryDCache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xYYZZZZ |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 64 bytes per line, default = 1 MB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
} |
|
|
|
|
|
debug("ARC cpu%i @ 0x%llx", i, (long long)cpuaddr); |
|
|
|
|
|
if (fpu != 0) |
|
|
debug(" (fpu @ 0x%llx)\n", (long long)fpu); |
|
|
else |
|
|
debug("\n"); |
|
|
|
|
|
debug(" picache @ 0x%llx, pdcache @ 0x%llx\n", |
|
|
(long long)picache, (long long)pdcache); |
|
|
|
|
|
if (machine->cache_secondary >= 12) |
|
|
debug(" sdcache @ 0x%llx\n", |
|
|
(long long)sdcache); |
|
|
|
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* TODO: Memory amount (and base address?)! */ |
|
|
uint64_t memory = arcbios_addchild_manual(cpu, COMPONENT_CLASS_MemoryClass, |
|
|
COMPONENT_TYPE_MemoryUnit, |
|
|
0, 1, 2, 0, 0xffffffff, "memory", cpuaddr, NULL, 0); |
|
|
debug(" memory @ 0x%llx\n", (long long)memory); |
|
|
} |
|
|
} |
|
|
|
|
3278 |
|
|
3279 |
/* |
/* |
|
* Other components, and default TLB entries: |
|
|
* |
|
3280 |
* TODO: How to build the component tree intermixed with |
* TODO: How to build the component tree intermixed with |
3281 |
* the rest of device initialization? |
* the rest of device initialization? |
3282 |
*/ |
*/ |
3283 |
|
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* TODO: On which models is this required? */ |
|
|
mips_coproc_tlb_set_entry(cpu, 0, 1048576*16, |
|
|
0xc000000000000000ULL, |
|
|
0x0, 1048576*16, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
} |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
( machine->machine_subtype == MACHINE_ARC_NEC_RD94 || |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R94 || |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R96 )) { |
|
|
uint64_t jazzbus, eisa, other; |
|
|
|
|
|
jazzbus = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_MultiFunctionAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "Jazz-Internal Bus", |
|
|
system, NULL, 0); |
|
|
|
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
if (machine->use_x11) |
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
0, 1, 2, 0, 0x0, "10110004", |
|
|
system, NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
if (machine->use_x11) { |
|
|
uint64_t x; |
|
|
x = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0x0, "necvdfrb", |
|
|
jazzbus, NULL, 0); |
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "640x480", |
|
|
x, NULL, 0); |
|
|
} |
|
|
|
|
|
/* TODO: R[D]94 too? */ |
|
|
eisa = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_EISAAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "EISA", |
|
|
system, NULL, 0); |
|
|
|
|
|
other = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_OtherController, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC1C01", |
|
|
eisa, NULL, 0); |
|
|
|
|
|
break; |
|
|
} |
|
|
} |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
(machine->machine_subtype == MACHINE_ARC_JAZZ_PICA |
|
|
|| machine->machine_subtype == MACHINE_ARC_JAZZ_MAGNUM)) { |
|
|
uint64_t jazzbus, ali_s3, vxl; |
|
|
uint64_t diskcontroller, floppy, kbdctl, kbd; |
|
|
uint64_t ptrctl, ptr, paral, audio; |
|
|
uint64_t eisa, scsi; |
|
|
/* uint64_t serial1, serial2; */ |
|
|
|
|
|
jazzbus = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_MultiFunctionAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "Jazz-Internal Bus", |
|
|
system, NULL, 0); |
|
|
|
|
|
/* |
|
|
* DisplayController, needed by NetBSD: |
|
|
* TODO: NetBSD still doesn't use it :( |
|
|
*/ |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
/* Default TLB entries on PICA-61: */ |
|
|
|
|
|
/* 7: 256K, asid: 0x0, v: 0xe1000000, |
|
|
p0: 0xfff00000(2.VG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 7, 262144, |
|
|
0xffffffffe1000000ULL, |
|
|
0x0fff00000ULL, 0, |
|
|
1, 0, 0, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 8: 64K, asid: 0x0, v: 0xe0000000, |
|
|
p0: 0x80000000(2DVG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 8, 65536, |
|
|
0xffffffffe0000000ULL, |
|
|
0x080000000ULL, 0, |
|
|
1, 0, 1, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 9: 64K, asid: 0x0, v: 0xe00e0000, |
|
|
p0: 0x800e0000(2DVG), p1: 0x800f0000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 9, 65536, |
|
|
(uint64_t)0xffffffffe00e0000ULL, |
|
|
(uint64_t)0x0800e0000ULL, |
|
|
(uint64_t)0x0800f0000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 10: 4K, asid: 0x0, v: 0xe0100000, |
|
|
p0: 0xf0000000(2DVG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 10, 4096, |
|
|
(uint64_t)0xffffffffe0100000ULL, |
|
|
(uint64_t)0x0f0000000ULL, 0, |
|
|
1, 0, 1, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 11: 1M, asid: 0x0, v: 0xe0200000, |
|
|
p0: 0x60000000(2DVG), p1: 0x60100000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 11, 1048576, |
|
|
0xffffffffe0200000ULL, |
|
|
0x060000000ULL, 0x060100000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 12: 1M, asid: 0x0, v: 0xe0400000, |
|
|
p0: 0x60200000(2DVG), p1: 0x60300000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 12, 1048576, |
|
|
0xffffffffe0400000ULL, |
|
|
0x060200000ULL, 0x060300000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 13: 4M, asid: 0x0, v: 0xe0800000, |
|
|
p0: 0x40000000(2DVG), p1: 0x40400000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 13, 1048576*4, |
|
|
0xffffffffe0800000ULL, |
|
|
0x040000000ULL, 0x040400000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 14: 16M, asid: 0x0, v: 0xe2000000, |
|
|
p0: 0x90000000(2DVG), p1: 0x91000000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 14, 1048576*16, |
|
|
0xffffffffe2000000ULL, |
|
|
0x090000000ULL, 0x091000000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
if (machine->use_x11) { |
|
|
ali_s3 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "ALI_S3", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "1024x768", |
|
|
ali_s3, NULL, 0); |
|
|
} |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
if (machine->use_x11) { |
|
|
vxl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "VXL", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "1024x768", |
|
|
vxl, NULL, 0); |
|
|
} |
|
|
break; |
|
|
} |
|
|
|
|
|
diskcontroller = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DiskController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "I82077", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
floppy = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_FloppyDiskPeripheral, |
|
|
COMPONENT_FLAG_Removable | |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, NULL, |
|
|
diskcontroller, NULL, 0); |
|
|
|
|
|
kbdctl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_KeyboardController, |
|
|
COMPONENT_FLAG_ConsoleIn | |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "I8742", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
kbd = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_KeyboardPeripheral, |
|
|
COMPONENT_FLAG_ConsoleIn | |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "PCAT_ENHANCED", |
|
|
kbdctl, NULL, 0); |
|
|
|
|
|
ptrctl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_PointerController, |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "I8742", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
ptr = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_PointerPeripheral, |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "PS2 MOUSE", |
|
|
ptrctl, NULL, 0); |
|
|
|
|
|
/* These cause Windows NT to bug out. */ |
|
|
#if 0 |
|
|
serial1 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_SerialController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "COM1", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
serial2 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_SerialController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "COM1", |
|
|
jazzbus, NULL, 0); |
|
|
#endif |
|
|
|
|
|
paral = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_ParallelController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "LPT1", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
audio = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_AudioController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "MAGNUM", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
eisa = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_EISAAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "EISA", |
|
|
system, NULL, 0); |
|
|
|
|
|
{ |
|
|
unsigned char config[78]; |
|
|
memset(config, 0, sizeof(config)); |
|
|
|
|
|
/* config data version: 1, revision: 2, count: 4 */ |
|
|
config[0] = 0x01; config[1] = 0x00; |
|
|
config[2] = 0x02; config[3] = 0x00; |
|
|
config[4] = 0x04; config[5] = 0x00; config[6] = 0x00; config[7] = 0x00; |
|
|
|
|
|
/* |
|
|
type: Interrupt |
|
|
share_disposition: DeviceExclusive, flags: LevelSensitive |
|
|
level: 4, vector: 22, reserved1: 0 |
|
|
*/ |
|
|
config[8] = arc_CmResourceTypeInterrupt; |
|
|
config[9] = arc_CmResourceShareDeviceExclusive; |
|
|
config[10] = arc_CmResourceInterruptLevelSensitive; |
|
|
config[12] = 4; |
|
|
config[16] = 22; |
|
|
config[20] = 0; |
|
|
|
|
|
/* |
|
|
type: Memory |
|
|
share_disposition: DeviceExclusive, flags: ReadWrite |
|
|
start: 0x 0 80002000, length: 0x1000 |
|
|
*/ |
|
|
config[24] = arc_CmResourceTypeMemory; |
|
|
config[25] = arc_CmResourceShareDeviceExclusive; |
|
|
config[26] = arc_CmResourceMemoryReadWrite; |
|
|
config[28] = 0x00; config[29] = 0x20; config[30] = 0x00; config[31] = 0x80; |
|
|
config[32] = 0x00; config[33] = 0x00; config[34] = 0x00; config[35] = 0x00; |
|
|
config[36] = 0x00; config[37] = 0x10; config[38] = 0x00; config[39] = 0x00; |
|
|
|
|
|
/* |
|
|
type: DMA |
|
|
share_disposition: DeviceExclusive, flags: 0x0 |
|
|
channel: 0, port: 0, reserved1: 0 |
|
|
*/ |
|
|
config[40] = arc_CmResourceTypeDMA; |
|
|
config[41] = arc_CmResourceShareDeviceExclusive; |
|
|
/* 42..43 = flags, 44,45,46,47 = channel, 48,49,50,51 = port, 52,53,54,55 = reserved */ |
|
|
|
|
|
/* type: DeviceSpecific |
|
|
share_disposition: DeviceExclusive, flags: 0x0 |
|
|
datasize: 6, reserved1: 0, reserved2: 0 |
|
|
data: [0x1:0x0:0x2:0x0:0x7:0x30] |
|
|
*/ |
|
|
config[56] = arc_CmResourceTypeDeviceSpecific; |
|
|
config[57] = arc_CmResourceShareDeviceExclusive; |
|
|
/* 58,59 = flags 60,61,62,63 = data size, 64..71 = reserved */ |
|
|
config[60] = 6; |
|
|
/* 72..77 = the data */ |
|
|
config[72] = 0x01; |
|
|
config[73] = 0x00; |
|
|
config[74] = 0x02; |
|
|
config[75] = 0x00; |
|
|
config[76] = 0x07; |
|
|
config[77] = 0x30; |
|
|
scsi = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_SCSIAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "ESP216", |
|
|
system, config, sizeof(config)); |
|
|
|
|
|
arcbios_register_scsicontroller(scsi); |
|
|
} |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
add_symbol_name(&machine->symbol_context, |
|
|
ARC_FIRMWARE_ENTRIES, 0x10000, "[ARCBIOS entry]", 0); |
|
|
|
|
|
switch (arc_wordlen) { |
|
|
case sizeof(uint64_t): |
|
|
for (i=0; i<100; i++) |
|
|
store_64bit_word(cpu, ARC_FIRMWARE_VECTORS + i*8, |
|
|
ARC_FIRMWARE_ENTRIES + i*8); |
|
|
for (i=0; i<100; i++) |
|
|
store_64bit_word(cpu, ARC_PRIVATE_VECTORS + i*8, |
|
|
ARC_PRIVATE_ENTRIES + i*8); |
|
|
break; |
|
|
default: |
|
|
for (i=0; i<100; i++) |
|
|
store_32bit_word(cpu, ARC_FIRMWARE_VECTORS + i*4, |
|
|
ARC_FIRMWARE_ENTRIES + i*4); |
|
|
for (i=0; i<100; i++) |
|
|
store_32bit_word(cpu, ARC_PRIVATE_VECTORS + i*4, |
|
|
ARC_PRIVATE_ENTRIES + i*4); |
|
|
} |
|
|
|
|
|
switch (arc_wordlen) { |
|
|
case sizeof(uint64_t): |
|
|
/* |
|
|
* ARCS64 SPD (TODO: This is just a guess) |
|
|
*/ |
|
|
memset(&arcbios_spb_64, 0, sizeof(arcbios_spb_64)); |
|
|
store_64bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.SPBSignature, ARCBIOS_SPB_SIGNATURE); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.Version, 64); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.Revision, 0); |
|
|
store_64bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.FirmwareVector, ARC_FIRMWARE_VECTORS); |
|
|
store_buf(cpu, SGI_SPB_ADDR, (char *)&arcbios_spb_64, sizeof(arcbios_spb_64)); |
|
|
break; |
|
|
default: /* 32-bit */ |
|
|
/* |
|
|
* ARCBIOS SPB: (For ARC and 32-bit SGI modes) |
|
|
*/ |
|
|
memset(&arcbios_spb, 0, sizeof(arcbios_spb)); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.SPBSignature, ARCBIOS_SPB_SIGNATURE); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.SPBLength, sizeof(arcbios_spb)); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.Version, 1); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.Revision, machine->machine_type == MACHINE_SGI? 10 : 2); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.FirmwareVector, ARC_FIRMWARE_VECTORS); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.FirmwareVectorLength, 100 * 4); /* ? */ |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.PrivateVector, ARC_PRIVATE_VECTORS); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.PrivateVectorLength, 100 * 4); /* ? */ |
|
|
store_buf(cpu, SGI_SPB_ADDR, (char *)&arcbios_spb, sizeof(arcbios_spb)); |
|
|
} |
|
|
|
|
3284 |
/* |
/* |
3285 |
* Boot string in ARC format: |
* Boot string in ARC format: |
3286 |
* |
* |
3305 |
strcat(init_bootpath, "pci(0)"); |
strcat(init_bootpath, "pci(0)"); |
3306 |
} |
} |
3307 |
|
|
3308 |
if (diskimage_is_a_cdrom(machine, bootdev_id)) |
if (diskimage_is_a_cdrom(machine, bootdev_id, |
3309 |
snprintf(init_bootpath + strlen(init_bootpath), 400, |
bootdev_type)) |
3310 |
"scsi(0)cdrom(%i)fdisk(0)", bootdev_id); |
snprintf(init_bootpath + strlen(init_bootpath), |
3311 |
|
400,"scsi(0)cdrom(%i)fdisk(0)", bootdev_id); |
3312 |
else |
else |
3313 |
snprintf(init_bootpath + strlen(init_bootpath), 400, |
snprintf(init_bootpath + strlen(init_bootpath), |
3314 |
"scsi(0)disk(%i)rdisk(0)partition(1)", bootdev_id); |
400,"scsi(0)disk(%i)rdisk(0)partition(1)", |
3315 |
|
bootdev_id); |
3316 |
} |
} |
3317 |
|
|
3318 |
if (machine->machine_type == MACHINE_ARC) |
if (machine->machine_type == MACHINE_ARC) |
3330 |
cpu->cd.mips.gpr[MIPS_GPR_A0] = 0; /* note: argc is increased later */ |
cpu->cd.mips.gpr[MIPS_GPR_A0] = 0; /* note: argc is increased later */ |
3331 |
|
|
3332 |
/* TODO: not needed? */ |
/* TODO: not needed? */ |
3333 |
cpu->cd.mips.gpr[MIPS_GPR_SP] = machine->physical_ram_in_mb * 1048576 + 0x80000000 - 0x2080; |
cpu->cd.mips.gpr[MIPS_GPR_SP] = (int64_t)(int32_t) |
3334 |
|
(machine->physical_ram_in_mb * 1048576 + 0x80000000 - 0x2080); |
3335 |
|
|
3336 |
/* Set up argc/argv: */ |
/* Set up argc/argv: */ |
3337 |
addr = ARC_ENV_STRINGS; |
addr = ARC_ENV_STRINGS; |
3484 |
|
|
3485 |
/* First of all, the MeshCube has an Au1500 in it: */ |
/* First of all, the MeshCube has an Au1500 in it: */ |
3486 |
machine->md_interrupt = au1x00_interrupt; |
machine->md_interrupt = au1x00_interrupt; |
3487 |
machine->au1x00_ic_data = dev_au1x00_init(machine, mem); |
machine->md_int.au1x00_ic_data = dev_au1x00_init(machine, mem); |
3488 |
|
|
3489 |
/* |
/* |
3490 |
* TODO: Which non-Au1500 devices, and at what addresses? |
* TODO: Which non-Au1500 devices, and at what addresses? |
3532 |
device_add(machine, "8250 addr=0x18000800 addr_mult=4 irq=0"); |
device_add(machine, "8250 addr=0x18000800 addr_mult=4 irq=0"); |
3533 |
break; |
break; |
3534 |
|
|
|
case MACHINE_WRT54G: |
|
|
machine->machine_name = "Linksys WRT54G"; |
|
|
|
|
|
if (machine->use_x11) |
|
|
fprintf(stderr, "WARNING! Linksys WRT54G with -X is meaningless. Continuing anyway.\n"); |
|
|
|
|
|
/* 200 MHz default */ |
|
|
if (machine->emulated_hz == 0) |
|
|
machine->emulated_hz = 200000000; |
|
|
|
|
|
/* |
|
|
* Linux should be loaded at 0x80001000. |
|
|
* RAM: 16 or 32 MB, Flash RAM: 4 or 8 MB. |
|
|
* http://www.bumpclub.ee/~jaanus/wrt54g/vana/minicom.cap: |
|
|
* |
|
|
* Starting program at 0x80001000 |
|
|
* CPU revision is: 00029007 |
|
|
* Primary instruction cache 8kb, linesize 16 bytes (2 ways) |
|
|
* Primary data cache 4kb, linesize 16 bytes (2 ways) |
|
|
* memory: 01000000 @ 00000000 (usable) |
|
|
* Kernel command line: root=/dev/mtdblock2 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS0,115200 |
|
|
* CPU: BCM4712 rev 1 at 200 MHz |
|
|
* Calibrating delay loop... 199.47 BogoMIPS |
|
|
* ttyS00 at 0xb8000300 (irq = 3) is a 16550A |
|
|
* ttyS01 at 0xb8000400 (irq = 0) is a 16550A |
|
|
* Flash device: 0x400000 at 0x1c000000 |
|
|
* .. |
|
|
*/ |
|
|
|
|
|
/* TODO: What should the initial register contents be? */ |
|
|
#if 1 |
|
|
{ |
|
|
int i; |
|
|
for (i=0; i<32; i++) |
|
|
cpu->cd.mips.gpr[i] = 0x01230000 + (i << 8) + 0x55; |
|
|
} |
|
|
#endif |
|
|
|
|
|
break; |
|
|
|
|
3535 |
case MACHINE_SONYNEWS: |
case MACHINE_SONYNEWS: |
3536 |
/* |
/* |
3537 |
* There are several models, according to |
* There are several models, according to |
3651 |
dev_ns16550_init(machine, mem, 0x800002f8, 0, 1, 0, "serial 1"); |
dev_ns16550_init(machine, mem, 0x800002f8, 0, 1, 0, "serial 1"); |
3652 |
|
|
3653 |
/* This is used by Linux too: */ |
/* This is used by Linux too: */ |
3654 |
dev_vga_init(machine, mem, 0xc00b8000ULL, 0x800003c0ULL, 80, 25, |
dev_vga_init(machine, mem, 0xc00a0000ULL, 0x800003c0ULL, |
3655 |
machine->machine_name); |
machine->machine_name); |
3656 |
|
|
3657 |
store_32bit_word(cpu, 0x3010, |
store_32bit_word(cpu, 0x3010, |
3788 |
/* TODO */ |
/* TODO */ |
3789 |
break; |
break; |
3790 |
|
|
3791 |
|
case MACHINE_BAREARM: |
3792 |
|
machine->machine_name = "\"Bare\" ARM machine"; |
3793 |
|
break; |
3794 |
|
|
3795 |
|
case MACHINE_TESTARM: |
3796 |
|
machine->machine_name = "ARM test machine"; |
3797 |
|
|
3798 |
|
/* TODO */ |
3799 |
|
break; |
3800 |
|
|
3801 |
case MACHINE_BAREX86: |
case MACHINE_BAREX86: |
3802 |
machine->machine_name = "\"Bare\" x86 machine"; |
machine->machine_name = "\"Bare\" x86 machine"; |
3803 |
break; |
break; |
3804 |
|
|
3805 |
case MACHINE_X86: |
case MACHINE_X86: |
3806 |
machine->machine_name = "Generic x86 PC"; |
if (machine->machine_subtype == MACHINE_X86_XT) |
3807 |
|
machine->machine_name = "PC XT"; |
3808 |
|
else |
3809 |
|
machine->machine_name = "Generic x86 PC"; |
3810 |
|
|
3811 |
if (!machine->use_x11) |
/* Interrupt controllers: */ |
3812 |
fprintf(stderr, "WARNING! You are emulating a PC " |
snprintf(tmpstr, sizeof(tmpstr) - 1, "8259 addr=0x%llx", |
3813 |
"without -X. You will miss any output going\n" |
(long long)(X86_IO_BASE + 0x20)); |
3814 |
"to the screen!\n\n"); |
machine->md.pc.pic1 = device_add(machine, tmpstr); |
3815 |
|
if (machine->machine_subtype != MACHINE_X86_XT) { |
3816 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "8259 addr=0x%llx irq=2", |
3817 |
|
(long long)(X86_IO_BASE + 0xa0)); |
3818 |
|
machine->md.pc.pic2 = device_add(machine, tmpstr); |
3819 |
|
} |
3820 |
|
|
3821 |
|
machine->md_interrupt = x86_pc_interrupt; |
3822 |
|
|
3823 |
|
/* Timer: */ |
3824 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "8253 addr=0x%llx irq=0", |
3825 |
|
(long long)(X86_IO_BASE + 0x40)); |
3826 |
|
device_add(machine, tmpstr); |
3827 |
|
|
3828 |
/* |
snprintf(tmpstr, sizeof(tmpstr) - 1, "pccmos addr=0x%llx", |
3829 |
* Initialize all 16-bit interrupt vectors to point to |
(long long)(X86_IO_BASE + 0x70)); |
3830 |
* somewhere within the PC BIOS area (0xf000:0x8yyy): |
device_add(machine, tmpstr); |
|
*/ |
|
|
for (i=0; i<256; i++) { |
|
|
store_16bit_word(cpu, i*4, 0x8000 + i); |
|
|
store_16bit_word(cpu, i*4 + 2, 0xf000); |
|
|
} |
|
3831 |
|
|
3832 |
dev_vga_init(machine, mem, 0xb8000ULL, 0x1000003c0ULL, 80, 25, |
/* TODO: IRQ when emulating a PC XT? */ |
|
"Generic x86 PC"); |
|
3833 |
|
|
3834 |
dev_wdc_init(machine, mem, 0x1000001f0ULL, 14, 0); |
/* IDE controllers: */ |
3835 |
|
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
3836 |
|
diskimage_exist(machine, 1, DISKIMAGE_IDE)) |
3837 |
|
dev_wdc_init(machine, mem, X86_IO_BASE + 0x1f0, 14, 0); |
3838 |
|
if (diskimage_exist(machine, 2, DISKIMAGE_IDE) || |
3839 |
|
diskimage_exist(machine, 3, DISKIMAGE_IDE)) |
3840 |
|
dev_wdc_init(machine, mem, X86_IO_BASE + 0x170, 15, 2); |
3841 |
|
|
3842 |
|
/* Floppy controller at irq 6 */ |
3843 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "fdc addr=0x%llx irq=6", |
3844 |
|
(long long)(X86_IO_BASE + 0x3f0)); |
3845 |
|
device_add(machine, tmpstr); |
3846 |
|
|
3847 |
/* TODO: disable the "enable" flag when a keyboard has |
/* TODO: sound blaster (eventually) at irq 7? */ |
3848 |
been added: */ |
|
3849 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
/* TODO: parallel port */ |
3850 |
0x1000003f8ULL, 4, 1, 1, "com1"); |
|
3851 |
dev_ns16550_init(machine, mem, 0x100000378ULL, 3, 1, 0, "com2"); |
/* Serial ports: (TODO: 8250 for PC XT?) */ |
3852 |
|
dev_ns16550_init(machine, mem, X86_IO_BASE + 0x3f8, 4, 1, 0, "com1"); |
3853 |
|
dev_ns16550_init(machine, mem, X86_IO_BASE + 0x378, 3, 1, 0, "com2"); |
3854 |
|
|
3855 |
|
/* VGA + keyboard: */ |
3856 |
|
dev_vga_init(machine, mem, 0xa0000ULL, X86_IO_BASE + 0x3c0, |
3857 |
|
"Generic x86 PC"); |
3858 |
|
machine->main_console_handle = dev_pckbc_init(machine, |
3859 |
|
mem, X86_IO_BASE + 0x60, PCKBC_8042, 1, 12, 1, 1); |
3860 |
|
|
3861 |
|
if (machine->prom_emulation) |
3862 |
|
pc_bios_init(cpu); |
3863 |
|
|
3864 |
|
if (!machine->use_x11 && !quiet_mode) |
3865 |
|
fprintf(stderr, "-------------------------------------" |
3866 |
|
"------------------------------------------\n" |
3867 |
|
"\n WARNING! You are emulating a PC without -X. " |
3868 |
|
"You will miss graphical output!\n\n" |
3869 |
|
"-------------------------------------" |
3870 |
|
"------------------------------------------\n"); |
3871 |
break; |
break; |
3872 |
|
|
3873 |
default: |
default: |
3937 |
case MACHINE_NETGEAR: |
case MACHINE_NETGEAR: |
3938 |
m->physical_ram_in_mb = 16; |
m->physical_ram_in_mb = 16; |
3939 |
break; |
break; |
|
case MACHINE_WRT54G: |
|
|
m->physical_ram_in_mb = 32; |
|
|
break; |
|
3940 |
case MACHINE_ARC: |
case MACHINE_ARC: |
3941 |
switch (m->machine_subtype) { |
switch (m->machine_subtype) { |
3942 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
3965 |
case MACHINE_TESTURISC: |
case MACHINE_TESTURISC: |
3966 |
m->physical_ram_in_mb = 2; |
m->physical_ram_in_mb = 2; |
3967 |
break; |
break; |
3968 |
|
case MACHINE_X86: |
3969 |
|
if (m->machine_subtype == MACHINE_X86_XT) |
3970 |
|
m->physical_ram_in_mb = 1; |
3971 |
|
break; |
3972 |
} |
} |
3973 |
} |
} |
3974 |
|
|
3975 |
/* Special hack for WRT54G and hpcmips machines: */ |
/* Special hack for hpcmips machines: */ |
3976 |
if (m->machine_type == MACHINE_WRT54G || |
if (m->machine_type == MACHINE_HPCMIPS) { |
|
m->machine_type == MACHINE_HPCMIPS) { |
|
3977 |
m->dbe_on_nonexistant_memaccess = 0; |
m->dbe_on_nonexistant_memaccess = 0; |
3978 |
} |
} |
3979 |
|
|
4069 |
case MACHINE_NETGEAR: |
case MACHINE_NETGEAR: |
4070 |
m->cpu_name = strdup("RC32334"); |
m->cpu_name = strdup("RC32334"); |
4071 |
break; |
break; |
|
case MACHINE_WRT54G: |
|
|
m->cpu_name = strdup("BCM4712"); |
|
|
break; |
|
4072 |
case MACHINE_ARC: |
case MACHINE_ARC: |
4073 |
switch (m->machine_subtype) { |
switch (m->machine_subtype) { |
4074 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
4171 |
m->cpu_name = strdup("EV4"); |
m->cpu_name = strdup("EV4"); |
4172 |
break; |
break; |
4173 |
|
|
4174 |
|
/* ARM: */ |
4175 |
|
case MACHINE_BAREARM: |
4176 |
|
case MACHINE_TESTARM: |
4177 |
|
m->cpu_name = strdup("ARM"); |
4178 |
|
break; |
4179 |
|
|
4180 |
/* x86: */ |
/* x86: */ |
4181 |
case MACHINE_BAREX86: |
case MACHINE_BAREX86: |
4182 |
case MACHINE_X86: |
case MACHINE_X86: |
4183 |
m->cpu_name = strdup("PENTIUM"); |
if (m->machine_subtype == MACHINE_X86_XT) |
4184 |
|
m->cpu_name = strdup("8086"); |
4185 |
|
else |
4186 |
|
m->cpu_name = strdup("AMD64"); |
4187 |
break; |
break; |
4188 |
} |
} |
4189 |
|
|
4434 |
*/ |
*/ |
4435 |
|
|
4436 |
/* X86 machine: */ |
/* X86 machine: */ |
4437 |
me = machine_entry_new("x86 (generic PC-style machine)", ARCH_X86, |
me = machine_entry_new("x86-based PC", ARCH_X86, |
4438 |
MACHINE_X86, 2, 0); |
MACHINE_X86, 2, 2); |
4439 |
me->aliases[0] = "pc"; |
me->aliases[0] = "pc"; |
4440 |
me->aliases[1] = "x86"; |
me->aliases[1] = "x86"; |
4441 |
|
me->subtype[0] = machine_entry_subtype_new("Generic PC", |
4442 |
|
MACHINE_X86_GENERIC, 1); |
4443 |
|
me->subtype[0]->aliases[0] = "generic"; |
4444 |
|
me->subtype[1] = machine_entry_subtype_new("PC XT", MACHINE_X86_XT, 1); |
4445 |
|
me->subtype[1]->aliases[0] = "xt"; |
4446 |
if (cpu_family_ptr_by_number(ARCH_X86) != NULL) { |
if (cpu_family_ptr_by_number(ARCH_X86) != NULL) { |
4447 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4448 |
} |
} |
4488 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4489 |
} |
} |
4490 |
|
|
4491 |
|
/* Test-machine for ARM: */ |
4492 |
|
me = machine_entry_new("Test-machine for ARM", ARCH_ARM, |
4493 |
|
MACHINE_TESTARM, 1, 0); |
4494 |
|
me->aliases[0] = "testarm"; |
4495 |
|
if (cpu_family_ptr_by_number(ARCH_ARM) != NULL) { |
4496 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4497 |
|
} |
4498 |
|
|
4499 |
/* Test-machine for Alpha: */ |
/* Test-machine for Alpha: */ |
4500 |
me = machine_entry_new("Test-machine for Alpha", ARCH_ALPHA, |
me = machine_entry_new("Test-machine for Alpha", ARCH_ALPHA, |
4501 |
MACHINE_TESTALPHA, 1, 0); |
MACHINE_TESTALPHA, 1, 0); |
4606 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4607 |
} |
} |
4608 |
|
|
|
/* Linksys: */ |
|
|
me = machine_entry_new("Linksys WRT54G", ARCH_MIPS, |
|
|
MACHINE_WRT54G, 2, 0); |
|
|
me->aliases[0] = "linksys"; |
|
|
me->aliases[1] = "wrt54g"; |
|
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
|
|
me->next = first_machine_entry; first_machine_entry = me; |
|
|
} |
|
|
|
|
4609 |
/* HPCmips: */ |
/* HPCmips: */ |
4610 |
me = machine_entry_new("Handheld MIPS (HPC)", |
me = machine_entry_new("Handheld MIPS (HPC)", |
4611 |
ARCH_MIPS, MACHINE_HPCMIPS, 2, 8); |
ARCH_MIPS, MACHINE_HPCMIPS, 2, 8); |
4691 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4692 |
} |
} |
4693 |
|
|
4694 |
|
/* Generic "bare" ARM machine: */ |
4695 |
|
me = machine_entry_new("Generic \"bare\" ARM machine", ARCH_ARM, |
4696 |
|
MACHINE_BAREARM, 1, 0); |
4697 |
|
me->aliases[0] = "barearm"; |
4698 |
|
if (cpu_family_ptr_by_number(ARCH_ARM) != NULL) { |
4699 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4700 |
|
} |
4701 |
|
|
4702 |
/* Generic "bare" Alpha machine: */ |
/* Generic "bare" Alpha machine: */ |
4703 |
me = machine_entry_new("Generic \"bare\" Alpha machine", ARCH_ALPHA, |
me = machine_entry_new("Generic \"bare\" Alpha machine", ARCH_ALPHA, |
4704 |
MACHINE_BAREALPHA, 1, 0); |
MACHINE_BAREALPHA, 1, 0); |