/[gxemul]/trunk/src/include/rd94.h
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Contents of /trunk/src/include/rd94.h

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Revision 4 - (show annotations)
Mon Oct 8 16:18:00 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 5552 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.707 2005/04/27 16:37:33 debug Exp $
20050408	Some minor updates to the wdc. Linux now doesn't complain
		anymore if a disk is non-present.
20050409	Various minor fixes (a bintrans bug, and some other things).
		The wdc seems to work with Playstation2 emulation, but there
		is a _long_ annoying delay when disks are detected.
		Fixing a really important bintrans bug (when devices and RAM
		are mixed within 4KB pages), which was triggered with
		NetBSD/playstation2 kernels.
20050410	Adding a dummy dev_ps2_ether (just so that NetBSD doesn't
		complain as much during bootup).
		Symbols starting with '$' are now ignored.
		Renaming dev_ps2_ohci.c to dev_ohci.c, etc.
20050411	Moving the bintrans-cache-isolation check from cpu_mips.c to
		cpu_mips_coproc.c. (I thought this would give a speedup, but
		it's not noticable.)
		Better playstation2 sbus interrupt code.
		Skip ahead many ticks if the count register is read manually.
		(This increases the speed of delay-loops that simply read
		the count register.)
20050412	Updates to the playstation2 timer/interrupt code.
		Some other minor updates.
20050413	NetBSD/cobalt runs from a disk image :-) including userland;
		updating the documentation on how to install NetBSD/cobalt
		using NetBSD/pmax (!).
		Some minor bintrans updates (no real speed improvement) and
		other minor updates (playstation2 now uses the -o options).
20050414	Adding a dummy x86 (and AMD64) mode.
20050415	Adding some (32-bit and 16-bit) x86 instructions.
		Adding some initial support for non-SCSI, non-IDE floppy
		images. (The x86 mode can boot from these, more or less.)
		Moving the devices/ and include/ directories to src/devices/
		and src/include/, respectively.
20050416	Continuing on the x86 stuff. (Adding pc_bios.c and some simple
		support for software interrupts in 16-bit mode.)
20050417	Ripping out most of the x86 instruction decoding stuff, trying
		to rewrite it in a cleaner way.
		Disabling some of the least working CPU families in the
		configure script (sparc, x86, alpha, hppa), so that they are
		not enabled by default.
20050418	Trying to fix the bug which caused problems when turning on
		and off bintrans interactively, by flushing the bintrans cache
		whenever bintrans is manually (re)enabled.
20050419	Adding the 'lswi' ppc instruction.
		Minor updates to the x86 instruction decoding.
20050420	Renaming x86 register name indices from R_xx to X86_R_xx (this
		makes building on Tru64 nicer).
20050422	Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi.
20050427	Adding screenshots to guestoses.html.
		Some minor fixes and testing for the next release.

==============  RELEASE 0.3.2  ==============
1 /* gxemul: $Id: rd94.h,v 1.2 2005/03/05 12:34:03 debug Exp $ */
2 #ifndef _RD94_H_
3 #define _RD94_H_ 1
4
5 #define RD94SYS 0
6
7 /* $NetBSD: rd94.h,v 1.4 2001/06/13 15:11:38 soda Exp $ */
8 /* $OpenBSD: pica.h,v 1.4 1996/09/14 15:58:28 pefo Exp $ */
9
10 /*
11 * Copyright (c) 1994, 1995, 1996 Per Fogelstrom
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed under OpenBSD by
24 * Per Fogelstrom.
25 * 4. The name of the author may not be used to endorse or promote products
26 * derived from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
29 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
30 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 */
41
42 /*
43 * I/O map
44 */
45
46 #define RD94_P_LOCAL_IO_BASE 0x80000000 /* I/O Base address */
47 #define RD94_V_LOCAL_IO_BASE 0xe0000000
48 #define RD94_S_LOCAL_IO_BASE 0x00040000 /* Size */
49 /* #define RD94SYS RD94_V_LOCAL_IO_BASE <-- NetBSD */
50
51 #define RD94_SYS_CONFIG (RD94SYS+0x000) /* Global config register */
52 #define RD94_SYS_RFAILADDR (RD94SYS+0x010) /* Remote failed address */
53 #define RD94_SYS_MFAILADDR (RD94SYS+0x018) /* Memory failed address */
54 #define RD94_SYS_INVALIDADDR (RD94SYS+0x020) /* Invalid address */
55 #define RD94_SYS_TL_BASE (RD94SYS+0x028) /* DMA transl. table base */
56 #define RD94_SYS_TL_LIMIT (RD94SYS+0x030) /* DMA transl. table limit */
57 #define RD94_SYS_TL_IVALID (RD94SYS+0x038) /* DMA transl. cache inval */
58 #define RD94_SYS_INTSTAT0 (RD94SYS+0x040) /* Int0 status (DMA?) */
59 #define RD94_SYS_INTSTAT1 (RD94SYS+0x048) /* Int1 status (LB) */
60 #define RD94_SYS_INTSTAT2 (RD94SYS+0x050) /* Int2 status (PCI/EISA) */
61 #define RD94_SYS_INTSTAT3 (RD94SYS+0x058) /* Int3 status (Timer) */
62 #define RD94_SYS_INTSTAT4 (RD94SYS+0x060) /* Int4 status (IPI) */
63 #define RD94_SYS_CPUID (RD94SYS+0x070) /* CPU number */
64 #define RD94_SYS_NMISRC (RD94SYS+0x078) /* NMI source */
65 #define RD94_SYS_EXT_IMASK (RD94SYS+0x0f8) /* External int enable mask */
66 #define RD94_SYS_DMA0_REGS (RD94SYS+0x100) /* DMA ch0 base address */
67 #define RD94_SYS_DMA1_REGS (RD94SYS+0x120) /* DMA ch0 base address */
68 #define RD94_SYS_DMA2_REGS (RD94SYS+0x140) /* DMA ch0 base address */
69 #define RD94_SYS_DMA3_REGS (RD94SYS+0x160) /* DMA ch0 base address */
70 #define RD94_SYS_IT_VALUE (RD94SYS+0x1a8) /* Interval timer reload */
71 #define RD94_SYS_IPI (RD94SYS+0x1b8) /* IPI register */
72 #define RD94_SYS_ECCDIAG (RD94SYS+0x1c8) /* ECC diagnostics */
73 #define RD94_SYS_PCI_CONFADDR (RD94SYS+0x518) /* PCI configuration address */
74 #define RD94_SYS_PCI_CONFDATA (RD94SYS+0x520) /* PCI configuration data */
75 #define RD94_SYS_PCI_INTMASK (RD94SYS+0x530) /* PCI interrupt mask */
76 #define RD94_SYS_PCI_INTSTAT (RD94SYS+0x538) /* PCI interrupt status */
77 #define RD94_SYS_BEEP_DIVISOR (RD94SYS+0x5A8) /* Beep frequency divisor */
78 #define RD94_SYS_BEEP_CNTL (RD94SYS+0x5AC) /* Beep control */
79 #define RD94_SYS_ERR_STAT (RD94SYS+0x5BC) /* System error status */
80
81 #define RD94LB RD94_V_LOCAL_IO_BASE
82 #define RD94_SYS_SONIC (RD94LB+0x1000) /* SONIC base address */
83 #define RD94_SYS_SCSI0 (RD94LB+0x2000) /* SCSI0 base address */
84 #define RD94_SYS_SCSI1 (RD94LB+0x3000) /* SCSI1 base address */
85 #define RD94_SYS_CLOCK (RD94LB+0x4000) /* Clock base address */
86 #define RD94_SYS_KBD (RD94LB+0x5000) /* Keybrd/mouse base address */
87 #define RD94_SYS_COM1 (RD94LB+0x6000) /* Com port 1 */
88 #define RD94_SYS_COM2 (RD94LB+0x7000) /* Com port 2 */
89 #define RD94_SYS_PAR1 (RD94LB+0x8000) /* Parallel port 1 */
90 #define RD94_SYS_NVRAM (RD94LB+0x9000) /* Unprotected NV-ram */
91 #define RD94_SYS_PNVRAM (RD94LB+0xa000) /* Protected NV-ram */
92 #define RD94_SYS_NVPROM (RD94LB+0xb000) /* Read only NV-ram */
93 #define RD94_SYS_FLOPPY (RD94LB+0xC000) /* Floppy base address */
94 #define RD94_SYS_SOUND (RD94LB+0x10000)/* Sound port */
95 #define RD94_SYS_THERMOMETER (RD94LB+0x12000)/* DS1620 thermometer */
96
97 #define RD94_SYS_LB_LED (RD94LB+0xE000) /* LED/self-test register */
98 #define RD94_SYS_LB_IE1 (RD94LB+0xF000) /* Local bus int enable */
99 #define RD94_SYS_LB_IE2 (RD94LB+0xF002) /* Local bus int enable */
100
101 #define RD94_P_PCI_IO 0x90000000 /* PCI I/O control */
102 #define RD94_V_PCI_IO 0xe2000000
103 #define RD94_S_PCI_IO 0x01000000
104
105 #define RD94_P_PCI_MEM 0x100000000LL /* PCI Memory control */
106 #define RD94_V_PCI_MEM 0xe3000000
107 #define RD94_S_PCI_MEM 0x40000000
108
109 #endif /* _RD94_H_ */
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