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dpavlin |
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/* gxemul: $Id: pxreg.h,v 1.2 2005/03/05 12:34:03 debug Exp $ */ |
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/* $NetBSD: pxreg.h,v 1.8 2000/06/13 13:39:12 ad Exp $ */ |
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#ifndef _PMAX_DEV_PXREG_H_ |
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#define _PMAX_DEV_PXREG_H_ |
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/*- |
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* Copyright (c) 1999 The NetBSD Foundation, Inc. |
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* All rights reserved. |
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* |
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* This code is derived from software contributed to The NetBSD Foundation |
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* by Andrew Doran. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. All advertising materials mentioning features or use of this software |
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* must display the following acknowledgement: |
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* This product includes software developed by the NetBSD |
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* Foundation, Inc. and its contributors. |
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* 4. Neither the name of The NetBSD Foundation nor the names of its |
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* contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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/* |
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* Definitions for the PixelStamp on Digital's 2D and 3D TurboChannel |
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* graphics accelerators. Stamp command packets take this general format: |
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* |
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* command word |
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* |
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* per-packet context (optional): |
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* line width |
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* xy mask |
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* cliping rectangle min & max |
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* rgb constant |
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* z constant |
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* |
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* per-primitive context (optional): |
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* xy mask |
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* xy mask address |
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* primitive data (vertices, spans info, video) |
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* line width |
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* halfspace equals conditions |
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* rgb flat, or rgb{1,2,3} smooth |
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* z flat, or z{1,2,3} smooth |
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*/ |
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/* |
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* These definitions are for the stamp command word, the first in |
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* each packet. This is a 32-bit word on all architectures. |
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*/ |
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/* opcode type */ |
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#define STAMP_CMD_POINTS (0x0000) |
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#define STAMP_CMD_LINES (0x0001) |
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#define STAMP_CMD_TRIANGLES (0x0002) |
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#define STAMP_CMD_COPYSPANS (0x0005) |
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#define STAMP_CMD_READSPANS (0x0006) |
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#define STAMP_CMD_WRITESPANS (0x0007) |
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#define STAMP_CMD_VIDEO (0x0008) |
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/* RGB format */ |
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#define STAMP_RGB_NONE (0x0000) |
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#define STAMP_RGB_CONST (0x0010) |
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#define STAMP_RGB_FLAT (0x0020) |
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#define STAMP_RGB_SMOOTH (0x0030) |
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/* Z format */ |
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#define STAMP_Z_NONE (0x0000) |
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#define STAMP_Z_CONST (0x0040) |
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#define STAMP_Z_FLAT (0x0080) |
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#define STAMP_Z_SMOOTH (0x00c0) |
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/* XY mask format */ |
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#define STAMP_XY_NONE (0x0000) |
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#define STAMP_XY_PERPACKET (0x0100) |
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#define STAMP_XY_PERPRIMATIVE (0x0200) |
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/* line width format */ |
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#define STAMP_LW_NONE (0x0000) |
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#define STAMP_LW_PERPACKET (0x0400) |
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#define STAMP_LW_PERPRIMATIVE (0x0800) |
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/* misc. */ |
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#define STAMP_CLIPRECT (0x00080000) |
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#define STAMP_MESH (0x00200000) |
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#define STAMP_AALINE (0x00800000) |
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#define STAMP_HS_EQUALS (0x80000000) |
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/* |
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* These definitions are for the stamp update word, also part of |
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* each packet. |
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*/ |
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/* plane */ |
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#define STAMP_PLANE_8X3 (0 << 5) |
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#define STAMP_PLANE_24 (1 << 5) |
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/* when to write enable the stamp */ |
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#define STAMP_WE_SIGN (0x04 << 8) |
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#define STAMP_WE_XYMASK (0x02 << 8) |
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#define STAMP_WE_CLIPRECT (0x01 << 8) |
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#define STAMP_WE_NONE (0x00 << 8) |
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/* update method */ |
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#define STAMP_METHOD_CLEAR (0x60 << 12) |
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#define STAMP_METHOD_AND (0x14 << 12) |
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#define STAMP_METHOD_ANDREV (0x15 << 12) |
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#define STAMP_METHOD_COPY (0x20 << 12) |
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#define STAMP_METHOD_ANDINV (0x16 << 12) |
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#define STAMP_METHOD_NOOP (0x40 << 12) |
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#define STAMP_METHOD_XOR (0x11 << 12) |
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#define STAMP_METHOD_OR (0x0f << 12) |
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#define STAMP_METHOD_NOR (0x17 << 12) |
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#define STAMP_METHOD_EQUIV (0x10 << 12) |
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#define STAMP_METHOD_INV (0x4e << 12) |
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#define STAMP_METHOD_ORREV (0x0e << 12) |
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#define STAMP_METHOD_COPYINV (0x2d << 12) |
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#define STAMP_METHOD_ORINV (0x0d << 12) |
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#define STAMP_METHOD_NAND (0x0c << 12) |
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#define STAMP_METHOD_SET (0x6c << 12) |
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#define STAMP_METHOD_SUM (0x00 << 12) |
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#define STAMP_METHOD_DIFF (0x02 << 12) |
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#define STAMP_METHOD_REVDIFF (0x01 << 12) |
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/* double buffering */ |
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#define STAMP_DB_NONE (0x00 << 28) |
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#define STAMP_DB_01 (0x01 << 28) |
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#define STAMP_DB_12 (0x02 << 28) |
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#define STAMP_DB_02 (0x04 << 28) |
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/* misc */ |
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#define STAMP_UPDATE_ENABLE (1) |
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#define STAMP_SAVE_SIGN (1<<6) |
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#define STAMP_SAVE_ALPHA (1<<7) |
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#define STAMP_SUPERSAMPLE (1<<11) |
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#define STAMP_SPAN (1<<19) |
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#define STAMP_COPYSPAN_ALIGNED (1<<20) |
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#define STAMP_MINMAX (1<<21) |
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#define STAMP_MULT (1<<22) |
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#define STAMP_MULTACC (1<<23) |
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#define STAMP_HALF_BUFF (1<27) |
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#define STAMP_INITIALIZE (1<<31) |
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#ifdef _KERNEL |
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#define STAMP_WIDTH (pxi->pxi_stampw) |
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#define STAMP_HEIGHT (pxi->pxi_stamph) |
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#endif |
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#define XMASKADDR(__sx, __a) (((__a)-((__sx) % STAMP_WIDTH)) & 0xF) |
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#define YMASKADDR(__sy, __b) (((__b)-((__sy) % STAMP_HEIGHT)) & 0xF) |
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#define XYMASKADDR(_x,_y,_a,_b) (XMASKADDR(_x,_a) << 16 | YMASKADDR(_y,_b)) |
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/* |
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* For the poll register. Don't mess with the # of retries or the delay |
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* unless you know what you're doing. According to OSF header files, |
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* the delay on Alpha is 20us, and the # of retries should be 4000. This is |
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* inadequate, particularly on the PXG which seems to run at a higher |
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* frequency. The STIC gets wedged while scrolling quite a lot. |
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*/ |
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#define STAMP_OK (0) |
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#define STAMP_BUSY (1) |
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#define STAMP_RETRIES (7000) |
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#define STAMP_DELAY (20) |
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#if 0 /* was: #ifdef alpha in NetBSD */ |
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#define __PXS(n) ((n) << 1) |
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#else |
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#define __PXS(n) (n) |
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#endif |
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/* |
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* Hardware offsets within PX board's TC slot. |
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*/ |
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#define PX_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ |
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#define PX_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ |
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#define PX_STIC_OFFSET __PXS(0x180000) /* STIC registers */ |
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#define PX_VDAC_OFFSET __PXS(0x200000) /* VDAC registers (bt459) */ |
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#define PX_VDAC_RESET_OFFSET __PXS(0x300000) /* VDAC reset register */ |
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#define PX_ROM_OFFSET __PXS(0x300000) /* ROM code */ |
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/* |
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* Hardware offsets within PXG board's TC slot. |
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*/ |
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#define PXG_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ |
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#define PXG_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ |
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#define PXG_STIC_OFFSET __PXS(0x180000) /* STIC registers */ |
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#define PXG_SRAM_OFFSET __PXS(0x200000) /* N10 SRAM */ |
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#define PXG_HOST_INTR_OFFSET __PXS(0x280000) /* N10 host interrupt */ |
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#define PXG_COPROC_INTR_OFFSET __PXS(0x2c0000) /* N10 coprocessor interrupt */ |
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#define PXG_VDAC_OFFSET __PXS(0x300000) /* VDAC registers (bt459) */ |
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#define PXG_VDAC_RESET_OFFSET __PXS(0x340000) /* VDAC reset register */ |
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#define PXG_ROM_OFFSET __PXS(0x380000) /* ROM code */ |
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#define PXG_N10_START_OFFSET __PXS(0x380000) /* N10 start register */ |
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#define PXG_N10_RESET_OFFSET __PXS(0x3c0000) /* N10 reset (stop?) register */ |
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/* |
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* STIC registers |
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*/ |
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struct stic_regs { |
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#if 0 /* was: ifdef __alpha in NetBSD */ |
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volatile int32_t __pad0; |
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volatile int32_t __pad1; |
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volatile int32_t __pad2; |
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volatile int32_t __pad3; |
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volatile int32_t hsync; |
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volatile int32_t __pad4; |
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volatile int32_t hsync2; |
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volatile int32_t __pad5; |
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volatile int32_t hblank; |
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volatile int32_t __pad6; |
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volatile int32_t vsync; |
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volatile int32_t __pad7; |
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volatile int32_t vblank; |
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volatile int32_t __pad8; |
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volatile int32_t vtest; |
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volatile int32_t __pad9; |
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volatile int32_t ipdvint; |
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volatile int32_t __pad10; |
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volatile int32_t __pad11; |
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volatile int32_t __pad12; |
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volatile int32_t sticsr; |
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volatile int32_t __pad13; |
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volatile int32_t busdat; |
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volatile int32_t __pad14; |
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volatile int32_t busadr; |
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volatile int32_t __pad15; |
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volatile int32_t __pad16; |
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volatile int32_t __pad17; |
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volatile int32_t buscsr; |
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volatile int32_t __pad18; |
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volatile int32_t modcl; |
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volatile int32_t __pad19; |
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#else /* __alpha */ |
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volatile int32_t __pad0; |
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volatile int32_t __pad1; |
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volatile int32_t hsync; |
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volatile int32_t hsync2; |
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volatile int32_t hblank; |
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volatile int32_t vsync; |
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volatile int32_t vblank; |
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volatile int32_t vtest; |
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volatile int32_t ipdvint; |
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volatile int32_t __pad2; |
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volatile int32_t sticsr; |
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volatile int32_t busdat; |
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volatile int32_t busadr; |
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volatile int32_t __pad3; |
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volatile int32_t buscsr; |
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volatile int32_t modcl; |
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#endif /* __alpha */ |
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}; |
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/* |
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* Bit definitions for px_stic_regs.stic_csr. |
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* these appear to exactly what the PROM tests use. |
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*/ |
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#define STIC_CSR_TSTFNC 0x00000003 |
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# define STIC_CSR_TSTFNC_NORMAL 0 |
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# define STIC_CSR_TSTFNC_PARITY 1 |
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# define STIC_CSR_TSTFNC_CNTPIX 2 |
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# define STIC_CSR_TSTFNC_TSTDAC 3 |
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#define STIC_CSR_CHECKPAR 0x00000004 |
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#define STIC_CSR_STARTVT 0x00000010 |
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#define STIC_CSR_START 0x00000020 |
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#define STIC_CSR_RESET 0x00000040 |
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#define STIC_CSR_STARTST 0x00000080 |
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/* |
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* Bit definitions for stic_regs.int. |
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* Three four-bit wide fields, for error (E), vertical-blank (V), and |
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* packetbuf-done (P) intererupts, respectively. |
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* The low-order three bits of each field are enable, requested, |
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* and acknowledge bits. The top bit of each field is unused. |
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*/ |
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#define STIC_INT_E_EN 0x00000001 |
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#define STIC_INT_E 0x00000002 |
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#define STIC_INT_E_WE 0x00000004 |
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#define STIC_INT_V_EN 0x00000100 |
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#define STIC_INT_V 0x00000200 |
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#define STIC_INT_V_WE 0x00000400 |
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#define STIC_INT_P_EN 0x00010000 |
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#define STIC_INT_P 0x00020000 |
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#define STIC_INT_P_WE 0x00040000 |
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#define STIC_INT_E_MASK (STIC_INT_E_EN | STIC_INT_E | STIC_INT_E_WE) |
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#define STIC_INT_V_MASK (STIC_INT_V_EN | STIC_INT_V | STIC_INT_V_WE) |
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#define STIC_INT_P_MASK (STIC_INT_P_EN | STIC_INT_P | STIC_INT_P_WE) |
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#define STIC_INT_MASK (STIC_INT_E_MASK | STIC_INT_P_MASK | STIC_INT_V_MASK) |
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#define STIC_INT_WE (STIC_INT_E_WE | STIC_INT_V_WE | STIC_INT_P_WE) |
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#define STIC_INT_CLR (STIC_INT_E_EN | STIC_INT_V_EN | STIC_INT_P_EN) |
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/* |
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* Convert a system physical address to STIC poll offset. Polling the offset |
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* returned will initiate DMA at the provided address. For the PX, the STIC |
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* only sees 23-bits (8MB) of address space. Also, bits 21-22 in physical |
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* address space map to bits 27-28 in the STIC's warped view of the world. |
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* This is also true for bits 15-20, which map to bits 18-23. Bits 0 and 1 |
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* are meaningless, because everything is word aligned. |
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* |
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* The final shift-right-by-9 is to map the address to poll register offset. |
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* These begin at px_softc.poll (which should obviously be added to the |
| 324 |
|
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* return value of this function to get a vaild poll address). |
| 325 |
|
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* |
| 326 |
|
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* This shift right gives us a granularity of 512 bytes when DMAing. The |
| 327 |
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* holes in STIC address space mean that DMAs can never cross a 32kB |
| 328 |
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* boundary. The maximum size for a DMA AFAIK is about 4kB. |
| 329 |
|
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* |
| 330 |
|
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* For the PXG, the PA is relative to SRAM (i.e. i860) address space, not |
| 331 |
|
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* system address space. The poll address will either return STAMP_OK, or |
| 332 |
|
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* STAMP_BUSY. |
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|
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*/ |
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|
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#if 0 |
| 336 |
|
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static __inline__ u_long px_sys2stic __P((void *)); |
| 337 |
|
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static __inline__ u_long px_sys2dma __P((void *)); |
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static __inline__ volatile int32_t *px_poll_addr __P((caddr_t, void *)); |
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|
| 340 |
|
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static __inline__ u_long |
| 341 |
|
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px_sys2stic(addr) |
| 342 |
|
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void *addr; |
| 343 |
|
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{ |
| 344 |
|
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u_long v; |
| 345 |
|
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|
| 346 |
|
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v = (u_long)addr; |
| 347 |
|
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v = ((v & ~0x7fff) << 3) | (v & 0x7fff); |
| 348 |
|
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return (v & 0x1ffff800); |
| 349 |
|
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} |
| 350 |
|
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|
| 351 |
|
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static __inline__ u_long |
| 352 |
|
|
px_sys2dma(addr) |
| 353 |
|
|
void *addr; |
| 354 |
|
|
{ |
| 355 |
|
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|
| 356 |
|
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return px_sys2stic(addr) >> 9; |
| 357 |
|
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} |
| 358 |
|
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|
| 359 |
|
|
/* |
| 360 |
|
|
* This is simply a wrapper for the above that returns a proper VA to |
| 361 |
|
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* poll when given a px_softc. |
| 362 |
|
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*/ |
| 363 |
|
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static __inline__ volatile int32_t * |
| 364 |
|
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px_poll_addr(slotbase, addr) |
| 365 |
|
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caddr_t slotbase; |
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|
|
void *addr; |
| 367 |
|
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{ |
| 368 |
|
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|
| 369 |
|
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return (volatile int32_t *)(slotbase + px_sys2dma(addr)); |
| 370 |
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} |
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#endif |
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|
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|
| 373 |
|
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#endif /* !_PMAX_DEV_PXREG_H_ */ |
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