/[gxemul]/trunk/src/include/opcodes_ppc.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/include/opcodes_ppc.h

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Revision 4 - (show annotations)
Mon Oct 8 16:18:00 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 5492 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.707 2005/04/27 16:37:33 debug Exp $
20050408	Some minor updates to the wdc. Linux now doesn't complain
		anymore if a disk is non-present.
20050409	Various minor fixes (a bintrans bug, and some other things).
		The wdc seems to work with Playstation2 emulation, but there
		is a _long_ annoying delay when disks are detected.
		Fixing a really important bintrans bug (when devices and RAM
		are mixed within 4KB pages), which was triggered with
		NetBSD/playstation2 kernels.
20050410	Adding a dummy dev_ps2_ether (just so that NetBSD doesn't
		complain as much during bootup).
		Symbols starting with '$' are now ignored.
		Renaming dev_ps2_ohci.c to dev_ohci.c, etc.
20050411	Moving the bintrans-cache-isolation check from cpu_mips.c to
		cpu_mips_coproc.c. (I thought this would give a speedup, but
		it's not noticable.)
		Better playstation2 sbus interrupt code.
		Skip ahead many ticks if the count register is read manually.
		(This increases the speed of delay-loops that simply read
		the count register.)
20050412	Updates to the playstation2 timer/interrupt code.
		Some other minor updates.
20050413	NetBSD/cobalt runs from a disk image :-) including userland;
		updating the documentation on how to install NetBSD/cobalt
		using NetBSD/pmax (!).
		Some minor bintrans updates (no real speed improvement) and
		other minor updates (playstation2 now uses the -o options).
20050414	Adding a dummy x86 (and AMD64) mode.
20050415	Adding some (32-bit and 16-bit) x86 instructions.
		Adding some initial support for non-SCSI, non-IDE floppy
		images. (The x86 mode can boot from these, more or less.)
		Moving the devices/ and include/ directories to src/devices/
		and src/include/, respectively.
20050416	Continuing on the x86 stuff. (Adding pc_bios.c and some simple
		support for software interrupts in 16-bit mode.)
20050417	Ripping out most of the x86 instruction decoding stuff, trying
		to rewrite it in a cleaner way.
		Disabling some of the least working CPU families in the
		configure script (sparc, x86, alpha, hppa), so that they are
		not enabled by default.
20050418	Trying to fix the bug which caused problems when turning on
		and off bintrans interactively, by flushing the bintrans cache
		whenever bintrans is manually (re)enabled.
20050419	Adding the 'lswi' ppc instruction.
		Minor updates to the x86 instruction decoding.
20050420	Renaming x86 register name indices from R_xx to X86_R_xx (this
		makes building on Tru64 nicer).
20050422	Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi.
20050427	Adding screenshots to guestoses.html.
		Some minor fixes and testing for the next release.

==============  RELEASE 0.3.2  ==============
1 #ifndef OPCODES_PPC_H
2 #define OPCODES_PPC_H
3
4 /*
5 * Copyright (C) 2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: opcodes_ppc.h,v 1.26 2005/04/18 23:00:57 debug Exp $
32 *
33 *
34 * PPC and POWER opcodes.
35 *
36 * Note: The define uses the PPC name, not the POWER name, when they differ.
37 */
38
39 #define PPC_HI6_MULLI 0x07
40 #define PPC_HI6_SUBFIC 0x08
41
42 #define PPC_HI6_CMPLI 0x0a
43 #define PPC_HI6_CMPI 0x0b
44 #define PPC_HI6_ADDIC 0x0c
45 #define PPC_HI6_ADDIC_DOT 0x0d
46 #define PPC_HI6_ADDI 0x0e
47 #define PPC_HI6_ADDIS 0x0f
48 #define PPC_HI6_BC 0x10
49 #define PPC_HI6_SC 0x11
50 #define PPC_HI6_B 0x12
51 #define PPC_HI6_19 0x13
52 #define PPC_19_MCRF 0
53 #define PPC_19_BCLR 16
54 #define PPC_19_CRNOR 33
55 #define PPC_19_CRANDC 129
56 #define PPC_19_ISYNC 150
57 #define PPC_19_CRXOR 193
58 #define PPC_19_CRNAND 225
59 #define PPC_19_CRAND 257
60 #define PPC_19_CREQV 289
61 #define PPC_19_CRORC 417
62 #define PPC_19_CROR 449
63 #define PPC_19_BCCTR 528
64 #define PPC_HI6_RLWIMI 0x14
65 #define PPC_HI6_RLWINM 0x15
66
67 #define PPC_HI6_ORI 0x18
68 #define PPC_HI6_ORIS 0x19
69 #define PPC_HI6_XORI 0x1a
70 #define PPC_HI6_XORIS 0x1b
71 #define PPC_HI6_ANDI_DOT 0x1c
72 #define PPC_HI6_ANDIS_DOT 0x1d
73 #define PPC_HI6_30 0x1e
74 #define PPC_30_RLDICL 0x0
75 #define PPC_30_RLDICR 0x1
76 #define PPC_HI6_31 0x1f
77 #define PPC_31_CMP 0
78 #define PPC_31_SUBFC 8
79 #define PPC_31_ADDC 10
80 #define PPC_31_MULHWU 11
81 #define PPC_31_MFCR 19
82 #define PPC_31_LWZX 23
83 #define PPC_31_SLW 24
84 #define PPC_31_CNTLZW 26
85 #define PPC_31_AND 28
86 #define PPC_31_CMPL 32
87 #define PPC_31_SUBF 40
88 #define PPC_31_DCBST 54
89 #define PPC_31_LWZUX 55
90 #define PPC_31_ANDC 60
91 #define PPC_31_MULHW 75
92 #define PPC_31_MFMSR 83
93 #define PPC_31_LBZX 87
94 #define PPC_31_NEG 104
95 #define PPC_31_LBZUX 119
96 #define PPC_31_NOR 124
97 #define PPC_31_SUBFE 136
98 #define PPC_31_ADDE 138
99 #define PPC_31_MTCRF 144
100 #define PPC_31_MTMSR 146
101 #define PPC_31_STWX 151
102 #define PPC_31_STWUX 183
103 #define PPC_31_SUBFZE 200
104 #define PPC_31_ADDZE 202
105 #define PPC_31_MTSR 210
106 #define PPC_31_STBX 215
107 #define PPC_31_MULLW 235
108 #define PPC_31_MTSRIN 242
109 #define PPC_31_STBUX 247
110 #define PPC_31_ADD 266
111 #define PPC_31_LHZX 279
112 #define PPC_31_TLBIE 306
113 #define PPC_31_LHZUX 311
114 #define PPC_31_XOR 316
115 #define PPC_31_MFSPR 339
116 #define PPC_31_MFTB 371
117 #define PPC_31_STHX 407
118 #define PPC_31_ORC 412
119 #define PPC_31_STHUX 439
120 #define PPC_31_OR 444
121 #define PPC_31_DCCCI 454
122 #define PPC_31_DIVWU 459
123 #define PPC_31_MTSPR 467
124 #define PPC_31_NAND 476
125 #define PPC_31_DIVW 491
126 #define PPC_31_SUBFCO 520
127 #define PPC_31_ADDCO 522
128 #define PPC_31_SRW 536
129 #define PPC_31_SUBFO 552
130 #define PPC_31_TLBSYNC 566
131 #define PPC_31_LSWI 597
132 #define PPC_31_SYNC 598
133 #define PPC_31_NEGO 616
134 #define PPC_31_SUBFEO 648
135 #define PPC_31_ADDEO 650
136 #define PPC_31_MFSRIN 659
137 #define PPC_31_SUBFZEO 712
138 #define PPC_31_ADDZEO 714
139 #define PPC_31_STSWI 725
140 #define PPC_31_MULLWO 747
141 #define PPC_31_ADDO 778
142 #define PPC_31_SRAW 792
143 #define PPC_31_SRAWI 824
144 #define PPC_31_EIEIO 854
145 #define PPC_31_EXTSH 922
146 #define PPC_31_EXTSB 954
147 #define PPC_31_ICCCI 966
148 #define PPC_31_DIVWUO 971
149 #define PPC_31_ICBI 982
150 #define PPC_31_EXTSW 986
151 #define PPC_31_DIVWO 1003
152 #define PPC_HI6_LWZ 0x20
153 #define PPC_HI6_LWZU 0x21
154 #define PPC_HI6_LBZ 0x22
155 #define PPC_HI6_LBZU 0x23
156 #define PPC_HI6_STW 0x24
157 #define PPC_HI6_STWU 0x25
158 #define PPC_HI6_STB 0x26
159 #define PPC_HI6_STBU 0x27
160 #define PPC_HI6_LHZ 0x28
161 #define PPC_HI6_LHZU 0x29
162 #define PPC_HI6_LHA 0x2a
163 #define PPC_HI6_LHAU 0x2b
164 #define PPC_HI6_STH 0x2c
165 #define PPC_HI6_STHU 0x2d
166 #define PPC_HI6_LMW 0x2e
167 #define PPC_HI6_STMW 0x2f
168
169 #define PPC_HI6_LFD 0x32
170
171 #define PPC_HI6_STFD 0x36
172
173 #endif /* OPCODES_PPC_H */
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