/[gxemul]/trunk/src/include/opcodes_ppc.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/include/opcodes_ppc.h

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Revision 14 - (show annotations)
Mon Oct 8 16:18:51 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 6317 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.982 2005/10/07 22:45:32 debug Exp $
20050816	Some success in decoding the way the SGI O2 PROM draws graphics
		during bootup; lines/rectangles and bitmaps work, enough to
		show the bootlogo etc. :-)
		Adding more PPC instructions, and (dummy) BAT registers.
20050817	Updating the pckbc to support scancode type 3 keyboards
		(required in order to interact with the SGI O2 PROM).
		Adding more PPC instructions.
20050818	Adding more ARM instructions; general register forms.
		Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy)
		CATS machine mode (using SA110 as the default CPU).
		Continuing on general dyntrans related stuff.
20050819	Register forms for ARM load/stores. Gaah! The Compaq C Compiler
		bug is triggered for ARM loads as well, not just PPC :-(
		Adding full support for ARM PC-relative load/stores, and load/
		stores where the PC register is the destination register.
		Adding support for ARM a.out binaries.
20050820	Continuing to add more ARM instructions, and correcting some
		bugs. Continuing on CATS emulation.
		More work on the PPC stuff.
20050821	Minor PPC and ARM updates. Adding more machine types.
20050822	All ARM "data processing instructions" are now generated
		automatically.
20050824	Beginning the work on the ARM system control coprocessor.
		Adding support for ARM halfword load/stores, and signed loads.
20050825	Fixing an important bug related to the ARM condition codes.
		OpenBSD/zaurus and NetBSD/netwinder now print some boot
		messages. :)
		Adding a dummy SH (Hitachi SuperH) cpu family.
		Beginning to add some ARM virtual address translation.
		MIPS bugfixes: unaligned PC now cause an ADEL exception (at
		least for non-bintrans execution), and ADEL/ADES (not
		TLBL/TLBS) are used if userland tries to access kernel space.
		(Thanks to Joshua Wise for making me aware of these bugs.)
20050827	More work on the ARM emulation, and various other updates.
20050828	More ARM updates.
		Finally taking the time to work on translation invalidation
		(i.e. invalidating translated code mappings when memory is
		written to). Hopefully this doesn't break anything.
20050829	Moving CPU related files from src/ to a new subdir, src/cpus/.
		Moving PROM emulation stuff from src/ to src/promemul/.
		Better debug instruction trace for ARM loads and stores.
20050830	Various ARM updates (correcting CMP flag calculation, etc).
20050831	PPC instruction updates. (Flag fixes, etc.)
20050901	Various minor PPC and ARM instruction emulation updates.
		Minor OpenFirmware emulation updates.
20050903	Adding support for adding arbitrary ARM coprocessors (with
		the i80321 I/O coprocessor as a first test).
		Various other ARM and PPC updates.
20050904	Adding some SHcompact disassembly routines.
20050907	(Re)adding a dummy HPPA CPU module, and a dummy i960 module.
20050908	Began hacking on some Apple Partition Table support.
20050909	Adding support for loading Mach-O (Darwin PPC) binaries.
20050910	Fixing an ARM bug (Carry flag was incorrectly updated for some
		data processing instructions); OpenBSD/cats and NetBSD/
		netwinder get quite a bit further now.
		Applying a patch to dev_wdc, and a one-liner to dev_pcic, to
		make them work better when emulating new versions of OpenBSD.
		(Thanks to Alexander Yurchenko for the patches.)
		Also doing some other minor updates to dev_wdc. (Some cleanup,
		and finally converting to devinit, etc.)
20050912	IRIX doesn't have u_int64_t by default (noticed by Andreas
		<avr@gnulinux.nl>); configure updated to reflect this.
		Working on ARM register bank switching, CPSR vs SPSR issues,
		and beginning the work on interrupt/exception support.
20050913	Various minor ARM updates (speeding up load/store multiple,
		and fixing a ROR bug in R(); NetBSD/cats now boots as far as
		OpenBSD/cats).
20050917	Adding a dummy Atmel AVR (8-bit) cpu family skeleton.
20050918	Various minor updates.
20050919	Symbols are now loaded from Mach-O executables.
		Continuing the work on adding ARM exception support.
20050920	More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach
		userland! :-)
20050921	Some more progress on ARM interrupt specifics.
20050923	Fixing linesize for VR4121 (patch by Yurchenko). Also fixing
		linesizes/cachesizes for some other VR4xxx.
		Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a
		dummy Symphony Labs 83C553 bridge (for Netwinder), usable by 
		dev_footbridge.
20050924	Some PPC progress.
20050925	More PPC progress.
20050926	PPC progress (fixing some bugs etc); Darwin's kernel gets
		slightly further than before.
20050928	Various updates: footbridge/ISA/pciide stuff, and finally
		fixing the VGA text scroll-by-changing-the-base-offset bug.
20050930	Adding a dummy S3 ViRGE pci card for CATS emulation, which
		both NetBSD and OpenBSD detects as VGA.
		Continuing on Footbridge (timers, ISA interrupt stuff).
20051001	Continuing... there are still bugs, probably interrupt-
		related.
20051002	More work on the Footbridge (interrupt stuff).
20051003	Various minor updates. (Trying to find the bug(s).)
20051004	Continuing on the ARM stuff.
20051005	More ARM-related fixes.
20051007	FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the
		other was because of an error in the ARM manual (load multiple
		with the S-bit set should _NOT_ load usermode registers, as the
		manual says, but it should load saved registers, which may or
		may not happen to be usermode registers).
		NetBSD/cats and OpenBSD/cats seem to install fine now :-)
		except for a minor bug at the end of the OpenBSD/cats install.
		Updating the documentation, preparing for the next release.
20051008	Continuing with release testing and cleanup.
1 #ifndef OPCODES_PPC_H
2 #define OPCODES_PPC_H
3
4 /*
5 * Copyright (C) 2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: opcodes_ppc.h,v 1.32 2005/09/24 23:44:19 debug Exp $
32 *
33 *
34 * PPC and POWER opcodes. These are gathered from various sources.
35 * Note: The define uses the PPC name, not the POWER name, when they differ.
36 */
37
38 #define PPC_HI6_MULLI 0x07
39 #define PPC_HI6_SUBFIC 0x08
40
41 #define PPC_HI6_CMPLI 0x0a
42 #define PPC_HI6_CMPI 0x0b
43 #define PPC_HI6_ADDIC 0x0c
44 #define PPC_HI6_ADDIC_DOT 0x0d
45 #define PPC_HI6_ADDI 0x0e
46 #define PPC_HI6_ADDIS 0x0f
47 #define PPC_HI6_BC 0x10
48 #define PPC_HI6_SC 0x11
49 #define PPC_HI6_B 0x12
50 #define PPC_HI6_19 0x13
51 #define PPC_19_MCRF 0
52 #define PPC_19_BCLR 16
53 #define PPC_19_RFID 18
54 #define PPC_19_CRNOR 33
55 #define PPC_19_RFI 50
56 #define PPC_19_RFSVC 82
57 #define PPC_19_CRANDC 129
58 #define PPC_19_ISYNC 150
59 #define PPC_19_CRXOR 193
60 #define PPC_19_CRNAND 225
61 #define PPC_19_CRAND 257
62 #define PPC_19_CREQV 289
63 #define PPC_19_CRORC 417
64 #define PPC_19_CROR 449
65 #define PPC_19_BCCTR 528
66 #define PPC_HI6_RLWIMI 0x14
67 #define PPC_HI6_RLWINM 0x15
68
69 #define PPC_HI6_ORI 0x18
70 #define PPC_HI6_ORIS 0x19
71 #define PPC_HI6_XORI 0x1a
72 #define PPC_HI6_XORIS 0x1b
73 #define PPC_HI6_ANDI_DOT 0x1c
74 #define PPC_HI6_ANDIS_DOT 0x1d
75 #define PPC_HI6_30 0x1e
76 #define PPC_30_RLDICL 0x0
77 #define PPC_30_RLDICR 0x1
78 #define PPC_HI6_31 0x1f
79 #define PPC_31_CMP 0
80 #define PPC_31_TW 4
81 #define PPC_31_SUBFC 8
82 #define PPC_31_ADDC 10
83 #define PPC_31_MULHWU 11
84 #define PPC_31_MFCR 19
85 #define PPC_31_LWARX 20
86 #define PPC_31_LWZX 23
87 #define PPC_31_SLW 24
88 #define PPC_31_CNTLZW 26
89 #define PPC_31_AND 28
90 #define PPC_31_CMPL 32
91 #define PPC_31_SUBF 40
92 #define PPC_31_DCBST 54
93 #define PPC_31_LWZUX 55
94 #define PPC_31_ANDC 60
95 #define PPC_31_TD 68
96 #define PPC_31_MULHW 75
97 #define PPC_31_MFMSR 83
98 #define PPC_31_LDARX 84
99 #define PPC_31_DCBF 86
100 #define PPC_31_LBZX 87
101 #define PPC_31_NEG 104
102 #define PPC_31_CLF 118
103 #define PPC_31_LBZUX 119
104 #define PPC_31_NOR 124
105 #define PPC_31_SUBFE 136
106 #define PPC_31_ADDE 138
107 #define PPC_31_MTCRF 144
108 #define PPC_31_MTMSR 146
109 #define PPC_31_STDX 149
110 #define PPC_31_STWCX_DOT 150
111 #define PPC_31_STWX 151
112 #define PPC_31_STDUX 181
113 #define PPC_31_STWUX 183
114 #define PPC_31_SUBFZE 200
115 #define PPC_31_ADDZE 202
116 #define PPC_31_MTSR 210
117 #define PPC_31_STDCX_DOT 214
118 #define PPC_31_STBX 215
119 #define PPC_31_ADDME 234
120 #define PPC_31_MULLW 235
121 #define PPC_31_MTSRIN 242
122 #define PPC_31_DCBTST 246
123 #define PPC_31_STBUX 247
124 #define PPC_31_ADD 266
125 #define PPC_31_DCBT 278
126 #define PPC_31_LHZX 279
127 #define PPC_31_TLBIE 306
128 #define PPC_31_LHZUX 311
129 #define PPC_31_XOR 316
130 #define PPC_31_MFSPR 339
131 #define PPC_31_MFTB 371
132 #define PPC_31_STHX 407
133 #define PPC_31_ORC 412
134 #define PPC_31_STHUX 439
135 #define PPC_31_OR 444
136 #define PPC_31_DCCCI 454
137 #define PPC_31_DIVWU 459
138 #define PPC_31_MTSPR 467
139 #define PPC_31_DCBI 470
140 #define PPC_31_NAND 476
141 #define PPC_31_DIVW 491
142 #define PPC_31_CLI 502
143 #define PPC_31_SUBFCO 520
144 #define PPC_31_ADDCO 522
145 #define PPC_31_LWBRX 534
146 #define PPC_31_SRW 536
147 #define PPC_31_SUBFO 552
148 #define PPC_31_TLBSYNC 566
149 #define PPC_31_LSWI 597
150 #define PPC_31_SYNC 598
151 #define PPC_31_NEGO 616
152 #define PPC_31_DCLST 630
153 #define PPC_31_SUBFEO 648
154 #define PPC_31_ADDEO 650
155 #define PPC_31_MFSRIN 659
156 #define PPC_31_STWBRX 662
157 #define PPC_31_SUBFZEO 712
158 #define PPC_31_ADDZEO 714
159 #define PPC_31_STSWI 725
160 #define PPC_31_ADDMEO 746
161 #define PPC_31_MULLWO 747
162 #define PPC_31_ADDO 778
163 #define PPC_31_LHBRX 790
164 #define PPC_31_SRAW 792
165 #define PPC_31_SRAWI 824
166 #define PPC_31_EIEIO 854
167 #define PPC_31_STHBRX 918
168 #define PPC_31_EXTSH 922
169 #define PPC_31_EXTSB 954
170 #define PPC_31_ICCCI 966
171 #define PPC_31_DIVWUO 971
172 #define PPC_31_ICBI 982
173 #define PPC_31_EXTSW 986
174 #define PPC_31_DIVWO 1003
175 #define PPC_31_DCBZ 1014
176 #define PPC_HI6_LWZ 0x20
177 #define PPC_HI6_LWZU 0x21
178 #define PPC_HI6_LBZ 0x22
179 #define PPC_HI6_LBZU 0x23
180 #define PPC_HI6_STW 0x24
181 #define PPC_HI6_STWU 0x25
182 #define PPC_HI6_STB 0x26
183 #define PPC_HI6_STBU 0x27
184 #define PPC_HI6_LHZ 0x28
185 #define PPC_HI6_LHZU 0x29
186 #define PPC_HI6_LHA 0x2a
187 #define PPC_HI6_LHAU 0x2b
188 #define PPC_HI6_STH 0x2c
189 #define PPC_HI6_STHU 0x2d
190 #define PPC_HI6_LMW 0x2e
191 #define PPC_HI6_STMW 0x2f
192
193 #define PPC_HI6_LFD 0x32
194
195 #define PPC_HI6_STFD 0x36
196
197 #define PPC_HI6_63 0x3f
198 #define PPC_63_FMR 72
199
200 #endif /* OPCODES_PPC_H */
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