/[gxemul]/trunk/src/include/opcodes_ppc.h
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Contents of /trunk/src/include/opcodes_ppc.h

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Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 7594 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 #ifndef OPCODES_PPC_H
2 #define OPCODES_PPC_H
3
4 /*
5 * Copyright (C) 2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: opcodes_ppc.h,v 1.45 2005/12/04 02:40:04 debug Exp $
32 *
33 *
34 * PPC and POWER opcodes. These are gathered from various sources.
35 * Note: The define uses the PPC name, not the POWER name, when they differ.
36 */
37
38 #define PPC_HI6_MULLI 0x07
39 #define PPC_HI6_SUBFIC 0x08
40
41 #define PPC_HI6_CMPLI 0x0a
42 #define PPC_HI6_CMPI 0x0b
43 #define PPC_HI6_ADDIC 0x0c
44 #define PPC_HI6_ADDIC_DOT 0x0d
45 #define PPC_HI6_ADDI 0x0e
46 #define PPC_HI6_ADDIS 0x0f
47 #define PPC_HI6_BC 0x10
48 #define PPC_HI6_SC 0x11
49 #define PPC_HI6_B 0x12
50 #define PPC_HI6_19 0x13
51 #define PPC_19_MCRF 0
52 #define PPC_19_BCLR 16
53 #define PPC_19_RFID 18
54 #define PPC_19_CRNOR 33
55 #define PPC_19_RFI 50
56 #define PPC_19_RFSVC 82
57 #define PPC_19_CRANDC 129
58 #define PPC_19_ISYNC 150
59 #define PPC_19_CRXOR 193
60 #define PPC_19_CRNAND 225
61 #define PPC_19_CRAND 257
62 #define PPC_19_CREQV 289
63 #define PPC_19_CRORC 417
64 #define PPC_19_CROR 449
65 #define PPC_19_BCCTR 528
66 #define PPC_HI6_RLWIMI 0x14
67 #define PPC_HI6_RLWINM 0x15
68
69 #define PPC_HI6_RLWNM 0x17
70 #define PPC_HI6_ORI 0x18
71 #define PPC_HI6_ORIS 0x19
72 #define PPC_HI6_XORI 0x1a
73 #define PPC_HI6_XORIS 0x1b
74 #define PPC_HI6_ANDI_DOT 0x1c
75 #define PPC_HI6_ANDIS_DOT 0x1d
76 #define PPC_HI6_30 0x1e
77 #define PPC_30_RLDICL 0x0
78 #define PPC_30_RLDICR 0x1
79 #define PPC_HI6_31 0x1f
80 #define PPC_31_CMP 0
81 #define PPC_31_TW 4
82 #define PPC_31_SUBFC 8
83 #define PPC_31_ADDC 10
84 #define PPC_31_MULHWU 11
85 #define PPC_31_MFCR 19
86 #define PPC_31_LWARX 20
87 #define PPC_31_LWZX 23
88 #define PPC_31_SLW 24
89 #define PPC_31_CNTLZW 26
90 #define PPC_31_AND 28
91 #define PPC_31_CMPL 32
92 #define PPC_31_SUBF 40
93 #define PPC_31_DCBST 54
94 #define PPC_31_LWZUX 55
95 #define PPC_31_ANDC 60
96 #define PPC_31_TD 68
97 #define PPC_31_MULHW 75
98 #define PPC_31_MFMSR 83
99 #define PPC_31_LDARX 84
100 #define PPC_31_DCBF 86
101 #define PPC_31_LBZX 87
102 #define PPC_31_LVX 103
103 #define PPC_31_NEG 104
104 #define PPC_31_CLF 118
105 #define PPC_31_LBZUX 119
106 #define PPC_31_NOR 124
107 #define PPC_31_SUBFE 136
108 #define PPC_31_ADDE 138
109 #define PPC_31_MTCRF 144
110 #define PPC_31_MTMSR 146
111 #define PPC_31_STDX 149
112 #define PPC_31_STWCX_DOT 150
113 #define PPC_31_STWX 151
114 #define PPC_31_WRTEEI 163
115 #define PPC_31_STDUX 181
116 #define PPC_31_STWUX 183
117 #define PPC_31_SUBFZE 200
118 #define PPC_31_ADDZE 202
119 #define PPC_31_MTSR 210
120 #define PPC_31_STDCX_DOT 214
121 #define PPC_31_STBX 215
122 #define PPC_31_STVX 231
123 #define PPC_31_SUBFME 232
124 #define PPC_31_ADDME 234
125 #define PPC_31_MULLW 235
126 #define PPC_31_MTSRIN 242
127 #define PPC_31_DCBTST 246
128 #define PPC_31_STBUX 247
129 #define PPC_31_ADD 266
130 #define PPC_31_DCBT 278
131 #define PPC_31_LHZX 279
132 #define PPC_31_TLBIE 306
133 #define PPC_31_LHZUX 311
134 #define PPC_31_XOR 316
135 #define PPC_31_MFSPR 339
136 #define PPC_31_LHAX 343
137 #define PPC_31_TLBIA 370
138 #define PPC_31_MFTB 371
139 #define PPC_31_LHAUX 375
140 #define PPC_31_STHX 407
141 #define PPC_31_ORC 412
142 #define PPC_31_SLBIE 434
143 #define PPC_31_STHUX 439
144 #define PPC_31_OR 444
145 #define PPC_31_DCCCI 454
146 #define PPC_31_DIVWU 459
147 #define PPC_31_MTSPR 467
148 #define PPC_31_DCBI 470
149 #define PPC_31_NAND 476
150 #define PPC_31_STVXL 487
151 #define PPC_31_DIVW 491
152 #define PPC_31_SLBIA 498
153 #define PPC_31_CLI 502
154 #define PPC_31_SUBFCO 520
155 #define PPC_31_ADDCO 522
156 #define PPC_31_LWBRX 534
157 #define PPC_31_LFSX 535
158 #define PPC_31_SRW 536
159 #define PPC_31_SUBFO 552
160 #define PPC_31_TLBSYNC 566
161 #define PPC_31_MFSR 595
162 #define PPC_31_LSWI 597
163 #define PPC_31_SYNC 598
164 #define PPC_31_LFDX 599
165 #define PPC_31_NEGO 616
166 #define PPC_31_DCLST 630
167 #define PPC_31_SUBFEO 648
168 #define PPC_31_ADDEO 650
169 #define PPC_31_MFSRIN 659
170 #define PPC_31_STWBRX 662
171 #define PPC_31_STFSX 663
172 #define PPC_31_SUBFZEO 712
173 #define PPC_31_ADDZEO 714
174 #define PPC_31_STSWI 725
175 #define PPC_31_STFDX 727
176 #define PPC_31_SUBFMEO 744
177 #define PPC_31_ADDMEO 746
178 #define PPC_31_MULLWO 747
179 #define PPC_31_ADDO 778
180 #define PPC_31_LHBRX 790
181 #define PPC_31_SRAW 792
182 #define PPC_31_SRAWI 824
183 #define PPC_31_EIEIO 854
184 #define PPC_31_TLBSX_DOT 914
185 #define PPC_31_STHBRX 918
186 #define PPC_31_EXTSH 922
187 #define PPC_31_EXTSB 954
188 #define PPC_31_ICCCI 966
189 #define PPC_31_DIVWUO 971
190 #define PPC_31_TLBLD 978
191 #define PPC_31_ICBI 982
192 #define PPC_31_EXTSW 986
193 #define PPC_31_DIVWO 1003
194 #define PPC_31_TLBLI 1010
195 #define PPC_31_DCBZ 1014
196 #define PPC_HI6_LWZ 0x20
197 #define PPC_HI6_LWZU 0x21
198 #define PPC_HI6_LBZ 0x22
199 #define PPC_HI6_LBZU 0x23
200 #define PPC_HI6_STW 0x24
201 #define PPC_HI6_STWU 0x25
202 #define PPC_HI6_STB 0x26
203 #define PPC_HI6_STBU 0x27
204 #define PPC_HI6_LHZ 0x28
205 #define PPC_HI6_LHZU 0x29
206 #define PPC_HI6_LHA 0x2a
207 #define PPC_HI6_LHAU 0x2b
208 #define PPC_HI6_STH 0x2c
209 #define PPC_HI6_STHU 0x2d
210 #define PPC_HI6_LMW 0x2e
211 #define PPC_HI6_STMW 0x2f
212 #define PPC_HI6_LFS 0x30
213
214 #define PPC_HI6_LFD 0x32
215
216 #define PPC_HI6_STFS 0x34
217
218 #define PPC_HI6_STFD 0x36
219
220 #define PPC_HI6_LD 0x3a
221 #define PPC_HI6_59 0x3b
222 #define PPC_59_FDIVS 18
223 #define PPC_59_FSUBS 20
224 #define PPC_59_FADDS 21
225 #define PPC_59_FMULS 25
226 #define PPC_59_FMADDS 29
227
228 #define PPC_HI6_STD 0x3e
229 #define PPC_HI6_63 0x3f
230 #define PPC_63_FCMPU 0
231 #define PPC_63_FRSP 12
232 #define PPC_63_FCTIWZ 15
233 #define PPC_63_FDIV 18
234 #define PPC_63_FSUB 20
235 #define PPC_63_FADD 21
236 #define PPC_63_FMUL 25
237 #define PPC_63_FMSUB 28
238 #define PPC_63_FMADD 29
239 #define PPC_63_FNEG 40
240 #define PPC_63_FMR 72
241 #define PPC_63_FNABS 136
242 #define PPC_63_FABS 264
243 #define PPC_63_MFFS 583
244 #define PPC_63_MTFSF 711
245
246 #endif /* OPCODES_PPC_H */

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