/[gxemul]/trunk/src/include/mvme88k_vme.h
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Contents of /trunk/src/include/mvme88k_vme.h

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 11644 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============
1 /* GXemul: $Id: mvme88k_vme.h,v 1.1 2007/05/15 12:35:14 debug Exp $ */
2 /* $OpenBSD: vme.h,v 1.17 2005/11/25 22:14:32 miod Exp $ */
3
4 /*
5 * Copyright (c) 1995 Theo de Raadt
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __MVEME88K_DEV_VME_H__
30 #define __MVEME88K_DEV_VME_H__
31
32 #if 0
33 struct vmesoftc {
34 struct device sc_dev;
35 bus_space_tag_t sc_iot;
36 bus_space_handle_t sc_ioh;
37 struct intrhand sc_abih; /* `abort' switch */
38 };
39 #endif
40
41 /*
42 * XXX: this chip has some rather insane access rules!
43 */
44
45 #define VME2_BASE 0xfff40000
46
47 #define VME2_SADDR1 0x0000
48 #define VME2_SADDR2 0x0004
49 #define VME2_SLAVELMOD1 0x0008
50 #define VME2_SLAVELMOD2 0x000c
51 #define VME2_SLAVECTL 0x0010
52 #define VME2_MASTER1 0x0014
53 #define VME2_MASTER2 0x0018
54 #define VME2_MASTER3 0x001c
55 #define VME2_MASTER4 0x0020
56 #define VME2_MASTER4MOD 0x0024
57 #define VME2_MASTERCTL 0x0028
58 #define VME2_GCSRCTL 0x002c
59 #define VME2_DMACTL 0x0030
60 #define VME2_DMAMODE 0x0034
61 #define VME2_DMALADDR 0x0038
62 #define VME2_DMAVMEADDR 0x003c
63 #define VME2_DMACOUNT 0x0040
64 #define VME2_DMATABLE 0x0044
65 #define VME2_DMASTAT 0x0048
66 #define VME2_TCR 0x004c
67 #define VME2_T1CMP 0x0050
68 #define VME2_T1COUNT 0x0054
69 #define VME2_T2CMP 0x0058
70 #define VME2_T2COUNT 0x005c
71 #define VME2_TCTL 0x0060
72 #define VME2_PRESCALE 0x0064
73 #define VME2_IRQSTAT 0x0068
74 #define VME2_IRQEN 0x006c
75 #define VME2_SETSOFTIRQ 0x0070
76 #define VME2_IRQCLR 0x0074
77 #define VME2_IRQL1 0x0078
78 #define VME2_IRQL2 0x007c
79 #define VME2_IRQL3 0x0080
80 #define VME2_IRQL4 0x0084
81 #define VME2_VBR 0x0088
82 #define VME2_MISC 0x008c
83
84 #define VME2_SADDR_END 0xffff0000 /* VME address END & START */
85 #define VME2_SADDR_START 0x0000ffff
86 #define VME2_SADDR_LADDR 0xffff0000 /* local base address */
87 #define VME2_SADDR_SIZE(mem) (0x1000 - (mem) >> 16) /* encoding of size */
88
89 #define VME2_SLAVE_CHOOSE(bits, num) ((bits) << (16*((num)-1)))
90 #define VME2_SLAVECTL_WP 0x00000100 /* write posting */
91 #define VME2_SLAVECTL_SNP_NO 0x00000000 /* no snooping */
92 #define VME2_SLAVECTL_SNP_SINK 0x00000200 /* sink data */
93 #define VME2_SLAVECTL_SNP_INVAL 0x00000400 /* invalidate */
94 #define VME2_SLAVECTL_ADDER 0x00000800 /* use adder */
95 #define VME2_SLAVECTL_SUP 0x00000080 /* modifier bit */
96 #define VME2_SLAVECTL_USR 0x00000040 /* modifier bit */
97 #define VME2_SLAVECTL_A32 0x00000020 /* modifier bit */
98 #define VME2_SLAVECTL_A24 0x00000010 /* modifier bit */
99 #define VME2_SLAVECTL_D64 0x00000008 /* modifier bit */
100 #define VME2_SLAVECTL_BLK 0x00000004 /* modifier bit */
101 #define VME2_SLAVECTL_PGM 0x00000002 /* modifier bit */
102 #define VME2_SLAVECTL_DAT 0x00000001 /* modifier bit */
103
104 #define VME2_MASTERCTL_4SHIFT 24
105 #define VME2_MASTERCTL_3SHIFT 16
106 #define VME2_MASTERCTL_2SHIFT 8
107 #define VME2_MASTERCTL_1SHIFT 0
108 #define VME2_MASTERCTL_D16 0x80
109 #define VME2_MASTERCTL_WP 0x40
110 #define VME2_MASTERCTL_AM 0x3f
111 #define VME2_MASTERCTL_AM24SB 0x3f /* A24 Supervisory Block Transfer */
112 #define VME2_MASTERCTL_AM24SP 0x3e /* A24 Supervisory Program Access */
113 #define VME2_MASTERCTL_AM24SD 0x3d /* A24 Supervisory Data Access */
114 #define VME2_MASTERCTL_AM24UB 0x3b /* A24 Non-priv. Block Transfer */
115 #define VME2_MASTERCTL_AM24UP 0x3a /* A24 Non-priv. Program Access */
116 #define VME2_MASTERCTL_AM24UD 0x39 /* A24 Non-priv. Data Access */
117 #define VME2_MASTERCTL_AM16S 0x2d /* A16 Supervisory Access */
118 #define VME2_MASTERCTL_AM16U 0x29 /* A16 Non-priv. Access */
119 #define VME2_MASTERCTL_AM32SB 0x0f /* A32 Supervisory Block Transfer */
120 #define VME2_MASTERCTL_AM32SP 0x0e /* A32 Supervisory Program Access */
121 #define VME2_MASTERCTL_AM32SD 0x0d /* A32 Supervisory Data Access */
122 #define VME2_MASTERCTL_AM32UB 0x0b /* A32 Non-priv. Block Transfer */
123 #define VME2_MASTERCTL_AM32UP 0x0a /* A32 Non-priv. Program Access */
124 #define VME2_MASTERCTL_AM32UD 0x09 /* A32 Non-priv Data Access */
125
126 #define VME2_MASTERCTL_ALL 0xff
127
128 #define VME2_GCSRCTL_OFF 0xf0000000
129 #define VME2_GCSRCTL_MDEN4 0x00080000
130 #define VME2_GCSRCTL_MDEN3 0x00040000
131 #define VME2_GCSRCTL_MDEN2 0x00020000
132 #define VME2_GCSRCTL_MDEN1 0x00010000
133 #define VME2_GCSRCTL_I2EN 0x00008000 /* F decode (A24D16/A32D16) on */
134 #define VME2_GCSRCTL_I2WP 0x00004000 /* F decode write post */
135 #define VME2_GCSRCTL_I2SU 0x00002000 /* F decode is supervisor */
136 #define VME2_GCSRCTL_I2PD 0x00001000 /* F decode is program */
137 #define VME2_GCSRCTL_I1EN 0x00000800 /* short decode (A16Dx) on */
138 #define VME2_GCSRCTL_I1D16 0x00000400 /* short decode is D16 */
139 #define VME2_GCSRCTL_I1WP 0x00000200 /* short decode write post */
140 #define VME2_GCSRCTL_I1SU 0x00000100 /* short decode is supervisor */
141 #define VME2_GCSRCTL_ROMSIZE 0x000000c0 /* size of ROM */
142 #define VME2_GCSRCTL_ROMBSPD 0x00000038 /* speed of ROM */
143 #define VME2_GCSRCTL_ROMASPD 0x00000007 /* speed of ROM */
144
145 #define VME2_TCR_1MS (1 << 8) /* Watchdog 1 ms */
146 #define VME2_TCR_2MS (2 << 8) /* Watchdog 2 ms */
147 #define VME2_TCR_4MS (3 << 8) /* Watchdog 4 ms */
148 #define VME2_TCR_8MS (4 << 8) /* Watchdog 8 ms */
149 #define VME2_TCR_16MS (5 << 8) /* Watchdog 16 ms */
150 #define VME2_TCR_32MS (6 << 8) /* Watchdog 32 ms */
151 #define VME2_TCR_64MS (7 << 8) /* Watchdog 64 ms */
152 #define VME2_TCR_128MS (8 << 8) /* Watchdog 128 ms */
153 #define VME2_TCR_256MS (9 << 8) /* Watchdog 256 ms */
154 #define VME2_TCR_512MS (10 << 8) /* Watchdog 512 ms */
155 #define VME2_TCR_1S (11 << 8) /* Watchdog 1 s */
156 #define VME2_TCR_4S (12 << 8) /* Watchdog 4 s */
157 #define VME2_TCR_16S (13 << 8) /* Watchdog 16 s */
158 #define VME2_TCR_32S (14 << 8) /* Watchdog 32 s */
159 #define VME2_TCR_64S (15 << 8) /* Watchdog 64 s */
160
161 #define VME2_TCTL1_CEN 0x01
162 #define VME2_TCTL1_COC 0x02
163 #define VME2_TCTL1_COVF 0x04
164 #define VME2_TCTL1_OVF 0xf0
165 #define VME2_TCTL2_CEN (0x01 << 8)
166 #define VME2_TCTL2_COC (0x02 << 8)
167 #define VME2_TCTL2_COVF (0x04 << 8)
168 #define VME2_TCTL2_OVF (0xf0 << 8)
169 #define VME2_TCTL_WDEN 0x00010000 /* Watchdog Enable */
170 #define VME2_TCTL_WDRSE 0x00020000 /* Watchdog Reset Enable */
171 #define VME2_TCTL_WDSL 0x00040000 /* local or system reset */
172 #define VME2_TCTL_WDBFE 0x00080000 /* Watchdog Board Fail Enable */
173 #define VME2_TCTL_WDTO 0x00100000 /* Watchdog Timeout Status */
174 #define VME2_TCTL_WDCC 0x00200000 /* Watchdog Clear Counter */
175 #define VME2_TCTL_WDCS 0x00400000 /* Watchdog Clear Timeout */
176 #define VME2_TCTL_SRST 0x00800000 /* system reset */
177 #define VME2_TCTL_RSWE 0x01000000 /* Reset Switch Enable */
178 #define VME2_TCTL_BDFLO 0x02000000 /* Assert Board Fail */
179 #define VME2_TCTL_CPURS 0x04000000 /* Clear Power-up Reset bit */
180 #define VME2_TCTL_PURS 0x08000000 /* Power-up Reset bit */
181 #define VME2_TCTL_BDFLI 0x10000000 /* Board Fail Status*/
182 #define VME2_TCTL_SYSFAIL 0x20000000 /* light SYSFAIL led */
183 #define VME2_TCTL_SCON 0x40000000 /* we are SCON */
184
185 #define VME2_IRQ_ACF 0x80000000
186 #define VME2_IRQ_AB 0x40000000
187 #define VME2_IRQ_SYSF 0x20000000
188 #define VME2_IRQ_MWP 0x10000000
189 #define VME2_IRQ_PE 0x08000000
190 #define VME2_IRQ_V1IE 0x04000000
191 #define VME2_IRQ_TIC2 0x02000000
192 #define VME2_IRQ_TIC1 0x01000000
193 #define VME2_IRQ_VIA 0x00800000
194 #define VME2_IRQ_DMA 0x00400000
195 #define VME2_IRQ_SIG3 0x00200000
196 #define VME2_IRQ_SIG2 0x00100000
197 #define VME2_IRQ_SIG1 0x00080000
198 #define VME2_IRQ_SIG0 0x00040000
199 #define VME2_IRQ_LM1 0x00020000
200 #define VME2_IRQ_LM0 0x00010000
201 #define VME2_IRQ_SW7 0x00008000
202 #define VME2_IRQ_SW6 0x00004000
203 #define VME2_IRQ_SW5 0x00002000
204 #define VME2_IRQ_SW4 0x00001000
205 #define VME2_IRQ_SW3 0x00000800
206 #define VME2_IRQ_SW2 0x00000400
207 #define VME2_IRQ_SW1 0x00000200
208 #define VME2_IRQ_SW0 0x00000100
209 #define VME2_IRQ_SW(x) ((1 << (x))) << 8)
210 #define VME2_IRQ_SPARE 0x00000080
211 #define VME2_IRQ_VME7 0x00000040
212 #define VME2_IRQ_VME6 0x00000020
213 #define VME2_IRQ_VME5 0x00000010
214 #define VME2_IRQ_VME4 0x00000008
215 #define VME2_IRQ_VME3 0x00000004
216 #define VME2_IRQ_VME2 0x00000002
217 #define VME2_IRQ_VME1 0x00000001
218 #define VME2_IRQ_VME(x) (1 << ((x) - 1))
219
220 #define VME2_IRQL1_ACFSHIFT 28
221 #define VME2_IRQL1_ABSHIFT 24
222 #define VME2_IRQL1_SYSFSHIFT 20
223 #define VME2_IRQL1_WPESHIFT 16
224 #define VME2_IRQL1_PESHIFT 12
225 #define VME2_IRQL1_V1IESHIFT 8
226 #define VME2_IRQL1_TIC2SHIFT 4
227 #define VME2_IRQL1_TIC1SHIFT 0
228
229 #define VME2_IRQL2_VIASHIFT 28
230 #define VME2_IRQL2_DMASHIFT 24
231 #define VME2_IRQL2_SIG3SHIFT 20
232 #define VME2_IRQL2_SIG2SHIFT 16
233 #define VME2_IRQL2_SIG1SHIFT 12
234 #define VME2_IRQL2_SIG0SHIFT 8
235 #define VME2_IRQL2_LM1SHIFT 4
236 #define VME2_IRQL2_LM0SHIFT 0
237
238 #define VME2_IRQL3_SW7SHIFT 28
239 #define VME2_IRQL3_SW6SHIFT 24
240 #define VME2_IRQL3_SW5SHIFT 20
241 #define VME2_IRQL3_SW4SHIFT 16
242 #define VME2_IRQL3_SW3SHIFT 12
243 #define VME2_IRQL3_SW2SHIFT 8
244 #define VME2_IRQL3_SW1SHIFT 4
245 #define VME2_IRQL3_SW0SHIFT 0
246
247 #define VME2_IRQL4_SPARESHIFT 28
248 #define VME2_IRQL4_VME7SHIFT 24
249 #define VME2_IRQL4_VME6SHIFT 20
250 #define VME2_IRQL4_VME5SHIFT 16
251 #define VME2_IRQL4_VME4SHIFT 12
252 #define VME2_IRQL4_VME3SHIFT 8
253 #define VME2_IRQL4_VME2SHIFT 4
254 #define VME2_IRQL4_VME1SHIFT 0
255
256 #define VME2_SYSFAIL (1 << 22)
257 #define VME2_IOCTL1_MIEN (1 << 23)
258 #define VME2_VBR_0SHIFT 28
259 #define VME2_VBR_1SHIFT 24
260 #define VME2_SET_VBR0(x) ((x) << VME2_VBR_0SHIFT)
261 #define VME2_SET_VBR1(x) ((x) << VME2_VBR_1SHIFT)
262 #define VME2_GET_VBR0(x) ((((x) >> 28) & 0xf) << 4)
263 #define VME2_GET_VBR1(x) ((((x) >> 24) & 0xf) << 4)
264 #define VME2_VBR_GPOXXXX 0x00ffffff
265
266 #define VME2_MISC_MPIRQEN 0x00000080 /* do not set */
267 #define VME2_MISC_REVEROM 0x00000040 /* 167: dis eprom. 166: en flash */
268 #define VME2_MISC_DISSRAM 0x00000020 /* do not set */
269 #define VME2_MISC_DISMST 0x00000010
270 #define VME2_MISC_NOELBBSY 0x00000008 /* do not set */
271 #define VME2_MISC_DISBSYT 0x00000004 /* do not set */
272 #define VME2_MISC_ENINT 0x00000002 /* do not set */
273 #define VME2_MISC_DISBGN 0x00000001 /* do not set */
274
275 #define VME2_A16D32BASE 0xffff0000UL
276 #define VME2_A16D32LEN 0x00010000UL
277 #define VME2_A32D16BASE 0xf1000000UL
278 #define VME2_A32D16LEN 0x01000000UL
279 #define VME2_A16D16BASE 0xffff0000UL
280 #define VME2_A16D16LEN 0x00010000UL
281 #define VME2_A24D16BASE 0xf0000000UL
282 #define VME2_A24D16LEN 0x01000000UL
283 #define VME2_A16BASE 0xffff0000UL
284 #define VME2_A24BASE 0xff000000UL
285
286 #if 0
287 paddr_t vmepmap(struct device *sc, off_t vmeaddr, int bustype);
288 int vmerw(struct device *sc, struct uio *uio, int flags, int bus);
289 int vmeintr_establish(int, struct intrhand *, const char *);
290 int vme_findvec(int);
291 int vmescan(struct device *, void *, void *, int);
292 #endif
293
294 #endif /* __MVEME88K_DEV_VME_H__ */
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