/[gxemul]/trunk/src/include/mips_cpu_types.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 24 by dpavlin, Mon Oct 8 16:19:56 2007 UTC revision 34 by dpavlin, Mon Oct 8 16:21:17 2007 UTC
# Line 2  Line 2 
2  #define MIPS_CPU_TYPES_H  #define MIPS_CPU_TYPES_H
3    
4  /*  /*
5   *  Copyright (C) 2003-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2003-2007  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: mips_cpu_types.h,v 1.17 2006/05/21 11:15:25 debug Exp $   *  $Id: mips_cpu_types.h,v 1.19 2007/02/10 13:31:20 debug Exp $
32   *   *
33   *  MIPS CPU types.   *  MIPS CPU types.
34   */   */
# Line 101  Line 101 
101          { "RM9000",     0x34 /*?*/,  0x0 /* ? */,DCOUNT,EXC4K, MMU4K,   4, 0,   48, 4,14,5,1,14,5,1,18, 6, 1 }, /*  This is totally bogus  */ \          { "RM9000",     0x34 /*?*/,  0x0 /* ? */,DCOUNT,EXC4K, MMU4K,   4, 0,   48, 4,14,5,1,14,5,1,18, 6, 1 }, /*  This is totally bogus  */ \
102          { "RC32334",    MIPS_RC32300,0x00,      0,      EXC32, MMU4K,  32, 1,   16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \          { "RC32334",    MIPS_RC32300,0x00,      0,      EXC32, MMU4K,  32, 1,   16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
103          { "4Kc",        0x100+MIPS_4Kc, 1,      0,      EXC32, MMU32,  32, 1,   16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \          { "4Kc",        0x100+MIPS_4Kc, 1,      0,      EXC32, MMU32,  32, 1,   16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
104            { "4KEc",       0x100+MIPS_4KEc_R2, 1,  0,      EXC32, MMU32,  32, 2,   16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
105          { "5Kc",        0x100+MIPS_5Kc, 1,      0,      EXC64, MMU64,  64, 1,   48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \          { "5Kc",        0x100+MIPS_5Kc, 1,      0,      EXC64, MMU64,  64, 1,   48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
106            { "5KE",        0x100+MIPS_5KE, 1,      0,      EXC64, MMU64,  64, 2,   48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
107          { "BCM4710",    0x000240,   0x00,       0,      EXC32, MMU32,  32, 1,   32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "BCM4710",    0x000240,   0x00,       0,      EXC32, MMU32,  32, 1,   32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
108          { "BCM4712",    0x000290,   0x07,       0,      EXC32, MMU32,  32, 1,   32, 2,13,4,1,12,4,1, 0, 0, 0 }, /*  2ways I, 2ways D  */ \          { "BCM4712",    0x000290,   0x07,       0,      EXC32, MMU32,  32, 1,   32, 2,13,4,1,12,4,1, 0, 0, 0 }, /*  2ways I, 2ways D  */ \
109          { "AU1000",     0x00302,    0x01,       0,      EXC32, MMU32,  32, 1,   32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "AU1000",     0x00302,    0x01,       0,      EXC32, MMU32,  32, 1,   32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
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