/[gxemul]/trunk/src/include/mips_cpu_types.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Diff of /trunk/src/include/mips_cpu_types.h

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revision 12 by dpavlin, Mon Oct 8 16:18:38 2007 UTC revision 14 by dpavlin, Mon Oct 8 16:18:51 2007 UTC
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: mips_cpu_types.h,v 1.8 2005/06/30 15:36:53 debug Exp $   *  $Id: mips_cpu_types.h,v 1.10 2005/09/23 10:36:03 debug Exp $
32   *   *
33   *  MIPS CPU types.   *  MIPS CPU types.
34   */   */
# Line 79  Line 79 
79          { "R4300",      MIPS_R4300, 0x00,       0,      EXC4K, MMU4K,   3,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  No DCOUNT?  */ \          { "R4300",      MIPS_R4300, 0x00,       0,      EXC4K, MMU4K,   3,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  No DCOUNT?  */ \
80          { "R4100",      MIPS_R4100, 0x00,       0,      EXC4K, MMU4K,   3,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  No DCOUNT?  */ \          { "R4100",      MIPS_R4100, 0x00,       0,      EXC4K, MMU4K,   3,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  No DCOUNT?  */ \
81          { "VR4102",     MIPS_R4100, 0x40,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,12,0,0,10,0,0, 0, 0, 0 }, /*  TODO: Bogus?  */ \          { "VR4102",     MIPS_R4100, 0x40,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,12,0,0,10,0,0, 0, 0, 0 }, /*  TODO: Bogus?  */ \
82          { "VR4181",     MIPS_R4100, 0x50,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,12,0,0,12,0,0, 0, 0, 0 }, /*  TODO: Bogus?  */ \          { "VR4181",     MIPS_R4100, 0x50,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,14,4,0,13,4,0, 0, 0, 0 }, \
83          { "VR4121",     MIPS_R4100, 0x60,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,14,0,0,13,0,0, 0, 0, 0 }, /*  TODO: Bogus?  */ \          { "VR4121",     MIPS_R4100, 0x60,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,14,4,0,13,4,0, 0, 0, 0 }, \
84          { "VR4122",     MIPS_R4100, 0x70,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,14,0,0,14,0,0, 0, 0, 0 }, /*  TODO: Bogus?  */ \          { "VR4122",     MIPS_R4100, 0x70,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,15,5,0,14,4,0, 0, 0, 0 }, \
85          { "VR4131",     MIPS_R4100, 0x80,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,14,0,0,14,0,0, 0, 0, 0 }, /*  TODO: Bogus?  */ \          { "VR4131",     MIPS_R4100, 0x80,       NOFPU,  EXC4K, MMU4K,   3,      32, 2,14,5,0,14,5,0, 0, 0, 0 }, \
86          { "R4400",      MIPS_R4000, 0x40,       DCOUNT, EXC4K, MMU4K,   3,      48, 2,14,4,1,14,4,1,20, 6, 1 }, \          { "R4400",      MIPS_R4000, 0x40,       DCOUNT, EXC4K, MMU4K,   3,      48, 2,14,4,1,14,4,1,20, 6, 1 }, \
87          { "R4600",      MIPS_R4600, 0x00,       DCOUNT, EXC4K, MMU4K,   3,      48, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \          { "R4600",      MIPS_R4600, 0x00,       DCOUNT, EXC4K, MMU4K,   3,      48, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
88          { "R4700",      MIPS_R4700, 0x00,       0,      EXC4K, MMU4K,   3,      48, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  No DCOUNT?  */ \          { "R4700",      MIPS_R4700, 0x00,       0,      EXC4K, MMU4K,   3,      48, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  No DCOUNT?  */ \
# Line 104  Line 104 
104          { "5Kc",        0x100+MIPS_5Kc, 1,      0,      EXC64, MMU64,  64,      48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \          { "5Kc",        0x100+MIPS_5Kc, 1,      0,      EXC64, MMU64,  64,      48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
105          { "BCM4710",    0x000240,   0x00,       0,      EXC32, MMU32,  32,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "BCM4710",    0x000240,   0x00,       0,      EXC32, MMU32,  32,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
106          { "BCM4712",    0x000290,   0x07,       0,      EXC32, MMU32,  32,      32, 2,13,4,1,12,4,1, 0, 0, 0 }, /*  2ways I, 2ways D  */ \          { "BCM4712",    0x000290,   0x07,       0,      EXC32, MMU32,  32,      32, 2,13,4,1,12,4,1, 0, 0, 0 }, /*  2ways I, 2ways D  */ \
107          { "AU1000",     0x000301,   0x00,       0,      EXC32, MMU32,  32,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "AU1000",     0x000301,   0x00,       0,      EXC32, MMU32,  32,      32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
108          { "AU1500",     0x010301,   0x00,       0,      EXC32, MMU32,  32,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "AU1500",     0x010301,   0x00,       0,      EXC32, MMU32,  32,      32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
109          { "AU1100",     0x020301,   0x00,       0,      EXC32, MMU32,  32,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "AU1100",     0x020301,   0x00,       0,      EXC32, MMU32,  32,      32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
110          { "SB1",        0x000401,   0x00,       0,      EXC64, MMU64,  64,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "SB1",        0x000401,   0x00,       0,      EXC64, MMU64,  64,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
111          { "SR7100",     0x000504,   0x00,       0,      EXC64, MMU64,  64,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \          { "SR7100",     0x000504,   0x00,       0,      EXC64, MMU64,  64,      32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
112          { "Allegrex",   0x000000,   0x00,       0,      EXC32, MMU32,   2,       4, 1,14,6,2,14,6,2, 0, 0, 0 }, \          { "Allegrex",   0x000000,   0x00,       0,      EXC32, MMU32,   2,       4, 1,14,6,2,14,6,2, 0, 0, 0 }, \
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