/[gxemul]/trunk/src/include/memory.h
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Contents of /trunk/src/include/memory.h

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Revision 28 - (show annotations)
Mon Oct 8 16:20:26 2007 UTC (13 years, 1 month ago) by dpavlin
File MIME type: text/plain
File size: 5032 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============


1 #ifndef MEMORY_H
2 #define MEMORY_H
3
4 /*
5 * Copyright (C) 2004-2006 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: memory.h,v 1.51 2006/07/08 12:30:03 debug Exp $
32 *
33 * Memory controller related functions.
34 */
35
36 #include <sys/types.h>
37 #include <inttypes.h>
38
39 #include "misc.h"
40
41
42 #define DEFAULT_RAM_IN_MB 32
43 #define MAX_DEVICES 26
44
45 struct cpu;
46 struct translation_page_entry;
47
48 struct memory {
49 uint64_t physical_max;
50 void *pagetable;
51
52 int n_mmapped_devices;
53 int last_accessed_device;
54 /* The following two might speed up things a little bit. */
55 /* (actually maxaddr is the addr after the last address) */
56 uint64_t mmap_dev_minaddr;
57 uint64_t mmap_dev_maxaddr;
58
59 const char *dev_name[MAX_DEVICES];
60 uint64_t dev_baseaddr[MAX_DEVICES];
61 uint64_t dev_endaddr[MAX_DEVICES]; /* after the end! */
62 uint64_t dev_length[MAX_DEVICES];
63 int dev_flags[MAX_DEVICES];
64 void *dev_extra[MAX_DEVICES];
65 int (*dev_f[MAX_DEVICES])(struct cpu *,struct memory *,
66 uint64_t,unsigned char *,size_t,int,void *);
67 unsigned char *dev_dyntrans_data[MAX_DEVICES];
68
69 uint64_t dev_dyntrans_write_low[MAX_DEVICES];
70 uint64_t dev_dyntrans_write_high[MAX_DEVICES];
71
72 int dev_dyntrans_alignment;
73 };
74
75 #define BITS_PER_PAGETABLE 20
76 #define BITS_PER_MEMBLOCK 20
77 #define MAX_BITS 40
78
79
80 /* memory.c: */
81 #define MEM_PCI_LITTLE_ENDIAN 128
82 uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len);
83 void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
84 uint64_t data);
85
86 void *zeroed_alloc(size_t s);
87
88 struct memory *memory_new(uint64_t physical_max, int arch);
89
90 int memory_points_to_string(struct cpu *cpu, struct memory *mem,
91 uint64_t addr, int min_string_length);
92 char *memory_conv_to_string(struct cpu *cpu, struct memory *mem,
93 uint64_t addr, char *buf, int bufsize);
94
95 unsigned char *memory_paddr_to_hostaddr(struct memory *mem,
96 uint64_t paddr, int writeflag);
97
98
99 /* Writeflag: */
100 #define MEM_READ 0
101 #define MEM_WRITE 1
102 #define MEM_DOWNGRADE 128
103
104 /* Misc. flags: */
105 #define CACHE_DATA 0
106 #define CACHE_INSTRUCTION 1
107 #define CACHE_NONE 2
108 #define CACHE_FLAGS_MASK 0x3
109 #define NO_EXCEPTIONS 16
110 #define PHYSICAL 32
111 #define NO_SEGMENTATION 64 /* for X86 */
112 #define MEMORY_USER_ACCESS 128 /* for ARM, at least */
113
114 /* Dyntrans Memory flags: */
115 #define DM_DEFAULT 0
116 #define DM_DYNTRANS_OK 1
117 #define DM_DYNTRANS_WRITE_OK 2
118 #define DM_READS_HAVE_NO_SIDE_EFFECTS 4
119 #define DM_EMULATED_RAM 8
120
121 #define FLAG_WRITEFLAG 1
122 #define FLAG_NOEXCEPTIONS 2
123 #define FLAG_INSTR 4
124
125 int userland_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
126 unsigned char *data, size_t len, int writeflag, int cache);
127 #define MEMORY_ACCESS_FAILED 0
128 #define MEMORY_ACCESS_OK 1
129 #define MEMORY_ACCESS_OK_WRITE 2
130 #define MEMORY_NOT_FULL_PAGE 256
131
132 void memory_device_dyntrans_access(struct cpu *, struct memory *mem,
133 void *extra, uint64_t *low, uint64_t *high);
134
135 #define DEVICE_ACCESS(x) int dev_ ## x ## _access(struct cpu *cpu, \
136 struct memory *mem, uint64_t relative_addr, unsigned char *data, \
137 size_t len, int writeflag, void *extra)
138
139 void memory_device_update_data(struct memory *mem, void *extra,
140 unsigned char *data);
141
142 void memory_device_register(struct memory *mem, const char *,
143 uint64_t baseaddr, uint64_t len, int (*f)(struct cpu *,
144 struct memory *,uint64_t,unsigned char *,size_t,int,void *),
145 void *extra, int flags, unsigned char *dyntrans_data);
146 void memory_device_remove(struct memory *mem, int i);
147
148 uint64_t memory_checksum(struct memory *mem);
149
150
151 #endif /* MEMORY_H */

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