src/include/memory.h

#ifndef MEMORY_H
#define MEMORY_H

/*
 *  Copyright (C) 2004-2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: memory.h,v 1.37 2005/09/22 09:07:00 debug Exp $
 *
 *  Memory controller related functions.
 */

#include <sys/types.h>
#include <inttypes.h>

#include "misc.h"


#define DEFAULT_RAM_IN_MB               32
#define MAX_DEVICES                     24

#define DEVICE_STATE_TYPE_INT           1
#define DEVICE_STATE_TYPE_UINT64_T      2

struct cpu;
struct translation_page_entry;

/*  For bintrans:  */
#define MAX_QUICK_JUMPS                 8

struct memory {
        uint64_t        physical_max;
        void            *pagetable;

        int             n_mmapped_devices;
        int             last_accessed_device;
        /*  The following two might speed up things a little bit.  */
        /*  (actually maxaddr is the addr after the last address)  */
        uint64_t        mmap_dev_minaddr;
        uint64_t        mmap_dev_maxaddr;

        const char      *dev_name[MAX_DEVICES];
        uint64_t        dev_baseaddr[MAX_DEVICES];
        uint64_t        dev_length[MAX_DEVICES];
        int             dev_flags[MAX_DEVICES];
        void            *dev_extra[MAX_DEVICES];
        int             (*dev_f[MAX_DEVICES])(struct cpu *,struct memory *,
                            uint64_t,unsigned char *,size_t,int,void *);
        int             (*dev_f_state[MAX_DEVICES])(struct cpu *,
                            struct memory *, void *extra, int wf, int nr,
                            int *type, char **namep, void **data, size_t *len);
        unsigned char   *dev_dyntrans_data[MAX_DEVICES];

        int             dev_dyntrans_alignment;

        uint64_t        dev_dyntrans_write_low[MAX_DEVICES];
        uint64_t        dev_dyntrans_write_high[MAX_DEVICES];


        /*
         *  NOTE/TODO: This bintrans was for MIPS only. Ugly. :-/
         */

        /*
         *  translation_code_chunk_space is a large chunk of (linear) memory
         *  where translated code chunks and translation_entrys are stored.
         *  When this is filled, translation is restart from scratch (by
         *  resetting translation_code_chunk_space_head to 0, and removing all
         *  translation entries).
         *
         *  (Using a static memory region like this is somewhat inspired by
         *  the QEMU web pages,
         *  http://fabrice.bellard.free.fr/qemu/qemu-tech.html#SEC13)
         */

        unsigned char   *translation_code_chunk_space;
        size_t          translation_code_chunk_space_head;

        int             bintrans_32bit_only;

        struct translation_page_entry **translation_page_entry_array;

        unsigned char   *quick_jump_host_address[MAX_QUICK_JUMPS];
        int             quick_jump_page_offset[MAX_QUICK_JUMPS];
        int             n_quick_jumps;
        int             quick_jumps_index;
};

#define BITS_PER_PAGETABLE      20
#define BITS_PER_MEMBLOCK       20
#define MAX_BITS                40

#define MEM_READ                        0
#define MEM_WRITE                       1


#define CACHE_DATA                      0
#define CACHE_INSTRUCTION               1
#define CACHE_NONE                      2

#define CACHE_FLAGS_MASK                0x3

#define NO_EXCEPTIONS                   16
#define PHYSICAL                        32
#define NO_SEGMENTATION                 64      /*  for X86  */
#define MEMORY_USER_ACCESS              128     /*  for ARM, at least  */


/*  memory.c:  */
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len);
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
        uint64_t data);

void *zeroed_alloc(size_t s);

struct memory *memory_new(uint64_t physical_max, int arch);

int memory_points_to_string(struct cpu *cpu, struct memory *mem,
        uint64_t addr, int min_string_length);
char *memory_conv_to_string(struct cpu *cpu, struct memory *mem,
        uint64_t addr, char *buf, int bufsize);

unsigned char *memory_paddr_to_hostaddr(struct memory *mem,
        uint64_t paddr, int writeflag);

/*  memory_fast_v2h.c:  */
unsigned char *fast_vaddr_to_hostaddr(struct cpu *cpu, uint64_t vaddr,
        int writeflag);

/*  MIPS stuff:  */
int translate_address_mmu3k(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_mmu8k(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_mmu10k(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_mmu4100(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_generic(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);


#define FLAG_WRITEFLAG          1
#define FLAG_NOEXCEPTIONS       2
#define FLAG_INSTR              4

int userland_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
        unsigned char *data, size_t len, int writeflag, int cache);
#define MEMORY_ACCESS_FAILED    0
#define MEMORY_ACCESS_OK        1

void memory_device_dyntrans_access(struct cpu *, struct memory *mem,
        void *extra, uint64_t *low, uint64_t *high);

void memory_device_register_statefunction(
        struct memory *mem, void *extra,
        int (*dev_f_state)(struct cpu *,
            struct memory *, void *extra, int wf, int nr,
            int *type, char **namep, void **data, size_t *len));

void memory_device_register(struct memory *mem, const char *,
        uint64_t baseaddr, uint64_t len, int (*f)(struct cpu *,
            struct memory *,uint64_t,unsigned char *,size_t,int,void *),
        void *extra, int flags, unsigned char *dyntrans_data);
void memory_device_remove(struct memory *mem, int i);

/*  Bit flags:  */
#define MEM_DEFAULT                             0
#define MEM_DYNTRANS_OK                         1
#define MEM_DYNTRANS_WRITE_OK                   2
#define MEM_READING_HAS_NO_SIDE_EFFECTS         4


#endif  /*  MEMORY_H  */
1	#ifndef MEMORY_H
2	#define MEMORY_H
3
4	/*
5	* Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
6	*
7	* Redistribution and use in source and binary forms, with or without
8	* modification, are permitted provided that the following conditions are met:
9	*
10	* 1. Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.
12	* 2. Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.
15	* 3. The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.
17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28	* SUCH DAMAGE.
29	*
30	*
31	* $Id: memory.h,v 1.37 2005/09/22 09:07:00 debug Exp $
32	*
33	* Memory controller related functions.
34	*/
35
36	#include <sys/types.h>
37	#include <inttypes.h>
38
39	#include "misc.h"
40
41
42	#define DEFAULT_RAM_IN_MB 32
43	#define MAX_DEVICES 24
44
45	#define DEVICE_STATE_TYPE_INT 1
46	#define DEVICE_STATE_TYPE_UINT64_T 2
47
48	struct cpu;
49	struct translation_page_entry;
50
51	/* For bintrans: */
52	#define MAX_QUICK_JUMPS 8
53
54	struct memory {
55	uint64_t physical_max;
56	void *pagetable;
57
58	int n_mmapped_devices;
59	int last_accessed_device;
60	/* The following two might speed up things a little bit. */
61	/* (actually maxaddr is the addr after the last address) */
62	uint64_t mmap_dev_minaddr;
63	uint64_t mmap_dev_maxaddr;
64
65	const char *dev_name[MAX_DEVICES];
66	uint64_t dev_baseaddr[MAX_DEVICES];
67	uint64_t dev_length[MAX_DEVICES];
68	int dev_flags[MAX_DEVICES];
69	void *dev_extra[MAX_DEVICES];
70	int (dev_f[MAX_DEVICES])(struct cpu ,struct memory *,
71	uint64_t,unsigned char ,size_t,int,void );
72	int (dev_f_state[MAX_DEVICES])(struct cpu ,
73	struct memory , void extra, int wf, int nr,
74	int type, char namep, void data, size_t len);
75	unsigned char *dev_dyntrans_data[MAX_DEVICES];
76
77	int dev_dyntrans_alignment;
78
79	uint64_t dev_dyntrans_write_low[MAX_DEVICES];
80	uint64_t dev_dyntrans_write_high[MAX_DEVICES];
81
82
83	/*
84	* NOTE/TODO: This bintrans was for MIPS only. Ugly. :-/
85	*/
86
87	/*
88	* translation_code_chunk_space is a large chunk of (linear) memory
89	* where translated code chunks and translation_entrys are stored.
90	* When this is filled, translation is restart from scratch (by
91	* resetting translation_code_chunk_space_head to 0, and removing all
92	* translation entries).
93	*
94	* (Using a static memory region like this is somewhat inspired by
95	* the QEMU web pages,
96	* http://fabrice.bellard.free.fr/qemu/qemu-tech.html#SEC13)
97	*/
98
99	unsigned char *translation_code_chunk_space;
100	size_t translation_code_chunk_space_head;
101
102	int bintrans_32bit_only;
103
104	struct translation_page_entry **translation_page_entry_array;
105
106	unsigned char *quick_jump_host_address[MAX_QUICK_JUMPS];
107	int quick_jump_page_offset[MAX_QUICK_JUMPS];
108	int n_quick_jumps;
109	int quick_jumps_index;
110	};
111
112	#define BITS_PER_PAGETABLE 20
113	#define BITS_PER_MEMBLOCK 20
114	#define MAX_BITS 40
115
116	#define MEM_READ 0
117	#define MEM_WRITE 1
118
119
120	#define CACHE_DATA 0
121	#define CACHE_INSTRUCTION 1
122	#define CACHE_NONE 2
123
124	#define CACHE_FLAGS_MASK 0x3
125
126	#define NO_EXCEPTIONS 16
127	#define PHYSICAL 32
128	#define NO_SEGMENTATION 64 /* for X86 */
129	#define MEMORY_USER_ACCESS 128 /* for ARM, at least */
130
131
132	/* memory.c: */
133	uint64_t memory_readmax64(struct cpu cpu, unsigned char buf, int len);
134	void memory_writemax64(struct cpu cpu, unsigned char buf, int len,
135	uint64_t data);
136
137	void *zeroed_alloc(size_t s);
138
139	struct memory *memory_new(uint64_t physical_max, int arch);
140
141	int memory_points_to_string(struct cpu cpu, struct memory mem,
142	uint64_t addr, int min_string_length);
143	char memory_conv_to_string(struct cpu cpu, struct memory *mem,
144	uint64_t addr, char *buf, int bufsize);
145
146	unsigned char memory_paddr_to_hostaddr(struct memory mem,
147	uint64_t paddr, int writeflag);
148
149	/* memory_fast_v2h.c: */
150	unsigned char fast_vaddr_to_hostaddr(struct cpu cpu, uint64_t vaddr,
151	int writeflag);
152
153	/* MIPS stuff: */
154	int translate_address_mmu3k(struct cpu *cpu, uint64_t vaddr,
155	uint64_t *return_addr, int flags);
156	int translate_address_mmu8k(struct cpu *cpu, uint64_t vaddr,
157	uint64_t *return_addr, int flags);
158	int translate_address_mmu10k(struct cpu *cpu, uint64_t vaddr,
159	uint64_t *return_addr, int flags);
160	int translate_address_mmu4100(struct cpu *cpu, uint64_t vaddr,
161	uint64_t *return_addr, int flags);
162	int translate_address_generic(struct cpu *cpu, uint64_t vaddr,
163	uint64_t *return_addr, int flags);
164
165
166	#define FLAG_WRITEFLAG 1
167	#define FLAG_NOEXCEPTIONS 2
168	#define FLAG_INSTR 4
169
170	int userland_memory_rw(struct cpu cpu, struct memory mem, uint64_t vaddr,
171	unsigned char *data, size_t len, int writeflag, int cache);
172	#define MEMORY_ACCESS_FAILED 0
173	#define MEMORY_ACCESS_OK 1
174
175	void memory_device_dyntrans_access(struct cpu , struct memory mem,
176	void extra, uint64_t low, uint64_t *high);
177
178	void memory_device_register_statefunction(
179	struct memory mem, void extra,
180	int (dev_f_state)(struct cpu ,
181	struct memory , void extra, int wf, int nr,
182	int type, char namep, void data, size_t len));
183
184	void memory_device_register(struct memory mem, const char ,
185	uint64_t baseaddr, uint64_t len, int (f)(struct cpu ,
186	struct memory ,uint64_t,unsigned char ,size_t,int,void *),
187	void extra, int flags, unsigned char dyntrans_data);
188	void memory_device_remove(struct memory *mem, int i);
189
190	/* Bit flags: */
191	#define MEM_DEFAULT 0
192	#define MEM_DYNTRANS_OK 1
193	#define MEM_DYNTRANS_WRITE_OK 2
194	#define MEM_READING_HAS_NO_SIDE_EFFECTS 4
195
196
197	#endif /* MEMORY_H */