/[gxemul]/trunk/src/include/memory.h
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revision 4 by dpavlin, Mon Oct 8 16:18:00 2007 UTC revision 24 by dpavlin, Mon Oct 8 16:19:56 2007 UTC
# Line 2  Line 2 
2  #define MEMORY_H  #define MEMORY_H
3    
4  /*  /*
5   *  Copyright (C) 2004-2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2004-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: memory.h,v 1.29 2005/02/26 16:53:32 debug Exp $   *  $Id: memory.h,v 1.49 2006/06/16 18:31:26 debug Exp $
32   *   *
33   *  Memory controller related functions.   *  Memory controller related functions.
34   */   */
# Line 40  Line 40 
40    
41    
42  #define DEFAULT_RAM_IN_MB               32  #define DEFAULT_RAM_IN_MB               32
43  #define MAX_DEVICES                     24  #define MAX_DEVICES                     26
   
 #define DEVICE_STATE_TYPE_INT           1  
 #define DEVICE_STATE_TYPE_UINT64_T      2  
44    
45  struct cpu;  struct cpu;
46  struct translation_page_entry;  struct translation_page_entry;
47    
 /*  For bintrans:  */  
 #define MAX_QUICK_JUMPS                 8  
   
48  struct memory {  struct memory {
49          uint64_t        physical_max;          uint64_t        physical_max;
50          void            *pagetable;          void            *pagetable;
# Line 64  struct memory { Line 58  struct memory {
58    
59          const char      *dev_name[MAX_DEVICES];          const char      *dev_name[MAX_DEVICES];
60          uint64_t        dev_baseaddr[MAX_DEVICES];          uint64_t        dev_baseaddr[MAX_DEVICES];
61            uint64_t        dev_endaddr[MAX_DEVICES];       /*  after the end!  */
62          uint64_t        dev_length[MAX_DEVICES];          uint64_t        dev_length[MAX_DEVICES];
63          int             dev_flags[MAX_DEVICES];          int             dev_flags[MAX_DEVICES];
64          void            *dev_extra[MAX_DEVICES];          void            *dev_extra[MAX_DEVICES];
65          int             (*dev_f[MAX_DEVICES])(struct cpu *,struct memory *,          int             (*dev_f[MAX_DEVICES])(struct cpu *,struct memory *,
66                              uint64_t,unsigned char *,size_t,int,void *);                              uint64_t,unsigned char *,size_t,int,void *);
67          int             (*dev_f_state[MAX_DEVICES])(struct cpu *,          unsigned char   *dev_dyntrans_data[MAX_DEVICES];
68                              struct memory *, void *extra, int wf, int nr,  
69                              int *type, char **namep, void **data, size_t *len);          uint64_t        dev_dyntrans_write_low[MAX_DEVICES];
70          unsigned char   *dev_bintrans_data[MAX_DEVICES];          uint64_t        dev_dyntrans_write_high[MAX_DEVICES];
71    
72  #ifdef BINTRANS          int             dev_dyntrans_alignment;
         uint64_t        dev_bintrans_write_low[MAX_DEVICES];  
         uint64_t        dev_bintrans_write_high[MAX_DEVICES];  
   
         /*  
          *  translation_code_chunk_space is a large chunk of (linear) memory  
          *  where translated code chunks and translation_entrys are stored.  
          *  When this is filled, translation is restart from scratch (by  
          *  resetting translation_code_chunk_space_head to 0, and removing all  
          *  translation entries).  
          *  
          *  (Using a static memory region like this is somewhat inspired by  
          *  the QEMU web pages,  
          *  http://fabrice.bellard.free.fr/qemu/qemu-tech.html#SEC13)  
          */  
   
         unsigned char   *translation_code_chunk_space;  
         size_t          translation_code_chunk_space_head;  
   
         int             bintrans_32bit_only;  
   
         struct translation_page_entry **translation_page_entry_array;  
   
         unsigned char   *quick_jump_host_address[MAX_QUICK_JUMPS];  
         int             quick_jump_page_offset[MAX_QUICK_JUMPS];  
         int             n_quick_jumps;  
         int             quick_jumps_index;  
 #endif  
73  };  };
74    
75  #define BITS_PER_PAGETABLE      20  #define BITS_PER_PAGETABLE      20
76  #define BITS_PER_MEMBLOCK       20  #define BITS_PER_MEMBLOCK       20
77  #define MAX_BITS                40  #define MAX_BITS                40
78    
 #define MEM_READ                        0  
 #define MEM_WRITE                       1  
   
   
 #define CACHE_DATA                      0  
 #define CACHE_INSTRUCTION               1  
 #define CACHE_NONE                      2  
   
 #define CACHE_FLAGS_MASK                0x3  
   
 #define NO_EXCEPTIONS                   8  
 #define PHYSICAL                        16  
   
79    
80  /*  memory.c:  */  /*  memory.c:  */
81    #define MEM_PCI_LITTLE_ENDIAN   128
82  uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len);  uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len);
83  void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,  void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
84          uint64_t data);          uint64_t data);
85    
86  void *zeroed_alloc(size_t s);  void *zeroed_alloc(size_t s);
87    
88  struct memory *memory_new(uint64_t physical_max);  struct memory *memory_new(uint64_t physical_max, int arch);
89    
90  int memory_points_to_string(struct cpu *cpu, struct memory *mem,  int memory_points_to_string(struct cpu *cpu, struct memory *mem,
91          uint64_t addr, int min_string_length);          uint64_t addr, int min_string_length);
# Line 143  unsigned char *memory_paddr_to_hostaddr( Line 99  unsigned char *memory_paddr_to_hostaddr(
99  unsigned char *fast_vaddr_to_hostaddr(struct cpu *cpu, uint64_t vaddr,  unsigned char *fast_vaddr_to_hostaddr(struct cpu *cpu, uint64_t vaddr,
100          int writeflag);          int writeflag);
101    
102    /*  MIPS stuff:  */
103  int translate_address_mmu3k(struct cpu *cpu, uint64_t vaddr,  int translate_address_mmu3k(struct cpu *cpu, uint64_t vaddr,
104          uint64_t *return_addr, int flags);          uint64_t *return_addr, int flags);
105  int translate_address_mmu8k(struct cpu *cpu, uint64_t vaddr,  int translate_address_mmu8k(struct cpu *cpu, uint64_t vaddr,
# Line 154  int translate_address_mmu4100(struct cpu Line 111  int translate_address_mmu4100(struct cpu
111  int translate_address_generic(struct cpu *cpu, uint64_t vaddr,  int translate_address_generic(struct cpu *cpu, uint64_t vaddr,
112          uint64_t *return_addr, int flags);          uint64_t *return_addr, int flags);
113    
114    
115    /*  Writeflag:  */
116    #define MEM_READ                        0
117    #define MEM_WRITE                       1
118    #define MEM_DOWNGRADE                   128
119    
120    /*  Misc. flags:  */
121    #define CACHE_DATA                      0
122    #define CACHE_INSTRUCTION               1
123    #define CACHE_NONE                      2
124    #define CACHE_FLAGS_MASK                0x3
125    #define NO_EXCEPTIONS                   16
126    #define PHYSICAL                        32
127    #define NO_SEGMENTATION                 64      /*  for X86  */
128    #define MEMORY_USER_ACCESS              128     /*  for ARM, at least  */
129    
130    /*  Dyntrans Memory flags:  */
131    #define DM_DEFAULT                              0
132    #define DM_DYNTRANS_OK                          1
133    #define DM_DYNTRANS_WRITE_OK                    2
134    #define DM_READS_HAVE_NO_SIDE_EFFECTS           4
135    #define DM_EMULATED_RAM                         8
136    
137  #define FLAG_WRITEFLAG          1  #define FLAG_WRITEFLAG          1
138  #define FLAG_NOEXCEPTIONS       2  #define FLAG_NOEXCEPTIONS       2
139  #define FLAG_INSTR              4  #define FLAG_INSTR              4
140    
141  int userland_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,  int userland_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
142          unsigned char *data, size_t len, int writeflag, int cache);          unsigned char *data, size_t len, int writeflag, int cache);
143  #define MEMORY_ACCESS_FAILED    0  #define MEMORY_ACCESS_FAILED            0
144  #define MEMORY_ACCESS_OK        1  #define MEMORY_ACCESS_OK                1
145    #define MEMORY_ACCESS_OK_WRITE          2
146    #define MEMORY_NOT_FULL_PAGE            256
147    
148  void memory_device_bintrans_access(struct cpu *, struct memory *mem,  void memory_device_dyntrans_access(struct cpu *, struct memory *mem,
149          void *extra, uint64_t *low, uint64_t *high);          void *extra, uint64_t *low, uint64_t *high);
150    
151  void memory_device_register_statefunction(  #define DEVICE_ACCESS(x)        int dev_ ## x ## _access(struct cpu *cpu, \
152          struct memory *mem, void *extra,          struct memory *mem, uint64_t relative_addr, unsigned char *data,  \
153          int (*dev_f_state)(struct cpu *,          size_t len, int writeflag, void *extra)
             struct memory *, void *extra, int wf, int nr,  
             int *type, char **namep, void **data, size_t *len));  
154    
155  void memory_device_register(struct memory *mem, const char *,  void memory_device_register(struct memory *mem, const char *,
156          uint64_t baseaddr, uint64_t len, int (*f)(struct cpu *,          uint64_t baseaddr, uint64_t len, int (*f)(struct cpu *,
157              struct memory *,uint64_t,unsigned char *,size_t,int,void *),              struct memory *,uint64_t,unsigned char *,size_t,int,void *),
158          void *extra, int flags, unsigned char *bintrans_data);          void *extra, int flags, unsigned char *dyntrans_data);
159  void memory_device_remove(struct memory *mem, int i);  void memory_device_remove(struct memory *mem, int i);
160    
161  #define MEM_DEFAULT                     0  uint64_t memory_checksum(struct memory *mem);
 #define MEM_BINTRANS_OK                 1  
 #define MEM_BINTRANS_WRITE_OK           2  
162    
163    
164  #endif  /*  MEMORY_H  */  #endif  /*  MEMORY_H  */
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