src/include/memory.h

#ifndef MEMORY_H
#define MEMORY_H

/*
 *  Copyright (C) 2004-2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: memory.h,v 1.47 2006/01/01 13:17:18 debug Exp $
 *
 *  Memory controller related functions.
 */

#include <sys/types.h>
#include <inttypes.h>

#include "misc.h"


#define DEFAULT_RAM_IN_MB               32
#define MAX_DEVICES                     26

struct cpu;
struct translation_page_entry;

/*  For bintrans:  */
#define MAX_QUICK_JUMPS                 8

struct memory {
        uint64_t        physical_max;
        void            *pagetable;

        int             n_mmapped_devices;
        int             last_accessed_device;
        /*  The following two might speed up things a little bit.  */
        /*  (actually maxaddr is the addr after the last address)  */
        uint64_t        mmap_dev_minaddr;
        uint64_t        mmap_dev_maxaddr;

        const char      *dev_name[MAX_DEVICES];
        uint64_t        dev_baseaddr[MAX_DEVICES];
        uint64_t        dev_endaddr[MAX_DEVICES];       /*  after the end!  */
        uint64_t        dev_length[MAX_DEVICES];
        int             dev_flags[MAX_DEVICES];
        void            *dev_extra[MAX_DEVICES];
        int             (*dev_f[MAX_DEVICES])(struct cpu *,struct memory *,
                            uint64_t,unsigned char *,size_t,int,void *);
        unsigned char   *dev_dyntrans_data[MAX_DEVICES];

        uint64_t        dev_dyntrans_write_low[MAX_DEVICES];
        uint64_t        dev_dyntrans_write_high[MAX_DEVICES];

        int             dev_dyntrans_alignment;


        /*
         *  NOTE/TODO: This bintrans was for MIPS only. Ugly. :-/
         */

        /*
         *  translation_code_chunk_space is a large chunk of (linear) memory
         *  where translated code chunks and translation_entrys are stored.
         *  When this is filled, translation is restart from scratch (by
         *  resetting translation_code_chunk_space_head to 0, and removing all
         *  translation entries).
         *
         *  (Using a static memory region like this is somewhat inspired by
         *  the QEMU web pages,
         *  http://fabrice.bellard.free.fr/qemu/qemu-tech.html#SEC13)
         */

        unsigned char   *translation_code_chunk_space;
        size_t          translation_code_chunk_space_head;

        int             bintrans_32bit_only;

        struct translation_page_entry **translation_page_entry_array;

        unsigned char   *quick_jump_host_address[MAX_QUICK_JUMPS];
        size_t          quick_jump_page_offset[MAX_QUICK_JUMPS];
        int             n_quick_jumps;
        int             quick_jumps_index;
};

#define BITS_PER_PAGETABLE      20
#define BITS_PER_MEMBLOCK       20
#define MAX_BITS                40


/*  memory.c:  */
#define MEM_PCI_LITTLE_ENDIAN   128
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len);
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len,
        uint64_t data);

void *zeroed_alloc(size_t s);

struct memory *memory_new(uint64_t physical_max, int arch);

int memory_points_to_string(struct cpu *cpu, struct memory *mem,
        uint64_t addr, int min_string_length);
char *memory_conv_to_string(struct cpu *cpu, struct memory *mem,
        uint64_t addr, char *buf, int bufsize);

unsigned char *memory_paddr_to_hostaddr(struct memory *mem,
        uint64_t paddr, int writeflag);

/*  memory_fast_v2h.c:  */
unsigned char *fast_vaddr_to_hostaddr(struct cpu *cpu, uint64_t vaddr,
        int writeflag);

/*  MIPS stuff:  */
int translate_address_mmu3k(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_mmu8k(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_mmu10k(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_mmu4100(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);
int translate_address_generic(struct cpu *cpu, uint64_t vaddr,
        uint64_t *return_addr, int flags);


/*  Writeflag:  */
#define MEM_READ                        0
#define MEM_WRITE                       1
#define MEM_DOWNGRADE                   128

/*  Misc. flags:  */
#define CACHE_DATA                      0
#define CACHE_INSTRUCTION               1
#define CACHE_NONE                      2
#define CACHE_FLAGS_MASK                0x3
#define NO_EXCEPTIONS                   16
#define PHYSICAL                        32
#define NO_SEGMENTATION                 64      /*  for X86  */
#define MEMORY_USER_ACCESS              128     /*  for ARM, at least  */

/*  Dyntrans Memory flags:  */
#define DM_DEFAULT                              0
#define DM_DYNTRANS_OK                          1
#define DM_DYNTRANS_WRITE_OK                    2
#define DM_READS_HAVE_NO_SIDE_EFFECTS           4
#define DM_EMULATED_RAM                         8

#define FLAG_WRITEFLAG          1
#define FLAG_NOEXCEPTIONS       2
#define FLAG_INSTR              4

int userland_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
        unsigned char *data, size_t len, int writeflag, int cache);
#define MEMORY_ACCESS_FAILED            0
#define MEMORY_ACCESS_OK                1
#define MEMORY_ACCESS_OK_WRITE          2
#define MEMORY_NOT_FULL_PAGE            256

void memory_device_dyntrans_access(struct cpu *, struct memory *mem,
        void *extra, uint64_t *low, uint64_t *high);

#define DEVICE_ACCESS(x)        int dev_ ## x ## _access(struct cpu *cpu, \
        struct memory *mem, uint64_t relative_addr, unsigned char *data,  \
        size_t len, int writeflag, void *extra)

void memory_device_register(struct memory *mem, const char *,
        uint64_t baseaddr, uint64_t len, int (*f)(struct cpu *,
            struct memory *,uint64_t,unsigned char *,size_t,int,void *),
        void *extra, int flags, unsigned char *dyntrans_data);
void memory_device_remove(struct memory *mem, int i);

#endif  /*  MEMORY_H  */
1	dpavlin	4	#ifndef MEMORY_H
2			#define MEMORY_H
3
4			/*
5			* Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
6			*
7			* Redistribution and use in source and binary forms, with or without
8			* modification, are permitted provided that the following conditions are met:
9			*
10			* 1. Redistributions of source code must retain the above copyright
11			* notice, this list of conditions and the following disclaimer.
12			* 2. Redistributions in binary form must reproduce the above copyright
13			* notice, this list of conditions and the following disclaimer in the
14			* documentation and/or other materials provided with the distribution.
15			* 3. The name of the author may not be used to endorse or promote products
16			* derived from this software without specific prior written permission.
17			*
18			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28			* SUCH DAMAGE.
29			*
30			*
31	dpavlin	22	* $Id: memory.h,v 1.47 2006/01/01 13:17:18 debug Exp $
32	dpavlin	4	*
33			* Memory controller related functions.
34			*/
35
36			#include <sys/types.h>
37			#include <inttypes.h>
38
39			#include "misc.h"
40
41
42			#define DEFAULT_RAM_IN_MB 32
43	dpavlin	20	#define MAX_DEVICES 26
44	dpavlin	4
45			struct cpu;
46			struct translation_page_entry;
47
48			/* For bintrans: */
49			#define MAX_QUICK_JUMPS 8
50
51			struct memory {
52			uint64_t physical_max;
53			void *pagetable;
54
55			int n_mmapped_devices;
56			int last_accessed_device;
57			/* The following two might speed up things a little bit. */
58			/* (actually maxaddr is the addr after the last address) */
59			uint64_t mmap_dev_minaddr;
60			uint64_t mmap_dev_maxaddr;
61
62			const char *dev_name[MAX_DEVICES];
63			uint64_t dev_baseaddr[MAX_DEVICES];
64	dpavlin	18	uint64_t dev_endaddr[MAX_DEVICES]; /* after the end! */
65	dpavlin	4	uint64_t dev_length[MAX_DEVICES];
66			int dev_flags[MAX_DEVICES];
67			void *dev_extra[MAX_DEVICES];
68			int (dev_f[MAX_DEVICES])(struct cpu ,struct memory *,
69			uint64_t,unsigned char ,size_t,int,void );
70	dpavlin	12	unsigned char *dev_dyntrans_data[MAX_DEVICES];
71	dpavlin	4
72	dpavlin	12	uint64_t dev_dyntrans_write_low[MAX_DEVICES];
73			uint64_t dev_dyntrans_write_high[MAX_DEVICES];
74
75	dpavlin	20	int dev_dyntrans_alignment;
76	dpavlin	12
77	dpavlin	20
78	dpavlin	4	/*
79	dpavlin	12	* NOTE/TODO: This bintrans was for MIPS only. Ugly. :-/
80			*/
81
82			/*
83	dpavlin	4	* translation_code_chunk_space is a large chunk of (linear) memory
84			* where translated code chunks and translation_entrys are stored.
85			* When this is filled, translation is restart from scratch (by
86			* resetting translation_code_chunk_space_head to 0, and removing all
87			* translation entries).
88			*
89			* (Using a static memory region like this is somewhat inspired by
90			* the QEMU web pages,
91			* http://fabrice.bellard.free.fr/qemu/qemu-tech.html#SEC13)
92			*/
93
94			unsigned char *translation_code_chunk_space;
95			size_t translation_code_chunk_space_head;
96
97			int bintrans_32bit_only;
98
99			struct translation_page_entry **translation_page_entry_array;
100
101			unsigned char *quick_jump_host_address[MAX_QUICK_JUMPS];
102	dpavlin	22	size_t quick_jump_page_offset[MAX_QUICK_JUMPS];
103	dpavlin	4	int n_quick_jumps;
104			int quick_jumps_index;
105			};
106
107			#define BITS_PER_PAGETABLE 20
108			#define BITS_PER_MEMBLOCK 20
109			#define MAX_BITS 40
110
111
112			/* memory.c: */
113	dpavlin	20	#define MEM_PCI_LITTLE_ENDIAN 128
114	dpavlin	4	uint64_t memory_readmax64(struct cpu cpu, unsigned char buf, int len);
115			void memory_writemax64(struct cpu cpu, unsigned char buf, int len,
116			uint64_t data);
117
118			void *zeroed_alloc(size_t s);
119
120	dpavlin	12	struct memory *memory_new(uint64_t physical_max, int arch);
121	dpavlin	4
122			int memory_points_to_string(struct cpu cpu, struct memory mem,
123			uint64_t addr, int min_string_length);
124			char memory_conv_to_string(struct cpu cpu, struct memory *mem,
125			uint64_t addr, char *buf, int bufsize);
126
127			unsigned char memory_paddr_to_hostaddr(struct memory mem,
128			uint64_t paddr, int writeflag);
129
130			/* memory_fast_v2h.c: */
131			unsigned char fast_vaddr_to_hostaddr(struct cpu cpu, uint64_t vaddr,
132			int writeflag);
133
134	dpavlin	6	/* MIPS stuff: */
135	dpavlin	4	int translate_address_mmu3k(struct cpu *cpu, uint64_t vaddr,
136			uint64_t *return_addr, int flags);
137			int translate_address_mmu8k(struct cpu *cpu, uint64_t vaddr,
138			uint64_t *return_addr, int flags);
139			int translate_address_mmu10k(struct cpu *cpu, uint64_t vaddr,
140			uint64_t *return_addr, int flags);
141			int translate_address_mmu4100(struct cpu *cpu, uint64_t vaddr,
142			uint64_t *return_addr, int flags);
143			int translate_address_generic(struct cpu *cpu, uint64_t vaddr,
144			uint64_t *return_addr, int flags);
145
146	dpavlin	6
147	dpavlin	20	/* Writeflag: */
148			#define MEM_READ 0
149			#define MEM_WRITE 1
150			#define MEM_DOWNGRADE 128
151
152			/* Misc. flags: */
153			#define CACHE_DATA 0
154			#define CACHE_INSTRUCTION 1
155			#define CACHE_NONE 2
156			#define CACHE_FLAGS_MASK 0x3
157			#define NO_EXCEPTIONS 16
158			#define PHYSICAL 32
159			#define NO_SEGMENTATION 64 /* for X86 */
160			#define MEMORY_USER_ACCESS 128 /* for ARM, at least */
161
162			/* Dyntrans Memory flags: */
163			#define DM_DEFAULT 0
164			#define DM_DYNTRANS_OK 1
165			#define DM_DYNTRANS_WRITE_OK 2
166			#define DM_READS_HAVE_NO_SIDE_EFFECTS 4
167			#define DM_EMULATED_RAM 8
168
169	dpavlin	4	#define FLAG_WRITEFLAG 1
170			#define FLAG_NOEXCEPTIONS 2
171			#define FLAG_INSTR 4
172
173			int userland_memory_rw(struct cpu cpu, struct memory mem, uint64_t vaddr,
174			unsigned char *data, size_t len, int writeflag, int cache);
175	dpavlin	18	#define MEMORY_ACCESS_FAILED 0
176			#define MEMORY_ACCESS_OK 1
177			#define MEMORY_ACCESS_OK_WRITE 2
178			#define MEMORY_NOT_FULL_PAGE 256
179	dpavlin	4
180	dpavlin	12	void memory_device_dyntrans_access(struct cpu , struct memory mem,
181	dpavlin	4	void extra, uint64_t low, uint64_t *high);
182
183	dpavlin	22	#define DEVICE_ACCESS(x) int dev_ ## x ## _access(struct cpu *cpu, \
184			struct memory mem, uint64_t relative_addr, unsigned char data, \
185			size_t len, int writeflag, void *extra)
186	dpavlin	4
187			void memory_device_register(struct memory mem, const char ,
188			uint64_t baseaddr, uint64_t len, int (f)(struct cpu ,
189			struct memory ,uint64_t,unsigned char ,size_t,int,void *),
190	dpavlin	12	void extra, int flags, unsigned char dyntrans_data);
191	dpavlin	4	void memory_device_remove(struct memory *mem, int i);
192
193			#endif /* MEMORY_H */