/[gxemul]/trunk/src/include/machine.h
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Revision 24 - (show annotations)
Mon Oct 8 16:19:56 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 15953 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1256 2006/06/23 20:43:44 debug Exp $
20060219	Various minor updates. Removing the old MIPS16 skeleton code,
		because it will need to be rewritten for dyntrans anyway.
20060220-22	Removing the non-working dyntrans backend support.
		Continuing on the 64-bit dyntrans virtual memory generalization.
20060223	More work on the 64-bit vm generalization.
20060225	Beginning on MIPS dyntrans load/store instructions.
		Minor PPC updates (64-bit load/store, etc).
		Fixes for the variable-instruction-length framework, some
		minor AVR updates (a simple Hello World program works!).
		Beginning on a skeleton for automatically generating documen-
		tation (for devices etc.).
20060226	PPC updates (adding some more 64-bit instructions, etc).
		AVR updates (more instructions).
		FINALLY found and fixed the zs bug, making NetBSD/macppc
		accept the serial console.
20060301	Adding more AVR instructions.
20060304	Continuing on AVR-related stuff. Beginning on a framework for
		cycle-accurate device emulation. Adding an experimental "PAL
		TV" device (just a dummy so far).
20060305	Adding more AVR instructions.
		Adding a dummy epcom serial controller (for TS7200 emulation).
20060310	Removing the emul() command from configuration files, so only
		net() and machine() are supported.
		Minor progress on the MIPS dyntrans rewrite.
20060311	Continuing on the MIPS dyntrans rewrite (adding more
		instructions, etc).
20060315	Adding more instructions (sllv, srav, srlv, bgtz[l], blez[l],
		beql, bnel, slti[u], various loads and stores).
20060316	Removing the ALWAYS_SIGNEXTEND_32 option, since it was rarely
		used.
		Adding more MIPS dyntrans instructions, and fixing bugs.
20060318	Implementing fast loads/stores for MIPS dyntrans (big/little
		endian, 32-bit and 64-bit modes).
20060320	Making MIPS dyntrans the default configure option; use
		"--enable-oldmips" to use the old bintrans system.
		Adding MIPS dyntrans dmult[u]; minor updates.
20060322	Continuing... adding some more instructions.
		Adding a simple skeleton for demangling C++ "_ZN" symbols.
20060323	Moving src/debugger.c into a new directory (src/debugger/).
20060324	Fixing the hack used to load PPC ELFs (useful for relocated
		Linux/ppc kernels), and adding a dummy G3 machine mode.
20060325-26	Beginning to experiment with GDB remote serial protocol
		connections; adding a -G command line option for selecting
		which TCP port to listen to.
20060330	Beginning a major cleanup to replace things like "0x%016llx"
		with more correct "0x%016"PRIx64, etc.
		Continuing on the GDB remote serial protocol support.
20060331	More cleanup, and some minor GDB remote progress.
20060402	Adding a hack to the configure script, to allow compilation
		on systems that lack PRIx64 etc.
20060406	Removing the temporary FreeBSD/arm hack in dev_ns16550.c and
		replacing it with a better fix from Olivier Houchard.
20060407	A remote debugger (gdb or ddd) can now start and stop the
		emulator using the GDB remote serial protocol, and registers
		and memory can be read. MIPS only for now.
20060408	More GDB progress: single-stepping also works, and also adding
		support for ARM, PowerPC, and Alpha targets.
		Continuing on the delay-slot-across-page-boundary issue.
20060412	Minor update: beginning to add support for the SPARC target
		to the remote GDB functionality.
20060414	Various MIPS updates: adding more instructions for dyntrans
		(eret, add), and making some exceptions work. Fixing a bug
		in dmult[u].
		Implementing the first SPARC instructions (sethi, or).
20060415	Adding "magic trap" instructions so that PROM calls can be
		software emulated in MIPS dyntrans.
		Adding more MIPS dyntrans instructions (ddiv, dadd) and
		fixing another bug in dmult.
20060416	More MIPS dyntrans progress: adding [d]addi, movn, movz, dsllv,
		rfi, an ugly hack for supporting R2000/R3000 style faked caches,
		preliminary interrupt support, and various other updates and
		bugfixes.
20060417	Adding more SPARC instructions (add, sub, sll[x], sra[x],
		srl[x]), and useful SPARC header definitions.
		Adding the first (trivial) x86/AMD64 dyntrans instructions (nop,
		cli/sti, stc/clc, std/cld, simple mov, inc ax). Various other
		x86 updates related to variable instruction length stuff.
		Adding unaligned loads/stores to the MIPS dyntrans mode (but
		still using the pre-dyntrans (slow) imlementation).
20060419	Fixing a MIPS dyntrans exception-in-delay-slot bug.
		Removing the old "show opcode statistics" functionality, since
		it wasn't really useful and isn't implemented for dyntrans.
		Single-stepping (or running with instruction trace) now looks
		ok with dyntrans with delay-slot architectures.
20060420	Minor hacks (removing the -B command line option when compiled
		for non-bintrans, and some other very minor updates).
		Adding (slow) MIPS dyntrans load-linked/store-conditional.
20060422	Applying fixes for bugs discovered by Nils Weller's nwcc
		(static DEC memmap => now per machine, and adding an extern
		keyword in cpu_arm_instr.c).
		Finally found one of the MIPS dyntrans bugs that I've been
		looking for (copy/paste spelling error BIG vs LITTLE endian in
		cpu_mips_instr_loadstore.c for 16-bit fast stores).
		FINALLY found the major MIPS dyntrans bug: slti vs sltiu
		signed/unsigned code in cpu_mips_instr.c. :-)
		Adding more MIPS dyntrans instructions (lwc1, swc1, bgezal[l],
		ctc1, tlt[u], tge[u], tne, beginning on rdhwr).
		NetBSD/hpcmips can now reach userland when using dyntrans :-)
		Adding some more x86 dyntrans instructions.
		Finally removed the old Alpha-specific virtual memory code,
		and replaced it with the generic 64-bit version.
		Beginning to add disassembly support for SPECIAL3 MIPS opcodes.
20060423	Continuing on the delay-slot-across-page-boundary issue;
		adding an end_of_page2 ic slot (like I had planned before, but
		had removed for some reason).
		Adding a quick-and-dirty fallback to legacy coprocessor 1
		code (i.e. skipping dyntrans implementation for now).
		NetBSD/hpcmips and NetBSD/pmax (when running on an emulated
		R4400) can now be installed and run. :-)  (Many bugs left
		to fix, though.)
		Adding more MIPS dyntrans instructions: madd[u], msub[u].
		Cleaning up the SPECIAL2 vs R5900/TX79/C790 "MMI" opcode
		maps somewhat (disassembly and dyntrans instruction decoding).
20060424	Adding an isa_revision field to mips_cpu_types.h, and making
		sure that SPECIAL3 opcodes cause Reserved Instruction
		exceptions on MIPS32/64 revisions lower than 2.
		Adding the SPARC 'ba', 'call', 'jmpl/retl', 'and', and 'xor'
		instructions.
20060425	Removing the -m command line option ("run at most x 
		instructions") and -T ("single_step_on_bad_addr"), because
		they never worked correctly with dyntrans anyway.
		Freshening up the man page.
20060428	Adding more MIPS dyntrans instructions: bltzal[l], idle.
		Enabling MIPS dyntrans compare interrupts.
20060429	FINALLY found the weird dyntrans bug, causing NetBSD etc. to
		behave strangely: some floating point code (conditional
		coprocessor branches) could not be reused from the old
		non-dyntrans code. The "quick-and-dirty fallback" only appeared
		to work. Fixing by implementing bc1* for MIPS dyntrans.
		More MIPS instructions: [d]sub, sdc1, ldc1, dmtc1, dmfc1, cfc0.
		Freshening up MIPS floating point disassembly appearance.
20060430	Continuing on C790/R5900/TX79 disassembly; implementing 128-bit
		"por" and "pextlw".
20060504	Disabling -u (userland emulation) unless compiled as unstable
		development version.
		Beginning on freshening up the testmachine include files,
		to make it easier to reuse those files (placing them in
		src/include/testmachine/), and beginning on a set of "demos"
		or "tutorials" for the testmachine functionality.
		Minor updates to the MIPS GDB remote protocol stub.
		Refreshing doc/experiments.html and gdb_remote.html.
		Enabling Alpha emulation in the stable release configuration,
		even though no guest OSes for Alpha can run yet.
20060505	Adding a generic 'settings' object, which will contain
		references to settable variables (which will later be possible
		to access using the debugger).
20060506	Updating dev_disk and corresponding demo/documentation (and
		switching from SCSI to IDE disk types, so it actually works
		with current test machines :-).
20060510	Adding a -D_LARGEFILE_SOURCE hack for 64-bit Linux hosts,
		so that fseeko() doesn't give a warning.
		Updating the section about how dyntrans works (the "runnable
		IR") in doc/intro.html.
		Instruction updates (some x64=1 checks, some more R5900
		dyntrans stuff: better mul/mult separation from MIPS32/64,
		adding ei and di).
		Updating MIPS cpuregs.h to a newer one (from NetBSD).
		Adding more MIPS dyntrans instructions: deret, ehb.
20060514	Adding disassembly and beginning implementation of SPARC wr
		and wrpr instructions.
20060515	Adding a SUN SPARC machine mode, with dummy SS20 and Ultra1
		machines. Adding the 32-bit "rd psr" instruction.
20060517	Disassembly support for the general SPARC rd instruction.
		Partial implementation of the cmp (subcc) instruction.
		Some other minor updates (making sure that R5900 processors
		start up with the EIE bit enabled, otherwise Linux/playstation2
		receives no interrupts).
20060519	Minor MIPS updates/cleanups.
20060521	Moving the MeshCube machine into evbmips; this seems to work
		reasonably well with a snapshot of a NetBSD MeshCube kernel.
		Cleanup/fix of MIPS config0 register initialization.
20060529	Minor MIPS fixes, including a sign-extension fix to the
		unaligned load/store code, which makes NetBSD/pmax on R3000
		work better with dyntrans. (Ultrix and Linux/DECstation still
		don't work, though.)
20060530	Minor updates to the Alpha machine mode: adding an AlphaBook
		mode, an LCA bus (forwarding accesses to an ISA bus), etc.
20060531	Applying a bugfix for the MIPS dyntrans sc[d] instruction from
		Ondrej Palkovsky. (Many thanks.)
20060601	Minifix to allow ARM immediate msr instruction to not give
		an error for some valid values.
		More Alpha updates.
20060602	Some minor Alpha updates.
20060603	Adding the Alpha cmpbge instruction. NetBSD/alpha prints its
		first boot messages :-) on an emulated Alphabook 1.
20060612	Minor updates; adding a dev_ether.h include file for the
		testmachine ether device. Continuing the hunt for the dyntrans
		bug which makes Linux and Ultrix on DECstation behave
		strangely... FINALLY found it! It seems to be related to
		invalidation of the translation cache, on tlbw{r,i}. There
		also seems to be some remaining interrupt-related problems.
20060614	Correcting the implementation of ldc1/sdc1 for MIPS dyntrans
		(so that it uses 16 32-bit registers if the FR bit in the
		status register is not set).
20060616	REMOVING BINTRANS COMPLETELY!
		Removing the old MIPS interpretation mode.
		Removing the MFHILO_DELAY and instruction delay stuff, because
		they wouldn't work with dyntrans anyway.
20060617	Some documentation updates (adding "NetBSD-archive" to some
		URLs, and new Debian/DECstation installation screenshots).
		Removing the "tracenull" and "enable-caches" configure options.
		Improving MIPS dyntrans performance somewhat (only invalidate
		translations if necessary, on writes to the entryhi register,
		instead of doing it for all cop0 writes).
20060618	More cleanup after the removal of the old MIPS emulation.
		Trying to fix the MIPS dyntrans performance bugs/bottlenecks;
		only semi-successful so far (for R3000).
20060620	Minor update to allow clean compilation again on Tru64/Alpha.
20060622	MIPS cleanup and fixes (removing the pc_last stuff, which
		doesn't make sense with dyntrans anyway, and fixing a cross-
		page-delay-slot-with-exception case in end_of_page).
		Removing the old max_random_cycles_per_chunk stuff, and the
		concept of cycles vs instructions for MIPS emulation.
		FINALLY found and fixed the bug which caused NetBSD/pmax
		clocks to behave strangely (it was a load to the zero register,
		which was treated as a NOP; now it is treated as a load to a
		dummy scratch register).
20060623	Increasing the dyntrans chunk size back to
		N_SAFE_DYNTRANS_LIMIT, instead of N_SAFE_DYNTRANS_LIMIT/2.
		Preparing for a quick release, even though there are known
		bugs, and performance for non-R3000 MIPS emulation is very
		poor. :-/
		Reverting to half the dyntrans chunk size again, because
		NetBSD/cats seemed less stable with full size chunks. :(
		NetBSD/sgimips 3.0 can now run :-)  (With release 0.3.8, only
		NetBSD/sgimips 2.1 worked, not 3.0.)

==============  RELEASE 0.4.0  ==============
1 #ifndef MACHINE_H
2 #define MACHINE_H
3
4 /*
5 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: machine.h,v 1.118 2006/06/22 13:22:41 debug Exp $
32 */
33
34 #include <sys/types.h>
35 #include <sys/time.h>
36
37 #include "debugger_gdb.h"
38 #include "symbol.h"
39
40 #include "machine_arc.h"
41 #include "machine_pmax.h"
42 #include "machine_x86.h"
43
44
45 #define MAX_BREAKPOINTS 8
46 #define BREAKPOINT_FLAG_R 1
47
48 #define MAX_TICK_FUNCTIONS 16
49
50 struct cpu_family;
51 struct diskimage;
52 struct emul;
53 struct fb_window;
54 struct memory;
55 struct of_data;
56
57 /* Ugly: */
58 struct kn230_csr;
59 struct kn02_csr;
60 struct dec_ioasic_data;
61 struct ps2_data;
62 struct footbridge_data;
63 struct dec5800_data;
64 struct au1x00_ic_data;
65 struct malta_data;
66 struct vr41xx_data;
67 struct jazz_data;
68 struct crime_data;
69 struct mace_data;
70 struct sgi_ip20_data;
71 struct sgi_ip22_data;
72 struct sgi_ip30_data;
73 struct isa_pic_data {
74 struct pic8259_data *pic1;
75 struct pic8259_data *pic2;
76 int last_int;
77 int native_irq;
78 };
79
80
81 struct machine_bus {
82 struct machine_bus *next;
83
84 char *name;
85
86 void (*debug_dump)(void *);
87 void *extra;
88 };
89
90
91 #define MACHINE_NAME_MAXBUF 150
92
93 struct machine {
94 /* Pointer back to the emul struct we are in: */
95 struct emul *emul;
96
97 /* Name as choosen by the user: */
98 char *name;
99
100 int arch; /* ARCH_MIPS, ARCH_PPC, .. */
101 int machine_type; /* MACHINE_PMAX, .. */
102 int machine_subtype; /* MACHINE_DEC_3MAX_5000, .. */
103
104 int cycle_accurate; /* Set to non-zero for cycle
105 accurate (slow) emulation. */
106
107 /* Name set by code in src/machines/machine_*.c: */
108 char *machine_name;
109
110 int stable; /* startup warning for non-stable
111 emulation modes. */
112
113 /* The serial number is mostly used when emulating multiple machines
114 in a network. nr_of_nics is the current nr of network cards, which
115 is useful when emulating multiple cards in one machine: */
116 int serial_nr;
117 int nr_of_nics;
118
119 struct cpu_family *cpu_family;
120
121 /*
122 * The "mainbus":
123 *
124 * o) memory
125 * o) devices
126 * o) CPUs
127 */
128
129 struct memory *memory;
130
131 int main_console_handle;
132
133 /* Hardware devices, run every x clock cycles. */
134 int n_tick_entries;
135 int ticks_till_next[MAX_TICK_FUNCTIONS];
136 int ticks_reset_value[MAX_TICK_FUNCTIONS];
137 void (*tick_func[MAX_TICK_FUNCTIONS])(struct cpu *, void *);
138 void *tick_extra[MAX_TICK_FUNCTIONS];
139 double tick_hz[MAX_TICK_FUNCTIONS];
140
141 void (*md_interrupt)(struct machine *m, struct cpu *cpu,
142 int irq_nr, int assert);
143
144 char *cpu_name; /* TODO: remove this, there could be several
145 cpus with different names in a machine */
146 int byte_order_override;
147 int bootstrap_cpu;
148 int use_random_bootstrap_cpu;
149 int start_paused;
150 int ncpus;
151 struct cpu **cpus;
152
153 /* Registered busses: */
154 struct machine_bus *first_bus;
155 int n_busses;
156
157 /* These are used by stuff in cpu.c, mostly: */
158 int64_t ncycles;
159 int64_t ncycles_show;
160 int64_t ncycles_flush;
161 int64_t ncycles_since_gettimeofday;
162 struct timeval starttime;
163 int a_few_cycles;
164 int a_few_instrs;
165
166 struct diskimage *first_diskimage;
167
168 struct symbol_context symbol_context;
169
170 int random_mem_contents;
171 int physical_ram_in_mb;
172 int memory_offset_in_mb;
173 int prom_emulation;
174 int register_dump;
175 int arch_pagesize;
176
177 int bootdev_type;
178 int bootdev_id;
179 char *bootstr;
180 char *bootarg;
181
182 struct debugger_gdb gdb;
183
184 int n_breakpoints;
185 char *breakpoint_string[MAX_BREAKPOINTS];
186 uint64_t breakpoint_addr[MAX_BREAKPOINTS];
187 int breakpoint_flags[MAX_BREAKPOINTS];
188
189 /* Cache sizes: (1 << x) x=0 for default values */
190 /* TODO: these are _PER CPU_! */
191 int cache_picache;
192 int cache_pdcache;
193 int cache_secondary;
194 int cache_picache_linesize;
195 int cache_pdcache_linesize;
196 int cache_secondary_linesize;
197
198 int dbe_on_nonexistant_memaccess;
199 int dyntrans_alignment_check;
200 int instruction_trace;
201 int show_nr_of_instructions;
202 int show_symbolic_register_names;
203 int emulated_hz;
204 int speed_tricks;
205 char *userland_emul; /* NULL for no userland emulation */
206 int force_netboot;
207 int slow_serial_interrupts_hack_for_linux;
208 uint64_t file_loaded_end_addr;
209 char *boot_kernel_filename;
210 char *boot_string_argument;
211
212 int automatic_clock_adjustment;
213 int exit_without_entering_debugger;
214 int show_trace_tree;
215
216 int n_gfx_cards;
217
218 /* Machine-dependent: (PROM stuff, etc.) */
219 union {
220 struct machine_arcbios arc;
221 struct machine_pmax pmax;
222 struct machine_pc pc;
223 } md;
224
225 /* OpenFirmware: */
226 struct of_data *of_data;
227
228 /* Bus-specific interrupt data: */
229 struct isa_pic_data isa_pic_data;
230
231 /* Machine-dependent interrupt specific structs: */
232 union {
233 struct kn230_csr *kn230_csr;
234 struct kn02_csr *kn02_csr;
235 struct dec_ioasic_data *dec_ioasic_data;
236 struct ps2_data *ps2_data;
237 struct dec5800_data *dec5800_csr;
238 struct au1x00_ic_data *au1x00_ic_data;
239 struct vr41xx_data *vr41xx_data;
240 struct jazz_data *jazz_data;
241 struct malta_data *malta_data;
242 struct sgi_ip20_data *sgi_ip20_data;
243 struct sgi_ip22_data *sgi_ip22_data;
244 struct sgi_ip30_data *sgi_ip30_data;
245 struct {
246 struct crime_data *crime_data;
247 struct mace_data *mace_data;
248 } ip32;
249 struct footbridge_data *footbridge_data;
250 struct bebox_data *bebox_data;
251 struct prep_data *prep_data;
252 struct cpc700_data *cpc700_data;
253 struct gc_data *gc_data;
254 struct v3_data *v3_data;
255 } md_int;
256
257 /* X11/framebuffer stuff: */
258 int use_x11;
259 int x11_scaledown;
260 int x11_scaleup;
261 int x11_n_display_names;
262 char **x11_display_names;
263 int x11_current_display_name_nr; /* updated by x11.c */
264
265 int n_fb_windows;
266 struct fb_window **fb_windows;
267 };
268
269
270 /*
271 * Machine emulation types:
272 */
273
274 #define ARCH_NOARCH 0
275 #define ARCH_MIPS 1
276 #define ARCH_PPC 2
277 #define ARCH_SPARC 3
278 #define ARCH_ALPHA 4
279 #define ARCH_X86 5
280 #define ARCH_ARM 6
281 #define ARCH_IA64 7
282 #define ARCH_M68K 8
283 #define ARCH_SH 9
284 #define ARCH_HPPA 10
285 #define ARCH_I960 11
286 #define ARCH_AVR 12
287
288 /* MIPS: */
289 #define MACHINE_BAREMIPS 1000
290 #define MACHINE_TESTMIPS 1001
291 #define MACHINE_PMAX 1002
292 #define MACHINE_COBALT 1003
293 #define MACHINE_HPCMIPS 1004
294 #define MACHINE_PS2 1005
295 #define MACHINE_SGI 1006
296 #define MACHINE_ARC 1007
297 #define MACHINE_NETGEAR 1008
298 #define MACHINE_SONYNEWS 1009
299 #define MACHINE_EVBMIPS 1010
300 #define MACHINE_PSP 1011
301 #define MACHINE_ALGOR 1012
302
303 /* PPC: */
304 #define MACHINE_BAREPPC 2000
305 #define MACHINE_TESTPPC 2001
306 #define MACHINE_WALNUT 2002
307 #define MACHINE_PMPPC 2003
308 #define MACHINE_SANDPOINT 2004
309 #define MACHINE_BEBOX 2005
310 #define MACHINE_PREP 2006
311 #define MACHINE_MACPPC 2007
312 #define MACHINE_DB64360 2008
313 #define MACHINE_MVMEPPC 2009
314
315 /* SPARC: */
316 #define MACHINE_BARESPARC 3000
317 #define MACHINE_TESTSPARC 3001
318 #define MACHINE_SPARC 3002
319
320 /* Alpha: */
321 #define MACHINE_BAREALPHA 4000
322 #define MACHINE_TESTALPHA 4001
323 #define MACHINE_ALPHA 4002
324
325 /* X86: */
326 #define MACHINE_BAREX86 5000
327 #define MACHINE_X86 5001
328
329 /* ARM: */
330 #define MACHINE_BAREARM 6000
331 #define MACHINE_TESTARM 6001
332 #define MACHINE_CATS 6002
333 #define MACHINE_HPCARM 6003
334 #define MACHINE_ZAURUS 6004
335 #define MACHINE_NETWINDER 6005
336 #define MACHINE_SHARK 6006
337 #define MACHINE_IQ80321 6007
338 #define MACHINE_IYONIX 6008
339 #define MACHINE_TS7200 6009
340
341 /* IA64: */
342 #define MACHINE_BAREIA64 7000
343 #define MACHINE_TESTIA64 7001
344
345 /* M68K: */
346 #define MACHINE_BAREM68K 8000
347 #define MACHINE_TESTM68K 8001
348
349 /* SH: */
350 #define MACHINE_BARESH 9000
351 #define MACHINE_TESTSH 9001
352 #define MACHINE_HPCSH 9002
353
354 /* HPPA: */
355 #define MACHINE_BAREHPPA 10000
356 #define MACHINE_TESTHPPA 10001
357
358 /* I960: */
359 #define MACHINE_BAREI960 11000
360 #define MACHINE_TESTI960 11001
361
362 /* AVR: */
363 #define MACHINE_BAREAVR 12000
364 #define MACHINE_AVR_PAL 12001
365 #define MACHINE_AVR_MAHPONG 12002
366
367 /* Other "pseudo"-machines: */
368 #define MACHINE_NONE 0
369 #define MACHINE_USERLAND 100000
370
371 /* DEC: */
372 #define MACHINE_DEC_PMAX_3100 1
373 #define MACHINE_DEC_3MAX_5000 2
374 #define MACHINE_DEC_3MIN_5000 3
375 #define MACHINE_DEC_3MAXPLUS_5000 4
376 #define MACHINE_DEC_5800 5
377 #define MACHINE_DEC_5400 6
378 #define MACHINE_DEC_MAXINE_5000 7
379 #define MACHINE_DEC_5500 11
380 #define MACHINE_DEC_MIPSMATE_5100 12
381
382 #define DEC_PROM_CALLBACK_STRUCT 0xffffffffbfc04000ULL
383 #define DEC_PROM_EMULATION 0xffffffffbfc08000ULL
384 #define DEC_PROM_INITIAL_ARGV (INITIAL_STACK_POINTER + 0x80)
385 #define DEC_PROM_STRINGS 0xffffffffbfc20000ULL
386 #define DEC_PROM_TCINFO 0xffffffffbfc2c000ULL
387 #define DEC_MEMMAP_ADDR 0xffffffffbfc30000ULL
388
389 /* HPCmips: */
390 #define MACHINE_HPCMIPS_CASIO_BE300 1
391 #define MACHINE_HPCMIPS_CASIO_E105 2
392 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_770 3
393 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_780 4
394 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_800 5
395 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_880 6
396 #define MACHINE_HPCMIPS_AGENDA_VR3 7
397 #define MACHINE_HPCMIPS_IBM_WORKPAD_Z50 8
398
399 /* HPCarm: */
400 #define MACHINE_HPCARM_IPAQ 1
401 #define MACHINE_HPCARM_JORNADA720 2
402
403 /* HPCsh: */
404 #define MACHINE_HPCSH_JORNADA680 1
405 #define MACHINE_HPCSH_JORNADA690 2
406
407 /* Playstation 2: */
408 #define PLAYSTATION2_BDA 0xffffffffa0001000ULL
409 #define PLAYSTATION2_OPTARGS 0xffffffff81fff100ULL
410 #define PLAYSTATION2_SIFBIOS 0xffffffffbfc10000ULL
411
412 /* SGI and ARC: */
413 #define MACHINE_ARC_NEC_RD94 1
414 #define MACHINE_ARC_JAZZ_PICA 2
415 #define MACHINE_ARC_NEC_R94 3
416 #define MACHINE_ARC_DESKTECH_TYNE 4
417 #define MACHINE_ARC_JAZZ_MAGNUM 5
418 #define MACHINE_ARC_NEC_R98 6
419 #define MACHINE_ARC_JAZZ_M700 7
420 #define MACHINE_ARC_NEC_R96 8
421
422 /* Algor: */
423 #define MACHINE_ALGOR_P4032 4
424 #define MACHINE_ALGOR_P5064 5
425
426 /* EVBMIPS: */
427 #define MACHINE_EVBMIPS_MALTA 1
428 #define MACHINE_EVBMIPS_MALTA_BE 2
429 #define MACHINE_EVBMIPS_MESHCUBE 3
430 #define MACHINE_EVBMIPS_PB1000 4
431
432 /* PReP: */
433 #define MACHINE_PREP_IBM6050 1
434 #define MACHINE_PREP_MVME2400 2
435
436 /* Sun SPARC: */
437 #define MACHINE_SPARC_SS5 1
438 #define MACHINE_SPARC_SS20 2
439 #define MACHINE_SPARC_ULTRA1 3
440 #define MACHINE_SPARC_ULTRA60 4
441
442 /* MacPPC: TODO: Real model names */
443 #define MACHINE_MACPPC_G3 1
444 #define MACHINE_MACPPC_G4 2
445 #define MACHINE_MACPPC_G5 3
446
447 /* MVMEPPC */
448 #define MACHINE_MVMEPPC_1600 1
449 #define MACHINE_MVMEPPC_2100 2
450 #define MACHINE_MVMEPPC_5500 3
451
452 /* X86: */
453 #define MACHINE_X86_GENERIC 1
454 #define MACHINE_X86_XT 2
455
456
457 /*
458 * Problem: kernels seem to be loaded at low addresses in RAM, so
459 * storing environment strings and memory descriptors there is a bad
460 * idea. They are stored at 0xbfc..... instead. The ARC SPB must
461 * be at physical address 0x1000 though.
462 */
463 #define SGI_SPB_ADDR 0xffffffff80001000ULL
464 /* 0xbfc10000 is firmware callback vector stuff */
465 #define ARC_FIRMWARE_VECTORS 0xffffffffbfc80000ULL
466 #define ARC_FIRMWARE_ENTRIES 0xffffffffbfc88000ULL
467 #define ARC_ARGV_START 0xffffffffbfc90000ULL
468 #define ARC_ENV_STRINGS 0xffffffffbfc98000ULL
469 #define ARC_ENV_POINTERS 0xffffffffbfc9d000ULL
470 #define SGI_SYSID_ADDR 0xffffffffbfca1800ULL
471 #define ARC_DSPSTAT_ADDR 0xffffffffbfca1c00ULL
472 #define ARC_MEMDESC_ADDR 0xffffffffbfca1c80ULL
473 #define ARC_CONFIG_DATA_ADDR 0xffffffffbfca2000ULL
474 #define FIRST_ARC_COMPONENT 0xffffffffbfca8000ULL
475 #define ARC_PRIVATE_VECTORS 0xffffffffbfcb0000ULL
476 #define ARC_PRIVATE_ENTRIES 0xffffffffbfcb8000ULL
477
478
479 /* For the automachine system: */
480 struct machine_entry_subtype {
481 int machine_subtype;/* Old-style subtype */
482 const char *name; /* Official name */
483 int n_aliases;
484 char **aliases; /* Aliases */
485 };
486
487 struct machine_entry {
488 struct machine_entry *next;
489
490 /* Machine type: */
491 int arch;
492 int machine_type; /* Old-style type */
493 const char *name; /* Official name */
494 int n_aliases;
495 char **aliases; /* Aliases */
496
497 void (*setup)(struct machine *, struct cpu *);
498 void (*set_default_cpu)(struct machine *);
499 void (*set_default_ram)(struct machine *);
500
501 /* Machine subtypes: */
502 int n_subtypes;
503 struct machine_entry_subtype **subtype;
504 };
505
506 #define MACHINE_SETUP_TYPE(n) void (*n)(struct machine *, struct cpu *)
507 #define MACHINE_SETUP(x) void machine_setup_ ## x(struct machine *machine, \
508 struct cpu *cpu)
509 #define MACHINE_DEFAULT_CPU(x) void machine_default_cpu_ ## x(struct machine *machine)
510 #define MACHINE_DEFAULT_RAM(x) void machine_default_ram_ ## x(struct machine *machine)
511 #define MACHINE_REGISTER(x) void machine_register_ ## x(void)
512 #define MR_DEFAULT(x,name,arch,type,n,m) struct machine_entry \
513 *me = machine_entry_new(name,arch,type,n,m); \
514 me->setup = machine_setup_ ## x; \
515 me->set_default_cpu = machine_default_cpu_ ## x;
516 void automachine_init(void);
517
518
519 /* machine.c: */
520 struct machine *machine_new(char *name, struct emul *emul);
521 int machine_name_to_type(char *stype, char *ssubtype,
522 int *type, int *subtype, int *arch);
523 void machine_add_tickfunction(struct machine *machine,
524 void (*func)(struct cpu *, void *), void *extra,
525 int clockshift, double hz);
526 void machine_register(char *name, MACHINE_SETUP_TYPE(setup));
527 void dump_mem_string(struct cpu *cpu, uint64_t addr);
528 void store_string(struct cpu *cpu, uint64_t addr, char *s);
529 int store_64bit_word(struct cpu *cpu, uint64_t addr, uint64_t data64);
530 int store_32bit_word(struct cpu *cpu, uint64_t addr, uint64_t data32);
531 int store_16bit_word(struct cpu *cpu, uint64_t addr, uint64_t data16);
532 void store_byte(struct cpu *cpu, uint64_t addr, uint8_t data);
533 void store_64bit_word_in_host(struct cpu *cpu, unsigned char *data,
534 uint64_t data32);
535 void store_32bit_word_in_host(struct cpu *cpu, unsigned char *data,
536 uint64_t data32);
537 void store_16bit_word_in_host(struct cpu *cpu, unsigned char *data,
538 uint16_t data16);
539 uint32_t load_32bit_word(struct cpu *cpu, uint64_t addr);
540 uint16_t load_16bit_word(struct cpu *cpu, uint64_t addr);
541 void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len);
542 void add_environment_string(struct cpu *cpu, char *s, uint64_t *addr);
543 void add_environment_string_dual(struct cpu *cpu,
544 uint64_t *ptrp, uint64_t *addrp, char *s1, char *s2);
545 void store_pointer_and_advance(struct cpu *cpu, uint64_t *addrp,
546 uint64_t data, int flag64);
547 void machine_setup(struct machine *);
548 void machine_memsize_fix(struct machine *);
549 void machine_default_cputype(struct machine *);
550 void machine_dumpinfo(struct machine *);
551 void machine_bus_register(struct machine *, char *busname,
552 void (*debug_dump)(void *), void *extra);
553 void machine_list_available_types_and_cpus(void);
554 struct machine_entry *machine_entry_new(const char *name,
555 int arch, int oldstyle_type, int n_aliases, int n_subtypes);
556 struct machine_entry_subtype *machine_entry_subtype_new(
557 const char *name, int oldstyle_type, int n_aliases);
558 void machine_entry_add(struct machine_entry *me, int arch);
559 void machine_init(void);
560
561
562 #endif /* MACHINE_H */
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